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Songmao Tian42d226c2007-06-06 14:52:38 +08001/*
Songmao Tian42d226c2007-06-06 14:52:38 +08002 * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology
3 * Author: Fuxin Zhang, zhangfx@lemote.com
4 *
Ralf Baechle70342282013-01-22 12:59:30 +01005 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
Songmao Tian42d226c2007-06-06 14:52:38 +08008 * option) any later version.
Songmao Tian42d226c2007-06-06 14:52:38 +08009 */
Songmao Tian42d226c2007-06-06 14:52:38 +080010#include <linux/pci.h>
Songmao Tian42d226c2007-06-06 14:52:38 +080011
Wu Zhangjin5e983ff2009-07-02 23:23:03 +080012#include <pci.h>
13#include <loongson.h>
Songmao Tian42d226c2007-06-06 14:52:38 +080014
Wu Zhangjin85749d22009-07-02 23:26:45 +080015static struct resource loongson_pci_mem_resource = {
Ralf Baechle70342282013-01-22 12:59:30 +010016 .name = "pci memory space",
17 .start = LOONGSON_PCI_MEM_START,
18 .end = LOONGSON_PCI_MEM_END,
19 .flags = IORESOURCE_MEM,
Songmao Tian42d226c2007-06-06 14:52:38 +080020};
21
Wu Zhangjin85749d22009-07-02 23:26:45 +080022static struct resource loongson_pci_io_resource = {
Ralf Baechle70342282013-01-22 12:59:30 +010023 .name = "pci io space",
24 .start = LOONGSON_PCI_IO_START,
25 .end = IO_SPACE_LIMIT,
26 .flags = IORESOURCE_IO,
Songmao Tian42d226c2007-06-06 14:52:38 +080027};
28
Wu Zhangjin85749d22009-07-02 23:26:45 +080029static struct pci_controller loongson_pci_controller = {
Ralf Baechle70342282013-01-22 12:59:30 +010030 .pci_ops = &loongson_pci_ops,
31 .io_resource = &loongson_pci_io_resource,
32 .mem_resource = &loongson_pci_mem_resource,
33 .mem_offset = 0x00000000UL,
34 .io_offset = 0x00000000UL,
Songmao Tian42d226c2007-06-06 14:52:38 +080035};
36
Wu Zhangjinf7face02009-07-02 23:23:30 +080037static void __init setup_pcimap(void)
Songmao Tian42d226c2007-06-06 14:52:38 +080038{
39 /*
Wu Zhangjinf7face02009-07-02 23:23:30 +080040 * local to PCI mapping for CPU accessing PCI space
Songmao Tian42d226c2007-06-06 14:52:38 +080041 * CPU address space [256M,448M] is window for accessing pci space
Wu Zhangjinf7face02009-07-02 23:23:30 +080042 * we set pcimap_lo[0,1,2] to map it to pci space[0M,64M], [320M,448M]
43 *
44 * pcimap: PCI_MAP2 PCI_Mem_Lo2 PCI_Mem_Lo1 PCI_Mem_Lo0
Ralf Baechle70342282013-01-22 12:59:30 +010045 * [<2G] [384M,448M] [320M,384M] [0M,64M]
Songmao Tian42d226c2007-06-06 14:52:38 +080046 */
Wu Zhangjine2fee572009-10-16 14:17:19 +080047 LOONGSON_PCIMAP = LOONGSON_PCIMAP_PCIMAP_2 |
48 LOONGSON_PCIMAP_WIN(2, LOONGSON_PCILO2_BASE) |
49 LOONGSON_PCIMAP_WIN(1, LOONGSON_PCILO1_BASE) |
50 LOONGSON_PCIMAP_WIN(0, 0);
Songmao Tian42d226c2007-06-06 14:52:38 +080051
52 /*
Wu Zhangjinf7face02009-07-02 23:23:30 +080053 * PCI-DMA to local mapping: [2G,2G+256M] -> [0M,256M]
Songmao Tian42d226c2007-06-06 14:52:38 +080054 */
Wu Zhangjine2fee572009-10-16 14:17:19 +080055 LOONGSON_PCIBASE0 = 0x80000000ul; /* base: 2G -> mmap: 0M */
Wu Zhangjinf7face02009-07-02 23:23:30 +080056 /* size: 256M, burst transmission, pre-fetch enable, 64bit */
57 LOONGSON_PCI_HIT0_SEL_L = 0xc000000cul;
58 LOONGSON_PCI_HIT0_SEL_H = 0xfffffffful;
59 LOONGSON_PCI_HIT1_SEL_L = 0x00000006ul; /* set this BAR as invalid */
60 LOONGSON_PCI_HIT1_SEL_H = 0x00000000ul;
61 LOONGSON_PCI_HIT2_SEL_L = 0x00000006ul; /* set this BAR as invalid */
62 LOONGSON_PCI_HIT2_SEL_H = 0x00000000ul;
Songmao Tian42d226c2007-06-06 14:52:38 +080063
Wu Zhangjinf7face02009-07-02 23:23:30 +080064 /* avoid deadlock of PCI reading/writing lock operation */
65 LOONGSON_PCI_ISR4C = 0xd2000001ul;
66
67 /* can not change gnt to break pci transfer when device's gnt not
68 deassert for some broken device */
69 LOONGSON_PXARB_CFG = 0x00fe0105ul;
Wu Zhangjin6f7a2512009-11-06 18:45:05 +080070
Wu Zhangjin55045ff2009-11-11 13:39:12 +080071#ifdef CONFIG_CPU_SUPPORTS_ADDRWINCFG
Wu Zhangjin6f7a2512009-11-06 18:45:05 +080072 /*
73 * set cpu addr window2 to map CPU address space to PCI address space
74 */
75 LOONGSON_ADDRWIN_CPUTOPCI(ADDRWIN_WIN2, LOONGSON_CPU_MEM_SRC,
76 LOONGSON_PCI_MEM_DST, MMAP_CPUTOPCI_SIZE);
77#endif
Songmao Tian42d226c2007-06-06 14:52:38 +080078}
79
80static int __init pcibios_init(void)
81{
Wu Zhangjinf7face02009-07-02 23:23:30 +080082 setup_pcimap();
Zhang Le3a639132008-10-27 23:33:24 +000083
Wu Zhangjin85749d22009-07-02 23:26:45 +080084 loongson_pci_controller.io_map_base = mips_io_port_base;
Zhang Le3a639132008-10-27 23:33:24 +000085
Wu Zhangjin85749d22009-07-02 23:26:45 +080086 register_pci_controller(&loongson_pci_controller);
Songmao Tian42d226c2007-06-06 14:52:38 +080087
88 return 0;
89}
90
91arch_initcall(pcibios_init);