Stephen Warren | c80efba | 2012-04-20 16:57:38 -0600 | [diff] [blame] | 1 | /dts-v1/; |
| 2 | |
| 3 | /include/ "tegra20.dtsi" |
| 4 | |
| 5 | / { |
Bryan Wu | 8fef5df | 2012-12-20 09:41:29 +0000 | [diff] [blame] | 6 | model = "NVIDIA Tegra20 Whistler evaluation board"; |
Stephen Warren | c80efba | 2012-04-20 16:57:38 -0600 | [diff] [blame] | 7 | compatible = "nvidia,whistler", "nvidia,tegra20"; |
| 8 | |
| 9 | memory { |
| 10 | reg = <0x00000000 0x20000000>; |
| 11 | }; |
| 12 | |
Stephen Warren | 2658ef1 | 2012-11-16 10:53:04 -0700 | [diff] [blame] | 13 | host1x { |
| 14 | hdmi { |
| 15 | status = "okay"; |
| 16 | |
| 17 | vdd-supply = <&hdmi_vdd_reg>; |
| 18 | pll-supply = <&hdmi_pll_reg>; |
| 19 | |
| 20 | nvidia,ddc-i2c-bus = <&hdmi_ddc>; |
| 21 | nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */ |
| 22 | }; |
| 23 | }; |
| 24 | |
Stephen Warren | c80efba | 2012-04-20 16:57:38 -0600 | [diff] [blame] | 25 | pinmux { |
| 26 | pinctrl-names = "default"; |
| 27 | pinctrl-0 = <&state_default>; |
| 28 | |
| 29 | state_default: pinmux { |
| 30 | ata { |
| 31 | nvidia,pins = "ata", "atb", "ate", "gma", "gmb", |
| 32 | "gmc", "gmd", "gpu"; |
| 33 | nvidia,function = "gmi"; |
| 34 | }; |
| 35 | atc { |
| 36 | nvidia,pins = "atc", "atd"; |
| 37 | nvidia,function = "sdio4"; |
| 38 | }; |
| 39 | cdev1 { |
| 40 | nvidia,pins = "cdev1"; |
| 41 | nvidia,function = "plla_out"; |
| 42 | }; |
| 43 | cdev2 { |
| 44 | nvidia,pins = "cdev2"; |
| 45 | nvidia,function = "osc"; |
| 46 | }; |
| 47 | crtp { |
| 48 | nvidia,pins = "crtp"; |
| 49 | nvidia,function = "crt"; |
| 50 | }; |
| 51 | csus { |
| 52 | nvidia,pins = "csus"; |
| 53 | nvidia,function = "vi_sensor_clk"; |
| 54 | }; |
| 55 | dap1 { |
| 56 | nvidia,pins = "dap1"; |
| 57 | nvidia,function = "dap1"; |
| 58 | }; |
| 59 | dap2 { |
| 60 | nvidia,pins = "dap2"; |
| 61 | nvidia,function = "dap2"; |
| 62 | }; |
| 63 | dap3 { |
| 64 | nvidia,pins = "dap3"; |
| 65 | nvidia,function = "dap3"; |
| 66 | }; |
| 67 | dap4 { |
| 68 | nvidia,pins = "dap4"; |
| 69 | nvidia,function = "dap4"; |
| 70 | }; |
| 71 | ddc { |
| 72 | nvidia,pins = "ddc"; |
| 73 | nvidia,function = "i2c2"; |
| 74 | }; |
| 75 | dta { |
| 76 | nvidia,pins = "dta", "dtb", "dtc", "dtd"; |
| 77 | nvidia,function = "vi"; |
| 78 | }; |
| 79 | dte { |
| 80 | nvidia,pins = "dte"; |
| 81 | nvidia,function = "rsvd1"; |
| 82 | }; |
| 83 | dtf { |
| 84 | nvidia,pins = "dtf"; |
| 85 | nvidia,function = "i2c3"; |
| 86 | }; |
| 87 | gme { |
| 88 | nvidia,pins = "gme"; |
| 89 | nvidia,function = "dap5"; |
| 90 | }; |
| 91 | gpu7 { |
| 92 | nvidia,pins = "gpu7"; |
| 93 | nvidia,function = "rtck"; |
| 94 | }; |
| 95 | gpv { |
| 96 | nvidia,pins = "gpv"; |
| 97 | nvidia,function = "pcie"; |
| 98 | }; |
| 99 | hdint { |
| 100 | nvidia,pins = "hdint", "pta"; |
| 101 | nvidia,function = "hdmi"; |
| 102 | }; |
| 103 | i2cp { |
| 104 | nvidia,pins = "i2cp"; |
| 105 | nvidia,function = "i2cp"; |
| 106 | }; |
| 107 | irrx { |
| 108 | nvidia,pins = "irrx", "irtx"; |
| 109 | nvidia,function = "uartb"; |
| 110 | }; |
| 111 | kbca { |
| 112 | nvidia,pins = "kbca", "kbcc", "kbce", "kbcf"; |
| 113 | nvidia,function = "kbc"; |
| 114 | }; |
| 115 | kbcb { |
| 116 | nvidia,pins = "kbcb", "kbcd"; |
| 117 | nvidia,function = "sdio2"; |
| 118 | }; |
| 119 | lcsn { |
| 120 | nvidia,pins = "lcsn", "lsck", "lsda", "lsdi", |
| 121 | "spia", "spib", "spic"; |
| 122 | nvidia,function = "spi3"; |
| 123 | }; |
| 124 | ld0 { |
| 125 | nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4", |
| 126 | "ld5", "ld6", "ld7", "ld8", "ld9", |
| 127 | "ld10", "ld11", "ld12", "ld13", "ld14", |
| 128 | "ld15", "ld16", "ld17", "ldc", "ldi", |
| 129 | "lhp0", "lhp1", "lhp2", "lhs", "lm0", |
| 130 | "lm1", "lpp", "lpw0", "lpw1", "lpw2", |
| 131 | "lsc0", "lsc1", "lspi", "lvp0", "lvp1", |
| 132 | "lvs"; |
| 133 | nvidia,function = "displaya"; |
| 134 | }; |
| 135 | owc { |
| 136 | nvidia,pins = "owc", "uac"; |
| 137 | nvidia,function = "owr"; |
| 138 | }; |
| 139 | pmc { |
| 140 | nvidia,pins = "pmc"; |
| 141 | nvidia,function = "pwr_on"; |
| 142 | }; |
| 143 | rm { |
| 144 | nvidia,pins = "rm"; |
| 145 | nvidia,function = "i2c1"; |
| 146 | }; |
| 147 | sdb { |
| 148 | nvidia,pins = "sdb", "sdc", "sdd", "slxa", |
| 149 | "slxc", "slxd", "slxk"; |
| 150 | nvidia,function = "sdio3"; |
| 151 | }; |
| 152 | sdio1 { |
| 153 | nvidia,pins = "sdio1"; |
| 154 | nvidia,function = "sdio1"; |
| 155 | }; |
| 156 | spdi { |
| 157 | nvidia,pins = "spdi", "spdo"; |
| 158 | nvidia,function = "rsvd2"; |
| 159 | }; |
| 160 | spid { |
| 161 | nvidia,pins = "spid", "spie", "spig", "spih"; |
| 162 | nvidia,function = "spi2_alt"; |
| 163 | }; |
| 164 | spif { |
| 165 | nvidia,pins = "spif"; |
| 166 | nvidia,function = "spi2"; |
| 167 | }; |
| 168 | uaa { |
| 169 | nvidia,pins = "uaa", "uab"; |
| 170 | nvidia,function = "uarta"; |
| 171 | }; |
| 172 | uad { |
| 173 | nvidia,pins = "uad"; |
| 174 | nvidia,function = "irda"; |
| 175 | }; |
| 176 | uca { |
| 177 | nvidia,pins = "uca", "ucb"; |
| 178 | nvidia,function = "uartc"; |
| 179 | }; |
| 180 | uda { |
| 181 | nvidia,pins = "uda"; |
| 182 | nvidia,function = "spi1"; |
| 183 | }; |
| 184 | conf_ata { |
| 185 | nvidia,pins = "ata", "atb", "atc", "ddc", "gma", |
| 186 | "gmb", "gmc", "gmd", "irrx", "irtx", |
| 187 | "kbca", "kbcb", "kbcc", "kbcd", "kbce", |
| 188 | "kbcf", "sdc", "sdd", "spie", "spig", |
| 189 | "spih", "uaa", "uab", "uad", "uca", |
| 190 | "ucb"; |
| 191 | nvidia,pull = <2>; |
| 192 | nvidia,tristate = <0>; |
| 193 | }; |
| 194 | conf_atd { |
| 195 | nvidia,pins = "atd", "ate", "cdev1", "csus", |
| 196 | "dap1", "dap2", "dap3", "dap4", "dte", |
| 197 | "dtf", "gpu", "gpu7", "gpv", "i2cp", |
| 198 | "rm", "sdio1", "slxa", "slxc", "slxd", |
| 199 | "slxk", "spdi", "spdo", "uac", "uda"; |
| 200 | nvidia,pull = <0>; |
| 201 | nvidia,tristate = <0>; |
| 202 | }; |
| 203 | conf_cdev2 { |
| 204 | nvidia,pins = "cdev2", "spia", "spib"; |
| 205 | nvidia,pull = <1>; |
| 206 | nvidia,tristate = <1>; |
| 207 | }; |
| 208 | conf_ck32 { |
| 209 | nvidia,pins = "ck32", "ddrc", "lc", "pmca", |
| 210 | "pmcb", "pmcc", "pmcd", "xm2c", |
| 211 | "xm2d"; |
| 212 | nvidia,pull = <0>; |
| 213 | }; |
| 214 | conf_crtp { |
| 215 | nvidia,pins = "crtp"; |
| 216 | nvidia,pull = <0>; |
| 217 | nvidia,tristate = <1>; |
| 218 | }; |
| 219 | conf_dta { |
| 220 | nvidia,pins = "dta", "dtb", "dtc", "dtd", |
| 221 | "spid", "spif"; |
| 222 | nvidia,pull = <1>; |
| 223 | nvidia,tristate = <0>; |
| 224 | }; |
| 225 | conf_gme { |
| 226 | nvidia,pins = "gme", "owc", "pta", "spic"; |
| 227 | nvidia,pull = <2>; |
| 228 | nvidia,tristate = <1>; |
| 229 | }; |
| 230 | conf_ld17_0 { |
| 231 | nvidia,pins = "ld17_0", "ld19_18", "ld21_20", |
| 232 | "ld23_22"; |
| 233 | nvidia,pull = <1>; |
| 234 | }; |
| 235 | conf_ls { |
| 236 | nvidia,pins = "ls", "pmce"; |
| 237 | nvidia,pull = <2>; |
| 238 | }; |
| 239 | drive_dap1 { |
| 240 | nvidia,pins = "drive_dap1"; |
| 241 | nvidia,high-speed-mode = <0>; |
| 242 | nvidia,schmitt = <1>; |
| 243 | nvidia,low-power-mode = <0>; |
| 244 | nvidia,pull-down-strength = <0>; |
| 245 | nvidia,pull-up-strength = <0>; |
| 246 | nvidia,slew-rate-rising = <0>; |
| 247 | nvidia,slew-rate-falling = <0>; |
| 248 | }; |
| 249 | }; |
| 250 | }; |
| 251 | |
| 252 | i2s@70002800 { |
| 253 | status = "okay"; |
| 254 | }; |
| 255 | |
| 256 | serial@70006000 { |
| 257 | status = "okay"; |
Stephen Warren | c80efba | 2012-04-20 16:57:38 -0600 | [diff] [blame] | 258 | }; |
| 259 | |
Stephen Warren | 2658ef1 | 2012-11-16 10:53:04 -0700 | [diff] [blame] | 260 | hdmi_ddc: i2c@7000c400 { |
| 261 | status = "okay"; |
| 262 | clock-frequency = <100000>; |
| 263 | }; |
| 264 | |
Stephen Warren | c80efba | 2012-04-20 16:57:38 -0600 | [diff] [blame] | 265 | i2c@7000d000 { |
| 266 | status = "okay"; |
| 267 | clock-frequency = <100000>; |
| 268 | |
| 269 | codec: codec@1a { |
| 270 | compatible = "wlf,wm8753"; |
| 271 | reg = <0x1a>; |
| 272 | }; |
| 273 | |
| 274 | tca6416: gpio@20 { |
| 275 | compatible = "ti,tca6416"; |
| 276 | reg = <0x20>; |
| 277 | gpio-controller; |
| 278 | #gpio-cells = <2>; |
| 279 | }; |
Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 280 | |
| 281 | max8907@3c { |
| 282 | compatible = "maxim,max8907"; |
| 283 | reg = <0x3c>; |
| 284 | interrupts = <0 86 0x4>; |
| 285 | |
Stephen Warren | b37ed4a | 2012-09-11 13:13:05 -0600 | [diff] [blame] | 286 | maxim,system-power-controller; |
| 287 | |
Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 288 | mbatt-supply = <&usb0_vbus_reg>; |
| 289 | in-v1-supply = <&mbatt_reg>; |
| 290 | in-v2-supply = <&mbatt_reg>; |
| 291 | in-v3-supply = <&mbatt_reg>; |
| 292 | in1-supply = <&mbatt_reg>; |
| 293 | in2-supply = <&nvvdd_sv3_reg>; |
| 294 | in3-supply = <&mbatt_reg>; |
| 295 | in4-supply = <&mbatt_reg>; |
| 296 | in5-supply = <&mbatt_reg>; |
| 297 | in6-supply = <&mbatt_reg>; |
| 298 | in7-supply = <&mbatt_reg>; |
| 299 | in8-supply = <&mbatt_reg>; |
| 300 | in9-supply = <&mbatt_reg>; |
| 301 | in10-supply = <&mbatt_reg>; |
| 302 | in11-supply = <&mbatt_reg>; |
| 303 | in12-supply = <&mbatt_reg>; |
| 304 | in13-supply = <&mbatt_reg>; |
| 305 | in14-supply = <&mbatt_reg>; |
| 306 | in15-supply = <&mbatt_reg>; |
| 307 | in16-supply = <&mbatt_reg>; |
| 308 | in17-supply = <&nvvdd_sv3_reg>; |
| 309 | in18-supply = <&nvvdd_sv3_reg>; |
| 310 | in19-supply = <&mbatt_reg>; |
| 311 | in20-supply = <&mbatt_reg>; |
| 312 | |
| 313 | regulators { |
Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 314 | mbatt_reg: mbatt { |
Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 315 | regulator-name = "vbat_pmu"; |
| 316 | regulator-always-on; |
| 317 | }; |
| 318 | |
Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 319 | sd1 { |
Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 320 | regulator-name = "nvvdd_sv1,vdd_cpu_pmu"; |
| 321 | regulator-min-microvolt = <1000000>; |
| 322 | regulator-max-microvolt = <1000000>; |
| 323 | regulator-always-on; |
| 324 | }; |
| 325 | |
Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 326 | sd2 { |
Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 327 | regulator-name = "nvvdd_sv2,vdd_core"; |
| 328 | regulator-min-microvolt = <1200000>; |
| 329 | regulator-max-microvolt = <1200000>; |
| 330 | regulator-always-on; |
| 331 | }; |
| 332 | |
Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 333 | nvvdd_sv3_reg: sd3 { |
Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 334 | regulator-name = "nvvdd_sv3"; |
| 335 | regulator-min-microvolt = <1800000>; |
| 336 | regulator-max-microvolt = <1800000>; |
| 337 | regulator-always-on; |
| 338 | }; |
| 339 | |
Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 340 | ldo1 { |
Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 341 | regulator-name = "nvvdd_ldo1,vddio_rx_ddr,vcore_acc"; |
| 342 | regulator-min-microvolt = <3300000>; |
| 343 | regulator-max-microvolt = <3300000>; |
| 344 | regulator-always-on; |
| 345 | }; |
| 346 | |
Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 347 | ldo2 { |
Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 348 | regulator-name = "nvvdd_ldo2,avdd_pll*"; |
| 349 | regulator-min-microvolt = <1100000>; |
| 350 | regulator-max-microvolt = <1100000>; |
| 351 | regulator-always-on; |
| 352 | }; |
| 353 | |
Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 354 | ldo3 { |
Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 355 | regulator-name = "nvvdd_ldo3,vcom_1v8b"; |
| 356 | regulator-min-microvolt = <1800000>; |
| 357 | regulator-max-microvolt = <1800000>; |
| 358 | regulator-always-on; |
| 359 | }; |
| 360 | |
Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 361 | ldo4 { |
Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 362 | regulator-name = "nvvdd_ldo4,avdd_usb*"; |
| 363 | regulator-min-microvolt = <3300000>; |
| 364 | regulator-max-microvolt = <3300000>; |
| 365 | regulator-always-on; |
| 366 | }; |
| 367 | |
Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 368 | ldo5 { |
Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 369 | regulator-name = "nvvdd_ldo5,vcore_mmc,avdd_lcd1,vddio_1wire"; |
| 370 | regulator-min-microvolt = <2800000>; |
| 371 | regulator-max-microvolt = <2800000>; |
| 372 | regulator-always-on; |
| 373 | }; |
| 374 | |
Stephen Warren | 2658ef1 | 2012-11-16 10:53:04 -0700 | [diff] [blame] | 375 | hdmi_pll_reg: ldo6 { |
Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 376 | regulator-name = "nvvdd_ldo6,avdd_hdmi_pll"; |
| 377 | regulator-min-microvolt = <1800000>; |
| 378 | regulator-max-microvolt = <1800000>; |
| 379 | }; |
| 380 | |
Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 381 | ldo7 { |
Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 382 | regulator-name = "nvvdd_ldo7,avddio_audio"; |
| 383 | regulator-min-microvolt = <2800000>; |
| 384 | regulator-max-microvolt = <2800000>; |
| 385 | regulator-always-on; |
| 386 | }; |
| 387 | |
Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 388 | ldo8 { |
Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 389 | regulator-name = "nvvdd_ldo8,vcom_3v0,vcore_cmps"; |
| 390 | regulator-min-microvolt = <3000000>; |
| 391 | regulator-max-microvolt = <3000000>; |
| 392 | }; |
| 393 | |
Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 394 | ldo9 { |
Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 395 | regulator-name = "nvvdd_ldo9,avdd_cam*"; |
| 396 | regulator-min-microvolt = <2800000>; |
| 397 | regulator-max-microvolt = <2800000>; |
| 398 | }; |
| 399 | |
Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 400 | ldo10 { |
Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 401 | regulator-name = "nvvdd_ldo10,avdd_usb_ic_3v0"; |
| 402 | regulator-min-microvolt = <3000000>; |
| 403 | regulator-max-microvolt = <3000000>; |
| 404 | regulator-always-on; |
| 405 | }; |
| 406 | |
Stephen Warren | 2658ef1 | 2012-11-16 10:53:04 -0700 | [diff] [blame] | 407 | hdmi_vdd_reg: ldo11 { |
Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 408 | regulator-name = "nvvdd_ldo11,vddio_pex_clk,vcom_33,avdd_hdmi"; |
| 409 | regulator-min-microvolt = <3300000>; |
| 410 | regulator-max-microvolt = <3300000>; |
| 411 | }; |
| 412 | |
Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 413 | ldo12 { |
Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 414 | regulator-name = "nvvdd_ldo12,vddio_sdio"; |
| 415 | regulator-min-microvolt = <2800000>; |
| 416 | regulator-max-microvolt = <2800000>; |
| 417 | regulator-always-on; |
| 418 | }; |
| 419 | |
Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 420 | ldo13 { |
Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 421 | regulator-name = "nvvdd_ldo13,vcore_phtn,vdd_af"; |
| 422 | regulator-min-microvolt = <2800000>; |
| 423 | regulator-max-microvolt = <2800000>; |
| 424 | }; |
| 425 | |
Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 426 | ldo14 { |
Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 427 | regulator-name = "nvvdd_ldo14,avdd_vdac"; |
| 428 | regulator-min-microvolt = <2800000>; |
| 429 | regulator-max-microvolt = <2800000>; |
| 430 | }; |
| 431 | |
Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 432 | ldo15 { |
Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 433 | regulator-name = "nvvdd_ldo15,vcore_temp,vddio_hdcp"; |
| 434 | regulator-min-microvolt = <3300000>; |
| 435 | regulator-max-microvolt = <3300000>; |
| 436 | }; |
| 437 | |
Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 438 | ldo16 { |
Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 439 | regulator-name = "nvvdd_ldo16,vdd_dbrtr"; |
| 440 | regulator-min-microvolt = <1300000>; |
| 441 | regulator-max-microvolt = <1300000>; |
| 442 | }; |
| 443 | |
Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 444 | ldo17 { |
Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 445 | regulator-name = "nvvdd_ldo17,vddio_mipi"; |
| 446 | regulator-min-microvolt = <1200000>; |
| 447 | regulator-max-microvolt = <1200000>; |
| 448 | }; |
| 449 | |
Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 450 | ldo18 { |
Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 451 | regulator-name = "nvvdd_ldo18,vddio_vi,vcore_cam*"; |
| 452 | regulator-min-microvolt = <1800000>; |
| 453 | regulator-max-microvolt = <1800000>; |
| 454 | }; |
| 455 | |
Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 456 | ldo19 { |
Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 457 | regulator-name = "nvvdd_ldo19,avdd_lcd2,vddio_lx"; |
| 458 | regulator-min-microvolt = <2800000>; |
| 459 | regulator-max-microvolt = <2800000>; |
| 460 | }; |
| 461 | |
Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 462 | ldo20 { |
Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 463 | regulator-name = "nvvdd_ldo20,vddio_ddr_1v2,vddio_hsic,vcom_1v2"; |
| 464 | regulator-min-microvolt = <1200000>; |
| 465 | regulator-max-microvolt = <1200000>; |
| 466 | regulator-always-on; |
| 467 | }; |
| 468 | |
Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 469 | out5v { |
Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 470 | regulator-name = "usb0_vbus_reg"; |
| 471 | }; |
| 472 | |
Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 473 | out33v { |
Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 474 | regulator-name = "pmu_out3v3"; |
| 475 | }; |
| 476 | |
Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 477 | bbat { |
Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 478 | regulator-name = "pmu_bbat"; |
| 479 | regulator-min-microvolt = <2400000>; |
| 480 | regulator-max-microvolt = <2400000>; |
| 481 | regulator-always-on; |
| 482 | }; |
| 483 | |
Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 484 | sdby { |
Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 485 | regulator-name = "vdd_aon"; |
| 486 | regulator-always-on; |
| 487 | }; |
| 488 | |
Stephen Warren | b9c665d | 2012-09-20 17:04:06 -0600 | [diff] [blame] | 489 | vrtc { |
Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 490 | regulator-name = "vrtc,pmu_vccadc"; |
| 491 | regulator-always-on; |
| 492 | }; |
| 493 | }; |
| 494 | }; |
| 495 | }; |
| 496 | |
| 497 | pmc { |
| 498 | nvidia,invert-interrupt; |
Joseph Lo | a44a019 | 2013-04-03 19:31:52 +0800 | [diff] [blame] | 499 | nvidia,suspend-mode = <2>; |
| 500 | nvidia,cpu-pwr-good-time = <2000>; |
| 501 | nvidia,cpu-pwr-off-time = <1000>; |
| 502 | nvidia,core-pwr-good-time = <0 3845>; |
| 503 | nvidia,core-pwr-off-time = <93727>; |
| 504 | nvidia,core-power-req-active-high; |
| 505 | nvidia,sys-clock-req-active-high; |
| 506 | nvidia,combined-power-req; |
Stephen Warren | c80efba | 2012-04-20 16:57:38 -0600 | [diff] [blame] | 507 | }; |
| 508 | |
| 509 | usb@c5000000 { |
| 510 | status = "okay"; |
| 511 | nvidia,vbus-gpio = <&tca6416 0 0>; /* GPIO_PMU0 */ |
| 512 | }; |
| 513 | |
Venu Byravarasu | 4c94c8b | 2013-05-16 19:42:57 +0530 | [diff] [blame^] | 514 | usb-phy@c5000000 { |
| 515 | status = "okay"; |
| 516 | vbus-supply = <&vbus1_reg>; |
| 517 | }; |
| 518 | |
Stephen Warren | c80efba | 2012-04-20 16:57:38 -0600 | [diff] [blame] | 519 | usb@c5008000 { |
| 520 | status = "okay"; |
| 521 | nvidia,vbus-gpio = <&tca6416 1 0>; /* GPIO_PMU1 */ |
| 522 | }; |
| 523 | |
Venu Byravarasu | 4c94c8b | 2013-05-16 19:42:57 +0530 | [diff] [blame^] | 524 | usb-phy@c5008000 { |
| 525 | status = "okay"; |
| 526 | vbus-supply = <&vbus3_reg>; |
| 527 | }; |
| 528 | |
Stephen Warren | c80efba | 2012-04-20 16:57:38 -0600 | [diff] [blame] | 529 | sdhci@c8000400 { |
| 530 | status = "okay"; |
Joseph Lo | 908ab93 | 2013-02-22 11:23:39 +0800 | [diff] [blame] | 531 | cd-gpios = <&gpio 69 1>; /* gpio PI5 */ |
Stephen Warren | c80efba | 2012-04-20 16:57:38 -0600 | [diff] [blame] | 532 | wp-gpios = <&gpio 173 0>; /* gpio PV5 */ |
| 533 | bus-width = <8>; |
| 534 | }; |
| 535 | |
| 536 | sdhci@c8000600 { |
| 537 | status = "okay"; |
| 538 | bus-width = <8>; |
Joseph Lo | 7a2617a | 2013-04-03 14:34:39 -0600 | [diff] [blame] | 539 | non-removable; |
Stephen Warren | c80efba | 2012-04-20 16:57:38 -0600 | [diff] [blame] | 540 | }; |
| 541 | |
Joseph Lo | 7021d12 | 2013-04-03 19:31:27 +0800 | [diff] [blame] | 542 | clocks { |
| 543 | compatible = "simple-bus"; |
| 544 | #address-cells = <1>; |
| 545 | #size-cells = <0>; |
| 546 | |
| 547 | clk32k_in: clock { |
| 548 | compatible = "fixed-clock"; |
| 549 | reg=<0>; |
| 550 | #clock-cells = <0>; |
| 551 | clock-frequency = <32768>; |
| 552 | }; |
| 553 | }; |
| 554 | |
Laxman Dewangan | 3a5c64d | 2013-01-18 11:28:43 +0530 | [diff] [blame] | 555 | kbc { |
| 556 | status = "okay"; |
| 557 | nvidia,debounce-delay-ms = <20>; |
| 558 | nvidia,repeat-delay-ms = <160>; |
| 559 | nvidia,kbc-row-pins = <0 1 2>; |
| 560 | nvidia,kbc-col-pins = <16 17>; |
Joseph Lo | 9be1e13 | 2013-04-03 19:31:49 +0800 | [diff] [blame] | 561 | nvidia,wakeup-source; |
Laxman Dewangan | 3a5c64d | 2013-01-18 11:28:43 +0530 | [diff] [blame] | 562 | linux,keymap = <0x00000074 /* KEY_POWER */ |
| 563 | 0x01000066 /* KEY_HOME */ |
| 564 | 0x0101009E /* KEY_BACK */ |
| 565 | 0x0201008B>; /* KEY_MENU */ |
| 566 | }; |
| 567 | |
Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 568 | regulators { |
| 569 | compatible = "simple-bus"; |
| 570 | #address-cells = <1>; |
| 571 | #size-cells = <0>; |
| 572 | |
| 573 | usb0_vbus_reg: regulator { |
| 574 | compatible = "regulator-fixed"; |
| 575 | reg = <0>; |
| 576 | regulator-name = "usb0_vbus"; |
| 577 | regulator-min-microvolt = <5000000>; |
| 578 | regulator-max-microvolt = <5000000>; |
| 579 | regulator-always-on; |
| 580 | }; |
Venu Byravarasu | 4c94c8b | 2013-05-16 19:42:57 +0530 | [diff] [blame^] | 581 | |
| 582 | vbus1_reg: regulator@2 { |
| 583 | compatible = "regulator-fixed"; |
| 584 | reg = <2>; |
| 585 | regulator-name = "vbus1"; |
| 586 | regulator-min-microvolt = <5000000>; |
| 587 | regulator-max-microvolt = <5000000>; |
| 588 | gpio = <&tca6416 0 0>; /* GPIO_PMU0 */ |
| 589 | }; |
| 590 | |
| 591 | vbus3_reg: regulator@3 { |
| 592 | compatible = "regulator-fixed"; |
| 593 | reg = <3>; |
| 594 | regulator-name = "vbus3"; |
| 595 | regulator-min-microvolt = <5000000>; |
| 596 | regulator-max-microvolt = <5000000>; |
| 597 | gpio = <&tca6416 1 0>; /* GPIO_PMU1 */ |
| 598 | }; |
Stephen Warren | e7765b3 | 2012-06-25 16:41:25 -0600 | [diff] [blame] | 599 | }; |
| 600 | |
Stephen Warren | c80efba | 2012-04-20 16:57:38 -0600 | [diff] [blame] | 601 | sound { |
| 602 | compatible = "nvidia,tegra-audio-wm8753-whistler", |
| 603 | "nvidia,tegra-audio-wm8753"; |
| 604 | nvidia,model = "NVIDIA Tegra Whistler"; |
| 605 | |
| 606 | nvidia,audio-routing = |
| 607 | "Headphone Jack", "LOUT1", |
| 608 | "Headphone Jack", "ROUT1", |
| 609 | "MIC2", "Mic Jack", |
| 610 | "MIC2N", "Mic Jack"; |
| 611 | |
| 612 | nvidia,i2s-controller = <&tegra_i2s1>; |
| 613 | nvidia,audio-codec = <&codec>; |
Stephen Warren | f9cd2b3 | 2013-03-26 16:45:52 -0600 | [diff] [blame] | 614 | |
Prashant Gaikwad | 1071b2d | 2013-04-04 14:35:04 +0530 | [diff] [blame] | 615 | clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 94>; |
Stephen Warren | f9cd2b3 | 2013-03-26 16:45:52 -0600 | [diff] [blame] | 616 | clock-names = "pll_a", "pll_a_out0", "mclk"; |
Stephen Warren | c80efba | 2012-04-20 16:57:38 -0600 | [diff] [blame] | 617 | }; |
| 618 | }; |