Carlo Caione | 182f14d | 2013-11-16 18:33:53 +0100 | [diff] [blame] | 1 | * sun4i/sun7i Real Time Clock |
| 2 | |
| 3 | RTC controller for the Allwinner A10/A20 |
| 4 | |
| 5 | Required properties: |
Maxime Ripard | f49bd06 | 2014-04-03 14:50:02 -0700 | [diff] [blame] | 6 | - compatible : Should be "allwinner,sun4i-a10-rtc" or "allwinner,sun7i-a20-rtc" |
Carlo Caione | 182f14d | 2013-11-16 18:33:53 +0100 | [diff] [blame] | 7 | - reg: physical base address of the controller and length of memory mapped |
| 8 | region. |
| 9 | - interrupts: IRQ line for the RTC. |
| 10 | |
| 11 | Example: |
| 12 | |
| 13 | rtc: rtc@01c20d00 { |
Maxime Ripard | f49bd06 | 2014-04-03 14:50:02 -0700 | [diff] [blame] | 14 | compatible = "allwinner,sun4i-a10-rtc"; |
Carlo Caione | 182f14d | 2013-11-16 18:33:53 +0100 | [diff] [blame] | 15 | reg = <0x01c20d00 0x20>; |
| 16 | interrupts = <24>; |
| 17 | }; |