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Sarah Sharp66d4ead2009-04-27 19:52:28 -07001/*
2 * xHCI host controller driver PCI Bus Glue.
3 *
4 * Copyright (C) 2008 Intel Corp.
5 *
6 * Author: Sarah Sharp
7 * Some code borrowed from the Linux EHCI driver.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 * for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
23#include <linux/pci.h>
Ben Hutchings7fc2a612011-04-25 16:54:28 +010024#include <linux/slab.h>
Sarah Sharp66d4ead2009-04-27 19:52:28 -070025
26#include "xhci.h"
27
Sarah Sharpac9d8fe2009-08-07 14:04:55 -070028/* Device for a quirk */
29#define PCI_VENDOR_ID_FRESCO_LOGIC 0x1b73
30#define PCI_DEVICE_ID_FRESCO_LOGIC_PDK 0x1000
31
Sarah Sharp66d4ead2009-04-27 19:52:28 -070032static const char hcd_name[] = "xhci_hcd";
33
34/* called after powerup, by probe or system-pm "wakeup" */
35static int xhci_pci_reinit(struct xhci_hcd *xhci, struct pci_dev *pdev)
36{
37 /*
38 * TODO: Implement finding debug ports later.
39 * TODO: see if there are any quirks that need to be added to handle
40 * new extended capabilities.
41 */
42
43 /* PCI Memory-Write-Invalidate cycle support is optional (uncommon) */
44 if (!pci_set_mwi(pdev))
45 xhci_dbg(xhci, "MWI active\n");
46
47 xhci_dbg(xhci, "Finished xhci_pci_reinit\n");
48 return 0;
49}
50
51/* called during probe() after chip reset completes */
52static int xhci_pci_setup(struct usb_hcd *hcd)
53{
Sarah Sharpf6ff0ac2010-12-16 11:21:10 -080054 struct xhci_hcd *xhci;
Sarah Sharp66d4ead2009-04-27 19:52:28 -070055 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
56 int retval;
Sarah Sharp006d5822010-07-29 22:13:22 -070057 u32 temp;
Sarah Sharp66d4ead2009-04-27 19:52:28 -070058
Sarah Sharpbc88d2e2010-05-18 16:05:21 -070059 hcd->self.sg_tablesize = TRBS_PER_SEGMENT - 2;
David Vrabel4c1bd3d2009-08-24 14:44:30 +010060
Sarah Sharpf6ff0ac2010-12-16 11:21:10 -080061 if (usb_hcd_is_primary_hcd(hcd)) {
62 xhci = kzalloc(sizeof(struct xhci_hcd), GFP_KERNEL);
63 if (!xhci)
64 return -ENOMEM;
65 *((struct xhci_hcd **) hcd->hcd_priv) = xhci;
66 xhci->main_hcd = hcd;
67 /* Mark the first roothub as being USB 2.0.
68 * The xHCI driver will register the USB 3.0 roothub.
69 */
70 hcd->speed = HCD_USB2;
71 hcd->self.root_hub->speed = USB_SPEED_HIGH;
72 /*
73 * USB 2.0 roothub under xHCI has an integrated TT,
74 * (rate matching hub) as opposed to having an OHCI/UHCI
75 * companion controller.
76 */
77 hcd->has_tt = 1;
78 } else {
79 /* xHCI private pointer was set in xhci_pci_probe for the second
80 * registered roothub.
81 */
82 xhci = hcd_to_xhci(hcd);
83 temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
84 if (HCC_64BIT_ADDR(temp)) {
85 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
86 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));
87 } else {
88 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));
89 }
90 return 0;
91 }
Sarah Sharpb02d0ed2010-10-26 11:03:44 -070092
Sarah Sharp66d4ead2009-04-27 19:52:28 -070093 xhci->cap_regs = hcd->regs;
94 xhci->op_regs = hcd->regs +
95 HC_LENGTH(xhci_readl(xhci, &xhci->cap_regs->hc_capbase));
96 xhci->run_regs = hcd->regs +
97 (xhci_readl(xhci, &xhci->cap_regs->run_regs_off) & RTSOFF_MASK);
98 /* Cache read-only capability registers */
99 xhci->hcs_params1 = xhci_readl(xhci, &xhci->cap_regs->hcs_params1);
100 xhci->hcs_params2 = xhci_readl(xhci, &xhci->cap_regs->hcs_params2);
101 xhci->hcs_params3 = xhci_readl(xhci, &xhci->cap_regs->hcs_params3);
Sarah Sharpac1c1b72009-09-04 10:53:20 -0700102 xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hc_capbase);
103 xhci->hci_version = HC_VERSION(xhci->hcc_params);
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700104 xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
105 xhci_print_registers(xhci);
106
Sarah Sharpac9d8fe2009-08-07 14:04:55 -0700107 /* Look for vendor-specific quirks */
108 if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC &&
109 pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK &&
110 pdev->revision == 0x0) {
111 xhci->quirks |= XHCI_RESET_EP_QUIRK;
112 xhci_dbg(xhci, "QUIRK: Fresco Logic xHC needs configure"
113 " endpoint cmd after reset endpoint\n");
114 }
Sarah Sharp02386342010-05-24 13:25:28 -0700115 if (pdev->vendor == PCI_VENDOR_ID_NEC)
116 xhci->quirks |= XHCI_NEC_HOST;
Sarah Sharpac9d8fe2009-08-07 14:04:55 -0700117
Andiry Xuc41136b2011-03-22 17:08:14 +0800118 /* AMD PLL quirk */
119 if (pdev->vendor == PCI_VENDOR_ID_AMD && usb_amd_find_chipset_info())
120 xhci->quirks |= XHCI_AMD_PLL_FIX;
Sarah Sharpad808332011-05-25 10:43:56 -0700121 if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
122 pdev->device == PCI_DEVICE_ID_INTEL_PANTHERPOINT_XHCI) {
123 xhci->quirks |= XHCI_SPURIOUS_SUCCESS;
Sarah Sharp2cf95c12011-05-11 16:14:58 -0700124 xhci->quirks |= XHCI_EP_LIMIT_QUIRK;
125 xhci->limit_active_eps = 64;
Sarah Sharpad808332011-05-25 10:43:56 -0700126 }
Andiry Xuc41136b2011-03-22 17:08:14 +0800127
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700128 /* Make sure the HC is halted. */
129 retval = xhci_halt(xhci);
130 if (retval)
Sarah Sharpb02d0ed2010-10-26 11:03:44 -0700131 goto error;
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700132
133 xhci_dbg(xhci, "Resetting HCD\n");
134 /* Reset the internal HC memory state and registers. */
135 retval = xhci_reset(xhci);
136 if (retval)
Sarah Sharpb02d0ed2010-10-26 11:03:44 -0700137 goto error;
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700138 xhci_dbg(xhci, "Reset complete\n");
139
Sarah Sharp006d5822010-07-29 22:13:22 -0700140 temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
141 if (HCC_64BIT_ADDR(temp)) {
142 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
143 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));
144 } else {
145 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));
146 }
147
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700148 xhci_dbg(xhci, "Calling HCD init\n");
149 /* Initialize HCD and host controller data structures. */
150 retval = xhci_init(hcd);
151 if (retval)
Sarah Sharpb02d0ed2010-10-26 11:03:44 -0700152 goto error;
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700153 xhci_dbg(xhci, "Called HCD init\n");
154
155 pci_read_config_byte(pdev, XHCI_SBRN_OFFSET, &xhci->sbrn);
156 xhci_dbg(xhci, "Got SBRN %u\n", (unsigned int) xhci->sbrn);
157
158 /* Find any debug ports */
Sarah Sharpb02d0ed2010-10-26 11:03:44 -0700159 retval = xhci_pci_reinit(xhci, pdev);
160 if (!retval)
161 return retval;
162
163error:
164 kfree(xhci);
165 return retval;
166}
167
Sarah Sharpf6ff0ac2010-12-16 11:21:10 -0800168/*
169 * We need to register our own PCI probe function (instead of the USB core's
170 * function) in order to create a second roothub under xHCI.
171 */
172static int xhci_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
173{
174 int retval;
175 struct xhci_hcd *xhci;
176 struct hc_driver *driver;
177 struct usb_hcd *hcd;
178
179 driver = (struct hc_driver *)id->driver_data;
180 /* Register the USB 2.0 roothub.
181 * FIXME: USB core must know to register the USB 2.0 roothub first.
182 * This is sort of silly, because we could just set the HCD driver flags
183 * to say USB 2.0, but I'm not sure what the implications would be in
184 * the other parts of the HCD code.
185 */
186 retval = usb_hcd_pci_probe(dev, id);
187
188 if (retval)
189 return retval;
190
191 /* USB 2.0 roothub is stored in the PCI device now. */
192 hcd = dev_get_drvdata(&dev->dev);
193 xhci = hcd_to_xhci(hcd);
194 xhci->shared_hcd = usb_create_shared_hcd(driver, &dev->dev,
195 pci_name(dev), hcd);
196 if (!xhci->shared_hcd) {
197 retval = -ENOMEM;
198 goto dealloc_usb2_hcd;
199 }
200
201 /* Set the xHCI pointer before xhci_pci_setup() (aka hcd_driver.reset)
202 * is called by usb_add_hcd().
203 */
204 *((struct xhci_hcd **) xhci->shared_hcd->hcd_priv) = xhci;
205
206 retval = usb_add_hcd(xhci->shared_hcd, dev->irq,
207 IRQF_DISABLED | IRQF_SHARED);
208 if (retval)
209 goto put_usb3_hcd;
210 /* Roothub already marked as USB 3.0 speed */
211 return 0;
212
213put_usb3_hcd:
214 usb_put_hcd(xhci->shared_hcd);
215dealloc_usb2_hcd:
216 usb_hcd_pci_remove(dev);
217 return retval;
218}
219
Sarah Sharpb02d0ed2010-10-26 11:03:44 -0700220static void xhci_pci_remove(struct pci_dev *dev)
221{
222 struct xhci_hcd *xhci;
223
224 xhci = hcd_to_xhci(pci_get_drvdata(dev));
Sarah Sharpf6ff0ac2010-12-16 11:21:10 -0800225 if (xhci->shared_hcd) {
226 usb_remove_hcd(xhci->shared_hcd);
227 usb_put_hcd(xhci->shared_hcd);
228 }
Sarah Sharpb02d0ed2010-10-26 11:03:44 -0700229 usb_hcd_pci_remove(dev);
230 kfree(xhci);
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700231}
232
Andiry Xu5535b1d52010-10-14 07:23:06 -0700233#ifdef CONFIG_PM
234static int xhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup)
235{
236 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
237 int retval = 0;
238
Sarah Sharpb32093792011-03-07 11:24:07 -0800239 if (hcd->state != HC_STATE_SUSPENDED ||
240 xhci->shared_hcd->state != HC_STATE_SUSPENDED)
Andiry Xu5535b1d52010-10-14 07:23:06 -0700241 return -EINVAL;
242
243 retval = xhci_suspend(xhci);
244
245 return retval;
246}
247
248static int xhci_pci_resume(struct usb_hcd *hcd, bool hibernated)
249{
250 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
Sarah Sharp69e848c2011-02-22 09:57:15 -0800251 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
Andiry Xu5535b1d52010-10-14 07:23:06 -0700252 int retval = 0;
253
Sarah Sharp69e848c2011-02-22 09:57:15 -0800254 /* The BIOS on systems with the Intel Panther Point chipset may or may
255 * not support xHCI natively. That means that during system resume, it
256 * may switch the ports back to EHCI so that users can use their
257 * keyboard to select a kernel from GRUB after resume from hibernate.
258 *
259 * The BIOS is supposed to remember whether the OS had xHCI ports
260 * enabled before resume, and switch the ports back to xHCI when the
261 * BIOS/OS semaphore is written, but we all know we can't trust BIOS
262 * writers.
263 *
264 * Unconditionally switch the ports back to xHCI after a system resume.
265 * We can't tell whether the EHCI or xHCI controller will be resumed
266 * first, so we have to do the port switchover in both drivers. Writing
267 * a '1' to the port switchover registers should have no effect if the
268 * port was already switched over.
269 */
270 if (usb_is_intel_switchable_xhci(pdev))
271 usb_enable_xhci_ports(pdev);
272
Andiry Xu5535b1d52010-10-14 07:23:06 -0700273 retval = xhci_resume(xhci, hibernated);
274 return retval;
275}
276#endif /* CONFIG_PM */
277
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700278static const struct hc_driver xhci_pci_hc_driver = {
279 .description = hcd_name,
280 .product_desc = "xHCI Host Controller",
Sarah Sharpb02d0ed2010-10-26 11:03:44 -0700281 .hcd_priv_size = sizeof(struct xhci_hcd *),
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700282
283 /*
284 * generic hardware linkage
285 */
Sarah Sharp7f84eef2009-04-27 19:53:56 -0700286 .irq = xhci_irq,
Sarah Sharpf6ff0ac2010-12-16 11:21:10 -0800287 .flags = HCD_MEMORY | HCD_USB3 | HCD_SHARED,
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700288
289 /*
290 * basic lifecycle operations
291 */
292 .reset = xhci_pci_setup,
293 .start = xhci_run,
Andiry Xu5535b1d52010-10-14 07:23:06 -0700294#ifdef CONFIG_PM
295 .pci_suspend = xhci_pci_suspend,
296 .pci_resume = xhci_pci_resume,
297#endif
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700298 .stop = xhci_stop,
299 .shutdown = xhci_shutdown,
300
301 /*
Sarah Sharp3ffbba92009-04-27 19:57:38 -0700302 * managing i/o requests and associated device resources
303 */
Sarah Sharpd0e96f52009-04-27 19:58:01 -0700304 .urb_enqueue = xhci_urb_enqueue,
305 .urb_dequeue = xhci_urb_dequeue,
Sarah Sharp3ffbba92009-04-27 19:57:38 -0700306 .alloc_dev = xhci_alloc_dev,
307 .free_dev = xhci_free_dev,
Sarah Sharpeab1caf2010-04-05 10:55:58 -0700308 .alloc_streams = xhci_alloc_streams,
309 .free_streams = xhci_free_streams,
Sarah Sharpf94e01862009-04-27 19:58:38 -0700310 .add_endpoint = xhci_add_endpoint,
311 .drop_endpoint = xhci_drop_endpoint,
Sarah Sharpa1587d92009-07-27 12:03:15 -0700312 .endpoint_reset = xhci_endpoint_reset,
Sarah Sharpf94e01862009-04-27 19:58:38 -0700313 .check_bandwidth = xhci_check_bandwidth,
314 .reset_bandwidth = xhci_reset_bandwidth,
Sarah Sharp3ffbba92009-04-27 19:57:38 -0700315 .address_device = xhci_address_device,
Sarah Sharpb356b7c2009-09-04 10:53:24 -0700316 .update_hub_device = xhci_update_hub_device,
Andiry Xuf0615c42010-10-14 07:22:48 -0700317 .reset_device = xhci_discover_or_reset_device,
Sarah Sharp3ffbba92009-04-27 19:57:38 -0700318
319 /*
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700320 * scheduling support
321 */
322 .get_frame_number = xhci_get_frame,
323
Sarah Sharp0f2a7932009-04-27 19:57:12 -0700324 /* Root hub support */
325 .hub_control = xhci_hub_control,
326 .hub_status_data = xhci_hub_status_data,
Andiry Xu9777e3c2010-10-14 07:23:03 -0700327 .bus_suspend = xhci_bus_suspend,
328 .bus_resume = xhci_bus_resume,
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700329};
330
331/*-------------------------------------------------------------------------*/
332
333/* PCI driver selection metadata; PCI hotplugging uses this */
334static const struct pci_device_id pci_ids[] = { {
335 /* handle any USB 3.0 xHCI controller */
336 PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_XHCI, ~0),
337 .driver_data = (unsigned long) &xhci_pci_hc_driver,
338 },
339 { /* end: all zeroes */ }
340};
341MODULE_DEVICE_TABLE(pci, pci_ids);
342
343/* pci driver glue; this is a "new style" PCI driver module */
344static struct pci_driver xhci_pci_driver = {
345 .name = (char *) hcd_name,
346 .id_table = pci_ids,
347
Sarah Sharpf6ff0ac2010-12-16 11:21:10 -0800348 .probe = xhci_pci_probe,
Sarah Sharpb02d0ed2010-10-26 11:03:44 -0700349 .remove = xhci_pci_remove,
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700350 /* suspend and resume implemented later */
351
352 .shutdown = usb_hcd_pci_shutdown,
Andiry Xu5535b1d52010-10-14 07:23:06 -0700353#ifdef CONFIG_PM_SLEEP
354 .driver = {
355 .pm = &usb_hcd_pci_pm_ops
356 },
357#endif
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700358};
359
Randy Dunlap326b4812010-04-19 08:53:50 -0700360int xhci_register_pci(void)
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700361{
362 return pci_register_driver(&xhci_pci_driver);
363}
364
Randy Dunlap326b4812010-04-19 08:53:50 -0700365void xhci_unregister_pci(void)
Sarah Sharp66d4ead2009-04-27 19:52:28 -0700366{
367 pci_unregister_driver(&xhci_pci_driver);
368}