Vineet Gupta | 7ec9f34 | 2016-01-01 18:48:40 +0530 | [diff] [blame] | 1 | Synopsys ARC Local Timer with Interrupt Capabilities |
| 2 | - Found on all ARC CPUs (ARC700/ARCHS) |
| 3 | - Can be optionally programmed to interrupt on Limit |
| 4 | - Two idential copies TIMER0 and TIMER1 exist in ARC cores and historically |
| 5 | TIMER0 used as clockevent provider (true for all ARC cores) |
| 6 | TIMER1 used for clocksource (mandatory for ARC700, optional for ARC HS) |
| 7 | |
| 8 | Required properties: |
| 9 | |
| 10 | - compatible : should be "snps,arc-timer" |
| 11 | - interrupts : single Interrupt going into parent intc |
| 12 | (16 for ARCHS cores, 3 for ARC700 cores) |
| 13 | - clocks : phandle to the source clock |
| 14 | |
| 15 | Optional properties: |
| 16 | |
| 17 | - interrupt-parent : phandle to parent intc |
| 18 | |
| 19 | Example: |
| 20 | |
| 21 | timer0 { |
| 22 | compatible = "snps,arc-timer"; |
| 23 | interrupts = <3>; |
| 24 | interrupt-parent = <&core_intc>; |
| 25 | clocks = <&core_clk>; |
| 26 | }; |
| 27 | |
| 28 | timer1 { |
| 29 | compatible = "snps,arc-timer"; |
| 30 | clocks = <&core_clk>; |
| 31 | }; |