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Greg Kroah-Hartmanb2441312017-11-01 15:07:57 +01001# SPDX-License-Identifier: GPL-2.0
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -08002# Put here option for CPU selection and depending optimization
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -08003choice
4 prompt "Processor family"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +01005 default M686 if X86_32
6 default GENERIC_CPU if X86_64
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -08007 ---help---
H. Peter Anvineb068e72012-11-28 11:50:23 -08008 This is the processor type of your CPU. This information is
9 used for optimizing purposes. In order to compile a kernel
10 that can run on all supported x86 CPU types (albeit not
11 optimally fast), you can specify "486" here.
12
13 Note that the 386 is no longer supported, this includes
14 AMD/Cyrix/Intel 386DX/DXL/SL/SLC/SX, Cyrix/TI 486DLC/DLC2,
H. Peter Anvin11af32b2012-11-29 13:28:39 -080015 UMC 486SX-S and the NexGen Nx586.
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -080016
17 The kernel will not necessarily run on earlier architectures than
18 the one you have chosen, e.g. a Pentium optimized kernel will run on
19 a PPro, but not necessarily on a i486.
20
21 Here are the settings recommended for greatest speed:
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -080022 - "486" for the AMD/Cyrix/IBM/Intel 486DX/DX2/DX4 or
Borislav Petkov221836e2015-10-19 10:41:17 +020023 SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or U5S.
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -080024 - "586" for generic Pentium CPUs lacking the TSC
Borislav Petkov221836e2015-10-19 10:41:17 +020025 (time stamp counter) register.
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -080026 - "Pentium-Classic" for the Intel Pentium.
27 - "Pentium-MMX" for the Intel Pentium MMX.
28 - "Pentium-Pro" for the Intel Pentium Pro.
29 - "Pentium-II" for the Intel Pentium II or pre-Coppermine Celeron.
30 - "Pentium-III" for the Intel Pentium III or Coppermine Celeron.
31 - "Pentium-4" for the Intel Pentium 4 or P4-based Celeron.
32 - "K6" for the AMD K6, K6-II and K6-III (aka K6-3D).
33 - "Athlon" for the AMD K7 family (Athlon/Duron/Thunderbird).
Borislav Petkov221836e2015-10-19 10:41:17 +020034 - "Opteron/Athlon64/Hammer/K8" for all K8 and newer AMD CPUs.
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -080035 - "Crusoe" for the Transmeta Crusoe series.
36 - "Efficeon" for the Transmeta Efficeon series.
37 - "Winchip-C6" for original IDT Winchip.
Krzysztof Helt69d45dd2008-09-28 21:28:15 +020038 - "Winchip-2" for IDT Winchips with 3dNow! capabilities.
Borislav Petkov221836e2015-10-19 10:41:17 +020039 - "AMD Elan" for the 32-bit AMD Elan embedded CPU.
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -080040 - "GeodeGX1" for Geode GX1 (Cyrix MediaGX).
Jordan Crousef90b8112006-01-06 00:12:14 -080041 - "Geode GX/LX" For AMD Geode GX and LX processors.
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -080042 - "CyrixIII/VIA C3" for VIA Cyrix III or VIA C3.
Egry Gabor48a12042006-06-26 18:47:15 +020043 - "VIA C3-2" for VIA C3-2 "Nehemiah" (model 9 and above).
Simon Arlott0949be32007-05-02 19:27:05 +020044 - "VIA C7" for VIA C7.
Borislav Petkov221836e2015-10-19 10:41:17 +020045 - "Intel P4" for the Pentium 4/Netburst microarchitecture.
46 - "Core 2/newer Xeon" for all core2 and newer Intel CPUs.
47 - "Intel Atom" for the Atom-microarchitecture CPUs.
48 - "Generic-x86-64" for a kernel which runs on any x86-64 CPU.
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -080049
Borislav Petkov221836e2015-10-19 10:41:17 +020050 See each option's help text for additional details. If you don't know
51 what to do, choose "486".
52
Arnd Bergmann87d60212019-10-01 16:23:35 +020053config M486SX
54 bool "486SX"
55 depends on X86_32
56 ---help---
57 Select this for an 486-class CPU without an FPU such as
58 AMD/Cyrix/IBM/Intel SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5S.
59
Borislav Petkov221836e2015-10-19 10:41:17 +020060config M486
Arnd Bergmann87d60212019-10-01 16:23:35 +020061 bool "486DX"
Borislav Petkov221836e2015-10-19 10:41:17 +020062 depends on X86_32
63 ---help---
64 Select this for an 486-class CPU such as AMD/Cyrix/IBM/Intel
Arnd Bergmann87d60212019-10-01 16:23:35 +020065 486DX/DX2/DX4 and UMC U5D.
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -080066
67config M586
68 bool "586/K5/5x86/6x86/6x86MX"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +010069 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +010070 ---help---
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -080071 Select this for an 586 or 686 series processor such as the AMD K5,
72 the Cyrix 5x86, 6x86 and 6x86MX. This choice does not
73 assume the RDTSC (Read Time Stamp Counter) instruction.
74
75config M586TSC
76 bool "Pentium-Classic"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +010077 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +010078 ---help---
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -080079 Select this for a Pentium Classic processor with the RDTSC (Read
80 Time Stamp Counter) instruction for benchmarking.
81
82config M586MMX
83 bool "Pentium-MMX"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +010084 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +010085 ---help---
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -080086 Select this for a Pentium with the MMX graphics/multimedia
87 extended instructions.
88
89config M686
90 bool "Pentium-Pro"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +010091 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +010092 ---help---
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -080093 Select this for Intel Pentium Pro chips. This enables the use of
94 Pentium Pro extended instructions, and disables the init-time guard
95 against the f00f bug found in earlier Pentiums.
96
97config MPENTIUMII
98 bool "Pentium-II/Celeron(pre-Coppermine)"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +010099 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100100 ---help---
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800101 Select this for Intel chips based on the Pentium-II and
102 pre-Coppermine Celeron core. This option enables an unaligned
103 copy optimization, compiles the kernel with optimization flags
104 tailored for the chip, and applies any applicable Pentium Pro
105 optimizations.
106
107config MPENTIUMIII
108 bool "Pentium-III/Celeron(Coppermine)/Pentium-III Xeon"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100109 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100110 ---help---
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800111 Select this for Intel chips based on the Pentium-III and
112 Celeron-Coppermine core. This option enables use of some
113 extended prefetch instructions in addition to the Pentium II
114 extensions.
115
116config MPENTIUMM
117 bool "Pentium M"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100118 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100119 ---help---
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800120 Select this for Intel Pentium M (not Pentium-4 M)
121 notebook chips.
122
123config MPENTIUM4
Andi Kleenc55d92d2006-12-07 02:14:09 +0100124 bool "Pentium-4/Celeron(P4-based)/Pentium-4 M/older Xeon"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100125 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100126 ---help---
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800127 Select this for Intel Pentium 4 chips. This includes the
Oliver Pinter75e38082007-10-17 18:04:36 +0200128 Pentium 4, Pentium D, P4-based Celeron and Xeon, and
129 Pentium-4 M (not Pentium M) chips. This option enables compile
130 flags optimized for the chip, uses the correct cache line size, and
131 applies any applicable optimizations.
132
133 CPUIDs: F[0-6][1-A] (in /proc/cpuinfo show = cpu family : 15 )
134
135 Select this for:
136 Pentiums (Pentium 4, Pentium D, Celeron, Celeron D) corename:
137 -Willamette
138 -Northwood
139 -Mobile Pentium 4
140 -Mobile Pentium 4 M
141 -Extreme Edition (Gallatin)
142 -Prescott
143 -Prescott 2M
144 -Cedar Mill
145 -Presler
146 -Smithfiled
147 Xeons (Intel Xeon, Xeon MP, Xeon LV, Xeon MV) corename:
148 -Foster
149 -Prestonia
150 -Gallatin
151 -Nocona
152 -Irwindale
153 -Cranford
154 -Potomac
155 -Paxville
156 -Dempsey
157
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800158
159config MK6
160 bool "K6/K6-II/K6-III"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100161 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100162 ---help---
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800163 Select this for an AMD K6-family processor. Enables use of
164 some extended instructions, and passes appropriate optimization
165 flags to GCC.
166
167config MK7
168 bool "Athlon/Duron/K7"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100169 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100170 ---help---
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800171 Select this for an AMD Athlon K7-family processor. Enables use of
172 some extended instructions, and passes appropriate optimization
173 flags to GCC.
174
175config MK8
176 bool "Opteron/Athlon64/Hammer/K8"
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100177 ---help---
Borislav Petkov36723bf2009-02-04 21:44:04 +0100178 Select this for an AMD Opteron or Athlon64 Hammer-family processor.
179 Enables use of some extended instructions, and passes appropriate
180 optimization flags to GCC.
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800181
182config MCRUSOE
183 bool "Crusoe"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100184 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100185 ---help---
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800186 Select this for a Transmeta Crusoe processor. Treats the processor
187 like a 586 with TSC, and sets some GCC optimization flags (like a
188 Pentium Pro with no alignment requirements).
189
190config MEFFICEON
191 bool "Efficeon"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100192 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100193 ---help---
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800194 Select this for a Transmeta Efficeon processor.
195
196config MWINCHIPC6
197 bool "Winchip-C6"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100198 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100199 ---help---
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800200 Select this for an IDT Winchip C6 chip. Linux and GCC
201 treat this chip as a 586TSC with some extended instructions
202 and alignment requirements.
203
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800204config MWINCHIP3D
Krzysztof Helt69d45dd2008-09-28 21:28:15 +0200205 bool "Winchip-2/Winchip-2A/Winchip-3"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100206 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100207 ---help---
Krzysztof Helt69d45dd2008-09-28 21:28:15 +0200208 Select this for an IDT Winchip-2, 2A or 3. Linux and GCC
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800209 treat this chip as a 586TSC with some extended instructions
David Sterba3dde6ad2007-05-09 07:12:20 +0200210 and alignment requirements. Also enable out of order memory
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800211 stores for this CPU, which can increase performance of some
212 operations.
213
Ian Campbellce9c99a2011-04-08 07:42:29 +0100214config MELAN
215 bool "AMD Elan"
216 depends on X86_32
217 ---help---
218 Select this for an AMD Elan processor.
219
220 Do not use this option for K6/Athlon/Opteron processors!
221
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800222config MGEODEGX1
223 bool "GeodeGX1"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100224 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100225 ---help---
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800226 Select this for a Geode GX1 (Cyrix MediaGX) chip.
227
Jordan Crousef90b8112006-01-06 00:12:14 -0800228config MGEODE_LX
Harvey Harrison96daa8c2008-01-30 13:31:03 +0100229 bool "Geode GX/LX"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100230 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100231 ---help---
Harvey Harrison96daa8c2008-01-30 13:31:03 +0100232 Select this for AMD Geode GX and LX processors.
Jordan Crousef90b8112006-01-06 00:12:14 -0800233
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800234config MCYRIXIII
235 bool "CyrixIII/VIA-C3"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100236 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100237 ---help---
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800238 Select this for a Cyrix III or C3 chip. Presently Linux and GCC
239 treat this chip as a generic 586. Whilst the CPU is 686 class,
240 it lacks the cmov extension which gcc assumes is present when
241 generating 686 code.
242 Note that Nehemiah (Model 9) and above will not boot with this
243 kernel due to them lacking the 3DNow! instructions used in earlier
244 incarnations of the CPU.
245
246config MVIAC3_2
247 bool "VIA C3-2 (Nehemiah)"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100248 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100249 ---help---
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800250 Select this for a VIA C3 "Nehemiah". Selecting this enables usage
251 of SSE and tells gcc to treat the CPU as a 686.
252 Note, this kernel will not boot on older (pre model 9) C3s.
253
Simon Arlott0949be32007-05-02 19:27:05 +0200254config MVIAC7
255 bool "VIA C7"
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100256 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100257 ---help---
Simon Arlott0949be32007-05-02 19:27:05 +0200258 Select this for a VIA C7. Selecting this uses the correct cache
259 shift and tells gcc to treat the CPU as a 686.
260
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100261config MPSC
262 bool "Intel P4 / older Netburst based Xeon"
263 depends on X86_64
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100264 ---help---
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100265 Optimize for Intel Pentium 4, Pentium D and older Nocona/Dempsey
266 Xeon CPUs with Intel 64bit which is compatible with x86-64.
267 Note that the latest Xeons (Xeon 51xx and 53xx) are not based on the
Harvey Harrison96daa8c2008-01-30 13:31:03 +0100268 Netburst core and shouldn't use this option. You can distinguish them
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100269 using the cpu family field
270 in /proc/cpuinfo. Family 15 is an older Xeon, Family 6 a newer one.
271
272config MCORE2
273 bool "Core 2/newer Xeon"
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100274 ---help---
Borislav Petkov36723bf2009-02-04 21:44:04 +0100275
276 Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and
277 53xx) CPUs. You can distinguish newer from older Xeons by the CPU
278 family in /proc/cpuinfo. Newer ones have 6 and older ones 15
279 (not a typo)
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100280
Tobias Doerffel366d19e2009-08-21 23:06:23 +0200281config MATOM
282 bool "Intel Atom"
283 ---help---
284
285 Select this for the Intel Atom platform. Intel Atom CPUs have an
286 in-order pipelining architecture and thus can benefit from
287 accordingly optimized code. Use a recent GCC with specific Atom
288 support in order to fully benefit from selecting this option.
289
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100290config GENERIC_CPU
291 bool "Generic-x86-64"
292 depends on X86_64
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100293 ---help---
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100294 Generic x86-64 CPU.
295 Run equally well on all x86-64 CPUs.
296
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800297endchoice
298
299config X86_GENERIC
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100300 bool "Generic x86 support"
301 depends on X86_32
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100302 ---help---
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800303 Instead of just including optimizations for the selected
304 x86 variant (e.g. PII, Crusoe or Athlon), include some more
305 generic optimizations as well. This will make the kernel
306 perform better on x86 CPUs other than that selected.
307
308 This is really intended for distributors who need more
309 generic optimizations.
310
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800311#
312# Define implied options from the CPU selection here
Jan Beulich350f8f52009-11-13 11:54:40 +0000313config X86_INTERNODE_CACHE_SHIFT
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100314 int
Jan Beulich350f8f52009-11-13 11:54:40 +0000315 default "12" if X86_VSMP
Jan Beulich350f8f52009-11-13 11:54:40 +0000316 default X86_L1_CACHE_SHIFT
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100317
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800318config X86_L1_CACHE_SHIFT
319 int
Ingo Molnar0a2a18b72009-01-12 23:37:16 +0100320 default "7" if MPENTIUM4 || MPSC
Jan Beulich350f8f52009-11-13 11:54:40 +0000321 default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MATOM || MVIAC7 || X86_GENERIC || GENERIC_CPU
Arnd Bergmann87d60212019-10-01 16:23:35 +0200322 default "4" if MELAN || M486SX || M486 || MGEODEGX1
Krzysztof Helt69d45dd2008-09-28 21:28:15 +0200323 default "5" if MWINCHIP3D || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800324
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800325config X86_F00F_BUG
Harvey Harrison96daa8c2008-01-30 13:31:03 +0100326 def_bool y
Arnd Bergmann87d60212019-10-01 16:23:35 +0200327 depends on M586MMX || M586TSC || M586 || M486SX || M486
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800328
Brian Gerst40d2e762010-03-21 09:00:43 -0400329config X86_INVD_BUG
330 def_bool y
Arnd Bergmann87d60212019-10-01 16:23:35 +0200331 depends on M486SX || M486
Brian Gerst40d2e762010-03-21 09:00:43 -0400332
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800333config X86_ALIGNMENT_16
Harvey Harrison96daa8c2008-01-30 13:31:03 +0100334 def_bool y
Arnd Bergmann87d60212019-10-01 16:23:35 +0200335 depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MELAN || MK6 || M586MMX || M586TSC || M586 || M486SX || M486 || MVIAC3_2 || MGEODEGX1
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800336
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800337config X86_INTEL_USERCOPY
Harvey Harrison96daa8c2008-01-30 13:31:03 +0100338 def_bool y
Andi Kleenc55d92d2006-12-07 02:14:09 +0100339 depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK7 || MEFFICEON || MCORE2
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800340
341config X86_USE_PPRO_CHECKSUM
Harvey Harrison96daa8c2008-01-30 13:31:03 +0100342 def_bool y
Jon Nettleton1eda75c2011-03-16 15:32:47 +0000343 depends on MWINCHIP3D || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 || MVIAC7 || MEFFICEON || MGEODE_LX || MCORE2 || MATOM
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800344
345config X86_USE_3DNOW
Harvey Harrison96daa8c2008-01-30 13:31:03 +0100346 def_bool y
Paolo 'Blaisorblade' Giarrusso1b4ad242006-10-11 01:21:35 -0700347 depends on (MCYRIXIII || MK7 || MGEODE_LX) && !UML
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800348
H. Peter Anvin959b3be2008-02-14 14:56:45 -0800349#
350# P6_NOPs are a relatively minor optimization that require a family >=
351# 6 processor, except that it is broken on certain VIA chips.
352# Furthermore, AMD chips prefer a totally different sequence of NOPs
Linus Torvalds14469a82008-09-05 09:30:14 -0700353# (which work on all CPUs). In addition, it looks like Virtual PC
354# does not understand them.
355#
356# As a result, disallow these if we're not compiling for X86_64 (these
357# NOPs do work on all x86-64 capable chips); the list of processors in
358# the right-hand clause are the cores that benefit from this optimization.
H. Peter Anvin959b3be2008-02-14 14:56:45 -0800359#
H. Peter Anvin7343b3b2008-02-14 14:52:05 -0800360config X86_P6_NOP
361 def_bool y
Linus Torvalds14469a82008-09-05 09:30:14 -0700362 depends on X86_64
363 depends on (MCORE2 || MPENTIUM4 || MPSC)
H. Peter Anvin7343b3b2008-02-14 14:52:05 -0800364
Paolo 'Blaisorblade' Giarrusso96d55b82005-10-30 15:00:07 -0800365config X86_TSC
Harvey Harrison96daa8c2008-01-30 13:31:03 +0100366 def_bool y
H. Peter Anvinb5660ba2014-02-25 12:14:06 -0800367 depends on (MWINCHIP3D || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MCORE2 || MATOM) || X86_64
Andi Kleenc7f81c92007-05-02 19:27:20 +0200368
Jan Beulichf8096f92008-04-22 16:27:29 +0100369config X86_CMPXCHG64
370 def_bool y
Matthew Whiteheadf960cfd2018-02-15 11:54:54 -0500371 depends on X86_PAE || X86_64 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586TSC || M586MMX || MATOM || MGEODE_LX || MGEODEGX1 || MK6 || MK7 || MK8
Jan Beulichf8096f92008-04-22 16:27:29 +0100372
Andi Kleenc7f81c92007-05-02 19:27:20 +0200373# this should be set for all -march=.. options where the compiler
374# generates cmov.
375config X86_CMOV
Harvey Harrison96daa8c2008-01-30 13:31:03 +0100376 def_bool y
Matteo Croce98059e32009-10-01 17:11:10 +0200377 depends on (MK8 || MK7 || MCORE2 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MCRUSOE || MEFFICEON || X86_64 || MATOM || MGEODE_LX)
Andi Kleenc7f81c92007-05-02 19:27:20 +0200378
H. Peter Anvinde32e042007-07-11 12:18:30 -0700379config X86_MINIMUM_CPU_FAMILY
Andi Kleenc7f81c92007-05-02 19:27:20 +0200380 int
Sam Ravnborg1032c0b2007-11-06 21:35:08 +0100381 default "64" if X86_64
Matthew Whitehead25d76ac2018-02-15 11:54:56 -0500382 default "6" if X86_32 && (MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7 || MEFFICEON || MATOM || MCRUSOE || MCORE2 || MK7 || MK8)
Linus Torvalds982d0072009-09-30 17:57:27 -0700383 default "5" if X86_32 && X86_CMPXCHG64
H. Peter Anvineb068e72012-11-28 11:50:23 -0800384 default "4"
Andi Kleenc7f81c92007-05-02 19:27:20 +0200385
Roland McGrath0a049bb2008-01-30 13:30:54 +0100386config X86_DEBUGCTLMSR
Harvey Harrison96daa8c2008-01-30 13:31:03 +0100387 def_bool y
Arnd Bergmann87d60212019-10-01 16:23:35 +0200388 depends on !(MK6 || MWINCHIPC6 || MWINCHIP3D || MCYRIXIII || M586MMX || M586TSC || M586 || M486SX || M486) && !UML
Thomas Petazzoni8d02c212008-08-05 11:45:19 +0200389
Sean Christopherson1db2a6e2019-12-20 20:44:58 -0800390config IA32_FEAT_CTL
391 def_bool y
Sean Christopherson7d379532019-12-20 20:45:01 -0800392 depends on CPU_SUP_INTEL || CPU_SUP_CENTAUR || CPU_SUP_ZHAOXIN
Sean Christopherson1db2a6e2019-12-20 20:44:58 -0800393
Sean Christophersonb47ce1f2019-12-20 20:45:04 -0800394config X86_VMX_FEATURE_NAMES
395 def_bool y
396 depends on IA32_FEAT_CTL && X86_FEATURE_NAMES
397
Thomas Petazzoni8d02c212008-08-05 11:45:19 +0200398menuconfig PROCESSOR_SELECT
David Rientjes6a108a12011-01-20 14:44:16 -0800399 bool "Supported processor vendors" if EXPERT
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100400 ---help---
Thomas Petazzoni8d02c212008-08-05 11:45:19 +0200401 This lets you choose what x86 vendor support code your kernel
402 will include.
403
Yinghai Lu879d7922008-09-09 16:40:37 -0700404config CPU_SUP_INTEL
Thomas Petazzoni8d02c212008-08-05 11:45:19 +0200405 default y
406 bool "Support Intel processors" if PROCESSOR_SELECT
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100407 ---help---
Ingo Molnarb7b3a422008-10-12 15:36:24 +0200408 This enables detection, tunings and quirks for Intel processors
409
410 You need this enabled if you want your kernel to run on an
411 Intel CPU. Disabling this option on other types of CPUs
412 makes the kernel a tiny bit smaller. Disabling it on an Intel
413 CPU might render the kernel unbootable.
414
415 If unsure, say N.
Thomas Petazzoni8d02c212008-08-05 11:45:19 +0200416
417config CPU_SUP_CYRIX_32
418 default y
419 bool "Support Cyrix processors" if PROCESSOR_SELECT
Arnd Bergmann87d60212019-10-01 16:23:35 +0200420 depends on M486SX || M486 || M586 || M586TSC || M586MMX || (EXPERT && !64BIT)
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100421 ---help---
Ingo Molnarb7b3a422008-10-12 15:36:24 +0200422 This enables detection, tunings and quirks for Cyrix processors
423
424 You need this enabled if you want your kernel to run on a
425 Cyrix CPU. Disabling this option on other types of CPUs
426 makes the kernel a tiny bit smaller. Disabling it on a Cyrix
427 CPU might render the kernel unbootable.
428
429 If unsure, say N.
Thomas Petazzoni8d02c212008-08-05 11:45:19 +0200430
Yinghai Luff731522008-09-07 17:58:56 -0700431config CPU_SUP_AMD
Thomas Petazzoni8d02c212008-08-05 11:45:19 +0200432 default y
433 bool "Support AMD processors" if PROCESSOR_SELECT
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100434 ---help---
Ingo Molnarb7b3a422008-10-12 15:36:24 +0200435 This enables detection, tunings and quirks for AMD processors
436
437 You need this enabled if you want your kernel to run on an
438 AMD CPU. Disabling this option on other types of CPUs
439 makes the kernel a tiny bit smaller. Disabling it on an AMD
440 CPU might render the kernel unbootable.
441
442 If unsure, say N.
Thomas Petazzoni8d02c212008-08-05 11:45:19 +0200443
Pu Wenc9661c12018-09-23 17:33:12 +0800444config CPU_SUP_HYGON
445 default y
446 bool "Support Hygon processors" if PROCESSOR_SELECT
447 select CPU_SUP_AMD
448 help
449 This enables detection, tunings and quirks for Hygon processors
450
451 You need this enabled if you want your kernel to run on an
452 Hygon CPU. Disabling this option on other types of CPUs
453 makes the kernel a tiny bit smaller. Disabling it on an Hygon
454 CPU might render the kernel unbootable.
455
456 If unsure, say N.
457
Sebastian Andrzej Siewior48f4c482009-03-14 12:24:02 +0100458config CPU_SUP_CENTAUR
Thomas Petazzoni8d02c212008-08-05 11:45:19 +0200459 default y
460 bool "Support Centaur processors" if PROCESSOR_SELECT
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100461 ---help---
Ingo Molnarb7b3a422008-10-12 15:36:24 +0200462 This enables detection, tunings and quirks for Centaur processors
463
464 You need this enabled if you want your kernel to run on a
465 Centaur CPU. Disabling this option on other types of CPUs
466 makes the kernel a tiny bit smaller. Disabling it on a Centaur
467 CPU might render the kernel unbootable.
468
469 If unsure, say N.
Thomas Petazzoni8d02c212008-08-05 11:45:19 +0200470
471config CPU_SUP_TRANSMETA_32
472 default y
473 bool "Support Transmeta processors" if PROCESSOR_SELECT
474 depends on !64BIT
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100475 ---help---
Ingo Molnarb7b3a422008-10-12 15:36:24 +0200476 This enables detection, tunings and quirks for Transmeta processors
477
478 You need this enabled if you want your kernel to run on a
479 Transmeta CPU. Disabling this option on other types of CPUs
480 makes the kernel a tiny bit smaller. Disabling it on a Transmeta
481 CPU might render the kernel unbootable.
482
483 If unsure, say N.
Thomas Petazzoni8d02c212008-08-05 11:45:19 +0200484
485config CPU_SUP_UMC_32
486 default y
487 bool "Support UMC processors" if PROCESSOR_SELECT
Arnd Bergmann87d60212019-10-01 16:23:35 +0200488 depends on M486SX || M486 || (EXPERT && !64BIT)
Ingo Molnar8f9ca472009-02-05 16:21:53 +0100489 ---help---
Ingo Molnarb7b3a422008-10-12 15:36:24 +0200490 This enables detection, tunings and quirks for UMC processors
491
492 You need this enabled if you want your kernel to run on a
493 UMC CPU. Disabling this option on other types of CPUs
494 makes the kernel a tiny bit smaller. Disabling it on a UMC
495 CPU might render the kernel unbootable.
496
497 If unsure, say N.
Tony W Wang-oc761fdd52019-06-18 08:37:05 +0000498
499config CPU_SUP_ZHAOXIN
500 default y
501 bool "Support Zhaoxin processors" if PROCESSOR_SELECT
502 help
503 This enables detection, tunings and quirks for Zhaoxin processors
504
505 You need this enabled if you want your kernel to run on a
506 Zhaoxin CPU. Disabling this option on other types of CPUs
507 makes the kernel a tiny bit smaller. Disabling it on a Zhaoxin
508 CPU might render the kernel unbootable.
509
510 If unsure, say N.