blob: a1af9146cfdbea5fa0530f8a3f68afd0fad70094 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * Cache flushing routines.
3 *
David Mosberger-Tang20746152005-02-18 19:09:00 -07004 * Copyright (C) 1999-2001, 2005 Hewlett-Packard Co
5 * David Mosberger-Tang <davidm@hpl.hp.com>
Linus Torvalds1da177e2005-04-16 15:20:36 -07006 */
7#include <asm/asmmacro.h>
8#include <asm/page.h>
9
10 /*
11 * flush_icache_range(start,end)
12 * Must flush range from start to end-1 but nothing else (need to
13 * be careful not to touch addresses that may be unmapped).
14 */
15GLOBAL_ENTRY(flush_icache_range)
16 .prologue
17 alloc r2=ar.pfs,2,0,0,0
18 sub r8=in1,in0,1
19 ;;
20 shr.u r8=r8,5 // we flush 32 bytes per iteration
21 .save ar.lc, r3
22 mov r3=ar.lc // save ar.lc
23 ;;
24
25 .body
26
27 mov ar.lc=r8
28 ;;
David Mosberger-Tang20746152005-02-18 19:09:00 -070029.Loop: fc.i in0 // issuable on M2 only
Linus Torvalds1da177e2005-04-16 15:20:36 -070030 add in0=32,in0
31 br.cloop.sptk.few .Loop
32 ;;
33 sync.i
34 ;;
35 srlz.i
36 ;;
37 mov ar.lc=r3 // restore ar.lc
38 br.ret.sptk.many rp
39END(flush_icache_range)