| Grygorii Strashko | 5b9bf51 | 2018-11-25 18:15:22 -0600 | [diff] [blame] | 1 | CPSW Port's Interface Mode Selection PHY Tree Bindings |
| 2 | ----------------------------------------------- |
| 3 | |
| 4 | TI am335x/am437x/dra7(am5)/dm814x CPSW3G Ethernet Subsystem supports |
| 5 | two 10/100/1000 Ethernet ports with selectable G/MII, RMII, and RGMII interfaces. |
| 6 | The interface mode is selected by configuring the MII mode selection register(s) |
| 7 | (GMII_SEL) in the System Control Module chapter (SCM). GMII_SEL register(s) and |
| 8 | bit fields placement in SCM are different between SoCs while fields meaning |
| 9 | is the same. |
| 10 | +--------------+ |
| 11 | +-------------------------------+ |SCM | |
| 12 | | CPSW | | +---------+ | |
| 13 | | +--------------------------------+gmii_sel | | |
| 14 | | | | | +---------+ | |
| 15 | | +----v---+ +--------+ | +--------------+ |
| 16 | | |Port 1..<--+-->GMII/MII<-------> |
| 17 | | | | | | | | |
| 18 | | +--------+ | +--------+ | |
| 19 | | | | |
| 20 | | | +--------+ | |
| 21 | | | | RMII <-------> |
| 22 | | +--> | | |
| 23 | | | +--------+ | |
| 24 | | | | |
| 25 | | | +--------+ | |
| 26 | | | | RGMII <-------> |
| 27 | | +--> | | |
| 28 | | +--------+ | |
| 29 | +-------------------------------+ |
| 30 | |
| 31 | CPSW Port's Interface Mode Selection PHY describes MII interface mode between |
| 32 | CPSW Port and Ethernet PHY which depends on Eth PHY and board configuration. |
| 33 | |
| 34 | CPSW Port's Interface Mode Selection PHY device should defined as child device |
| 35 | of SCM node (scm_conf) and can be attached to each CPSW port node using standard |
| 36 | PHY bindings (See phy/phy-bindings.txt). |
| 37 | |
| 38 | Required properties: |
| 39 | - compatible : Should be "ti,am3352-phy-gmii-sel" for am335x platform |
| 40 | "ti,dra7xx-phy-gmii-sel" for dra7xx/am57xx platform |
| 41 | "ti,am43xx-phy-gmii-sel" for am43xx platform |
| 42 | "ti,dm814-phy-gmii-sel" for dm814x platform |
| 43 | - reg : Address and length of the register set for the device |
| 44 | - #phy-cells : must be 2. |
| 45 | cell 1 - CPSW port number (starting from 1) |
| 46 | cell 2 - RMII refclk mode |
| 47 | |
| 48 | Examples: |
| 49 | phy_gmii_sel: phy-gmii-sel { |
| 50 | compatible = "ti,am3352-phy-gmii-sel"; |
| 51 | reg = <0x650 0x4>; |
| 52 | #phy-cells = <2>; |
| 53 | }; |
| 54 | |
| 55 | mac: ethernet@4a100000 { |
| 56 | compatible = "ti,am335x-cpsw","ti,cpsw"; |
| 57 | ... |
| 58 | |
| 59 | cpsw_emac0: slave@4a100200 { |
| 60 | ... |
| 61 | phys = <&phy_gmii_sel 1 1>; |
| 62 | }; |
| 63 | |
| 64 | cpsw_emac1: slave@4a100300 { |
| 65 | ... |
| 66 | phys = <&phy_gmii_sel 2 1>; |
| 67 | }; |
| 68 | }; |