Thomas Gleixner | d2912cb | 2019-06-04 10:11:33 +0200 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Tony Makkiel | d966c94 | 2016-07-11 11:48:49 +0100 | [diff] [blame] | 2 | /* |
| 3 | * LED driver for TI lp3952 controller |
| 4 | * |
| 5 | * Copyright (C) 2016, DAQRI, LLC. |
| 6 | * Author: Tony Makkiel <tony.makkiel@daqri.com> |
Tony Makkiel | d966c94 | 2016-07-11 11:48:49 +0100 | [diff] [blame] | 7 | */ |
| 8 | |
| 9 | #ifndef LEDS_LP3952_H_ |
| 10 | #define LEDS_LP3952_H_ |
| 11 | |
| 12 | #define LP3952_NAME "lp3952" |
| 13 | #define LP3952_CMD_REG_COUNT 8 |
| 14 | #define LP3952_BRIGHT_MAX 4 |
| 15 | #define LP3952_LABEL_MAX_LEN 15 |
| 16 | |
| 17 | #define LP3952_REG_LED_CTRL 0x00 |
| 18 | #define LP3952_REG_R1_BLNK_TIME_CTRL 0x01 |
| 19 | #define LP3952_REG_R1_BLNK_CYCLE_CTRL 0x02 |
| 20 | #define LP3952_REG_G1_BLNK_TIME_CTRL 0x03 |
| 21 | #define LP3952_REG_G1_BLNK_CYCLE_CTRL 0x04 |
| 22 | #define LP3952_REG_B1_BLNK_TIME_CTRL 0x05 |
| 23 | #define LP3952_REG_B1_BLNK_CYCLE_CTRL 0x06 |
| 24 | #define LP3952_REG_ENABLES 0x0B |
| 25 | #define LP3952_REG_PAT_GEN_CTRL 0x11 |
| 26 | #define LP3952_REG_RGB1_MAX_I_CTRL 0x12 |
| 27 | #define LP3952_REG_RGB2_MAX_I_CTRL 0x13 |
| 28 | #define LP3952_REG_CMD_0 0x50 |
| 29 | #define LP3952_REG_RESET 0x60 |
| 30 | #define REG_MAX LP3952_REG_RESET |
| 31 | |
| 32 | #define LP3952_PATRN_LOOP BIT(1) |
| 33 | #define LP3952_PATRN_GEN_EN BIT(2) |
| 34 | #define LP3952_INT_B00ST_LDR BIT(2) |
| 35 | #define LP3952_ACTIVE_MODE BIT(6) |
| 36 | #define LP3952_LED_MASK_ALL 0x3f |
| 37 | |
| 38 | /* Transition Time in ms */ |
| 39 | enum lp3952_tt { |
| 40 | TT0, |
| 41 | TT55, |
| 42 | TT110, |
| 43 | TT221, |
| 44 | TT422, |
| 45 | TT885, |
| 46 | TT1770, |
| 47 | TT3539 |
| 48 | }; |
| 49 | |
| 50 | /* Command Execution Time in ms */ |
| 51 | enum lp3952_cet { |
| 52 | CET197, |
| 53 | CET393, |
| 54 | CET590, |
| 55 | CET786, |
| 56 | CET1180, |
| 57 | CET1376, |
| 58 | CET1573, |
| 59 | CET1769, |
| 60 | CET1966, |
| 61 | CET2163, |
| 62 | CET2359, |
| 63 | CET2556, |
| 64 | CET2763, |
| 65 | CET2949, |
| 66 | CET3146 |
| 67 | }; |
| 68 | |
| 69 | /* Max Current in % */ |
| 70 | enum lp3952_colour_I_log_0 { |
| 71 | I0, |
| 72 | I7, |
| 73 | I14, |
| 74 | I21, |
| 75 | I32, |
| 76 | I46, |
| 77 | I71, |
| 78 | I100 |
| 79 | }; |
| 80 | |
| 81 | enum lp3952_leds { |
| 82 | LP3952_BLUE_2, |
| 83 | LP3952_GREEN_2, |
| 84 | LP3952_RED_2, |
| 85 | LP3952_BLUE_1, |
| 86 | LP3952_GREEN_1, |
| 87 | LP3952_RED_1, |
| 88 | LP3952_LED_ALL |
| 89 | }; |
| 90 | |
| 91 | struct lp3952_ctrl_hdl { |
| 92 | struct led_classdev cdev; |
| 93 | char name[LP3952_LABEL_MAX_LEN]; |
| 94 | enum lp3952_leds channel; |
| 95 | void *priv; |
| 96 | }; |
| 97 | |
| 98 | struct ptrn_gen_cmd { |
| 99 | union { |
| 100 | struct { |
| 101 | u16 tt:3; |
| 102 | u16 b:3; |
| 103 | u16 cet:4; |
| 104 | u16 g:3; |
| 105 | u16 r:3; |
| 106 | }; |
| 107 | struct { |
| 108 | u8 lsb; |
| 109 | u8 msb; |
| 110 | } bytes; |
| 111 | }; |
| 112 | } __packed; |
| 113 | |
| 114 | struct lp3952_led_array { |
| 115 | struct regmap *regmap; |
| 116 | struct i2c_client *client; |
| 117 | struct gpio_desc *enable_gpio; |
| 118 | struct lp3952_ctrl_hdl leds[LP3952_LED_ALL]; |
| 119 | }; |
| 120 | |
| 121 | #endif /* LEDS_LP3952_H_ */ |