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Kukjin Kimd11135c2011-02-14 14:59:52 +09001/* linux/arch/arm/mach-exynos4/mach-smdkv310.c
Changhwan Younb1d69cc2010-07-16 12:18:36 +09002 *
Kukjin Kimd11135c2011-02-14 14:59:52 +09003 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
Changhwan Younb1d69cc2010-07-16 12:18:36 +09005 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#include <linux/serial_core.h>
Kukjin Kim42c0d262011-08-18 21:14:28 +090012#include <linux/delay.h>
Hyuk Lee2b111482010-10-06 14:50:20 +090013#include <linux/gpio.h>
Kukjin Kim42c0d262011-08-18 21:14:28 +090014#include <linux/lcd.h>
Hyuk Lee2b111482010-10-06 14:50:20 +090015#include <linux/mmc/host.h>
16#include <linux/platform_device.h>
Daein Mooncbff3eb2010-10-26 12:51:17 +090017#include <linux/smsc911x.h>
18#include <linux/io.h>
Jassi Brar6f5c11c2010-12-21 09:59:05 +090019#include <linux/i2c.h>
Naveen Krishna Chbe4c33b2011-02-22 17:16:58 +090020#include <linux/input.h>
Banajit Goswami8689de72011-07-20 23:45:21 +090021#include <linux/pwm_backlight.h>
Sachin Kamatfb395c32012-05-20 07:46:44 +090022#include <linux/platform_data/s3c-hsotg.h>
Changhwan Younb1d69cc2010-07-16 12:18:36 +090023
24#include <asm/mach/arch.h>
Marc Zyngier4e44d2c2011-05-30 11:04:53 +010025#include <asm/hardware/gic.h>
Changhwan Younb1d69cc2010-07-16 12:18:36 +090026#include <asm/mach-types.h>
Changhwan Younb1d69cc2010-07-16 12:18:36 +090027
Kukjin Kim42c0d262011-08-18 21:14:28 +090028#include <video/platform_lcd.h>
Changhwan Younb1d69cc2010-07-16 12:18:36 +090029#include <plat/regs-serial.h>
Kukjin Kim8cf460a2010-11-15 09:18:57 +090030#include <plat/regs-srom.h>
Kukjin Kim42c0d262011-08-18 21:14:28 +090031#include <plat/regs-fb-v4.h>
Changhwan Younb1d69cc2010-07-16 12:18:36 +090032#include <plat/cpu.h>
Changhwan Youncdff6e62010-09-20 15:25:51 +090033#include <plat/devs.h>
Kukjin Kim42c0d262011-08-18 21:14:28 +090034#include <plat/fb.h>
Naveen Krishna Chbe4c33b2011-02-22 17:16:58 +090035#include <plat/keypad.h>
Hyuk Lee2b111482010-10-06 14:50:20 +090036#include <plat/sdhci.h>
Jassi Brar6f5c11c2010-12-21 09:59:05 +090037#include <plat/iic.h>
Banajit Goswami8689de72011-07-20 23:45:21 +090038#include <plat/gpio-cfg.h>
39#include <plat/backlight.h>
Sachin Kamat95727e12011-08-12 18:21:27 +090040#include <plat/mfc.h>
Jingoo Han9830f6a2011-09-28 10:33:25 +090041#include <plat/ehci.h>
42#include <plat/clock.h>
Changhwan Younb1d69cc2010-07-16 12:18:36 +090043
44#include <mach/map.h>
Jingoo Han744f20f2011-12-23 11:20:50 +090045#include <mach/ohci.h>
Changhwan Younb1d69cc2010-07-16 12:18:36 +090046
Sachin Kamatab25a8d2012-05-12 16:34:06 +090047#include <drm/exynos_drm.h>
Kukjin Kimcc511b82011-12-27 08:18:36 +010048#include "common.h"
49
Changhwan Younb1d69cc2010-07-16 12:18:36 +090050/* Following are default values for UCON, ULCON and UFCON UART registers */
51#define SMDKV310_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
52 S3C2410_UCON_RXILEVEL | \
53 S3C2410_UCON_TXIRQMODE | \
54 S3C2410_UCON_RXIRQMODE | \
55 S3C2410_UCON_RXFIFO_TOI | \
56 S3C2443_UCON_RXERR_IRQEN)
57
58#define SMDKV310_ULCON_DEFAULT S3C2410_LCON_CS8
59
60#define SMDKV310_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
61 S5PV210_UFCON_TXTRIG4 | \
62 S5PV210_UFCON_RXTRIG4)
63
64static struct s3c2410_uartcfg smdkv310_uartcfgs[] __initdata = {
65 [0] = {
66 .hwport = 0,
67 .flags = 0,
68 .ucon = SMDKV310_UCON_DEFAULT,
69 .ulcon = SMDKV310_ULCON_DEFAULT,
70 .ufcon = SMDKV310_UFCON_DEFAULT,
71 },
72 [1] = {
73 .hwport = 1,
74 .flags = 0,
75 .ucon = SMDKV310_UCON_DEFAULT,
76 .ulcon = SMDKV310_ULCON_DEFAULT,
77 .ufcon = SMDKV310_UFCON_DEFAULT,
78 },
79 [2] = {
80 .hwport = 2,
81 .flags = 0,
82 .ucon = SMDKV310_UCON_DEFAULT,
83 .ulcon = SMDKV310_ULCON_DEFAULT,
84 .ufcon = SMDKV310_UFCON_DEFAULT,
85 },
86 [3] = {
87 .hwport = 3,
88 .flags = 0,
89 .ucon = SMDKV310_UCON_DEFAULT,
90 .ulcon = SMDKV310_ULCON_DEFAULT,
91 .ufcon = SMDKV310_UFCON_DEFAULT,
92 },
93};
94
Hyuk Lee2b111482010-10-06 14:50:20 +090095static struct s3c_sdhci_platdata smdkv310_hsmmc0_pdata __initdata = {
Thomas Abrahama0d8efe2011-06-16 16:12:35 +090096 .cd_type = S3C_SDHCI_CD_INTERNAL,
Kukjin Kimd11135c2011-02-14 14:59:52 +090097#ifdef CONFIG_EXYNOS4_SDHCI_CH0_8BIT
Hyuk Lee2b111482010-10-06 14:50:20 +090098 .max_width = 8,
99 .host_caps = MMC_CAP_8_BIT_DATA,
100#endif
101};
102
103static struct s3c_sdhci_platdata smdkv310_hsmmc1_pdata __initdata = {
104 .cd_type = S3C_SDHCI_CD_GPIO,
Kukjin Kimd11135c2011-02-14 14:59:52 +0900105 .ext_cd_gpio = EXYNOS4_GPK0(2),
Hyuk Lee2b111482010-10-06 14:50:20 +0900106 .ext_cd_gpio_invert = 1,
107};
108
109static struct s3c_sdhci_platdata smdkv310_hsmmc2_pdata __initdata = {
Thomas Abrahama0d8efe2011-06-16 16:12:35 +0900110 .cd_type = S3C_SDHCI_CD_INTERNAL,
Kukjin Kimd11135c2011-02-14 14:59:52 +0900111#ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT
Hyuk Lee2b111482010-10-06 14:50:20 +0900112 .max_width = 8,
113 .host_caps = MMC_CAP_8_BIT_DATA,
114#endif
115};
116
117static struct s3c_sdhci_platdata smdkv310_hsmmc3_pdata __initdata = {
118 .cd_type = S3C_SDHCI_CD_GPIO,
Kukjin Kimd11135c2011-02-14 14:59:52 +0900119 .ext_cd_gpio = EXYNOS4_GPK2(2),
Hyuk Lee2b111482010-10-06 14:50:20 +0900120 .ext_cd_gpio_invert = 1,
121};
122
Kukjin Kim42c0d262011-08-18 21:14:28 +0900123static void lcd_lte480wv_set_power(struct plat_lcd_data *pd,
124 unsigned int power)
125{
126 if (power) {
127#if !defined(CONFIG_BACKLIGHT_PWM)
128 gpio_request_one(EXYNOS4_GPD0(1), GPIOF_OUT_INIT_HIGH, "GPD0");
129 gpio_free(EXYNOS4_GPD0(1));
130#endif
131 /* fire nRESET on power up */
Jingoo Han321655e2011-12-24 11:58:32 +0900132 gpio_request_one(EXYNOS4_GPX0(6), GPIOF_OUT_INIT_HIGH, "GPX0");
Kukjin Kim42c0d262011-08-18 21:14:28 +0900133 mdelay(100);
134
135 gpio_set_value(EXYNOS4_GPX0(6), 0);
136 mdelay(10);
137
138 gpio_set_value(EXYNOS4_GPX0(6), 1);
139 mdelay(10);
140
141 gpio_free(EXYNOS4_GPX0(6));
142 } else {
143#if !defined(CONFIG_BACKLIGHT_PWM)
144 gpio_request_one(EXYNOS4_GPD0(1), GPIOF_OUT_INIT_LOW, "GPD0");
145 gpio_free(EXYNOS4_GPD0(1));
146#endif
147 }
148}
149
150static struct plat_lcd_data smdkv310_lcd_lte480wv_data = {
151 .set_power = lcd_lte480wv_set_power,
152};
153
154static struct platform_device smdkv310_lcd_lte480wv = {
155 .name = "platform-lcd",
156 .dev.parent = &s5p_device_fimd0.dev,
157 .dev.platform_data = &smdkv310_lcd_lte480wv_data,
158};
159
Sachin Kamatab25a8d2012-05-12 16:34:06 +0900160#ifdef CONFIG_DRM_EXYNOS
161static struct exynos_drm_fimd_pdata drm_fimd_pdata = {
162 .panel = {
163 .timing = {
164 .left_margin = 13,
165 .right_margin = 8,
166 .upper_margin = 7,
167 .lower_margin = 5,
168 .hsync_len = 3,
169 .vsync_len = 1,
170 .xres = 800,
171 .yres = 480,
172 },
173 },
174 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
175 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
176 .default_win = 0,
177 .bpp = 32,
178};
179#else
Kukjin Kim42c0d262011-08-18 21:14:28 +0900180static struct s3c_fb_pd_win smdkv310_fb_win0 = {
Thomas Abraham79d3c412012-03-24 21:58:48 +0530181 .max_bpp = 32,
182 .default_bpp = 24,
183 .xres = 800,
184 .yres = 480,
185};
186
187static struct fb_videomode smdkv310_lcd_timing = {
188 .left_margin = 13,
189 .right_margin = 8,
190 .upper_margin = 7,
191 .lower_margin = 5,
192 .hsync_len = 3,
193 .vsync_len = 1,
194 .xres = 800,
195 .yres = 480,
Kukjin Kim42c0d262011-08-18 21:14:28 +0900196};
197
198static struct s3c_fb_platdata smdkv310_lcd0_pdata __initdata = {
199 .win[0] = &smdkv310_fb_win0,
Thomas Abraham79d3c412012-03-24 21:58:48 +0530200 .vtiming = &smdkv310_lcd_timing,
Kukjin Kim42c0d262011-08-18 21:14:28 +0900201 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
202 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
203 .setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
204};
Sachin Kamatab25a8d2012-05-12 16:34:06 +0900205#endif
Kukjin Kim42c0d262011-08-18 21:14:28 +0900206
Daein Mooncbff3eb2010-10-26 12:51:17 +0900207static struct resource smdkv310_smsc911x_resources[] = {
Tushar Beheraf7f145e2012-05-12 16:12:20 +0900208 [0] = DEFINE_RES_MEM(EXYNOS4_PA_SROM_BANK(1), SZ_64K),
209 [1] = DEFINE_RES_NAMED(IRQ_EINT(5), 1, NULL, IORESOURCE_IRQ \
210 | IRQF_TRIGGER_LOW),
Daein Mooncbff3eb2010-10-26 12:51:17 +0900211};
212
213static struct smsc911x_platform_config smsc9215_config = {
Jeongtae Parkcd0527c2011-03-25 15:48:15 +0900214 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
Daein Mooncbff3eb2010-10-26 12:51:17 +0900215 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
216 .flags = SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY,
217 .phy_interface = PHY_INTERFACE_MODE_MII,
218 .mac = {0x00, 0x80, 0x00, 0x23, 0x45, 0x67},
219};
220
221static struct platform_device smdkv310_smsc911x = {
222 .name = "smsc911x",
223 .id = -1,
224 .num_resources = ARRAY_SIZE(smdkv310_smsc911x_resources),
225 .resource = smdkv310_smsc911x_resources,
226 .dev = {
227 .platform_data = &smsc9215_config,
228 },
229};
230
Naveen Krishna Chbe4c33b2011-02-22 17:16:58 +0900231static uint32_t smdkv310_keymap[] __initdata = {
232 /* KEY(row, col, keycode) */
233 KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3),
234 KEY(0, 6, KEY_4), KEY(0, 7, KEY_5),
235 KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C),
236 KEY(1, 6, KEY_D), KEY(1, 7, KEY_E)
237};
238
239static struct matrix_keymap_data smdkv310_keymap_data __initdata = {
240 .keymap = smdkv310_keymap,
241 .keymap_size = ARRAY_SIZE(smdkv310_keymap),
242};
243
244static struct samsung_keypad_platdata smdkv310_keypad_data __initdata = {
245 .keymap_data = &smdkv310_keymap_data,
246 .rows = 2,
247 .cols = 8,
248};
249
Jassi Brar6f5c11c2010-12-21 09:59:05 +0900250static struct i2c_board_info i2c_devs1[] __initdata = {
251 {I2C_BOARD_INFO("wm8994", 0x1a),},
252};
253
Jingoo Han9830f6a2011-09-28 10:33:25 +0900254/* USB EHCI */
255static struct s5p_ehci_platdata smdkv310_ehci_pdata;
256
257static void __init smdkv310_ehci_init(void)
258{
259 struct s5p_ehci_platdata *pdata = &smdkv310_ehci_pdata;
260
261 s5p_ehci_set_platdata(pdata);
262}
263
Jingoo Han744f20f2011-12-23 11:20:50 +0900264/* USB OHCI */
265static struct exynos4_ohci_platdata smdkv310_ohci_pdata;
266
267static void __init smdkv310_ohci_init(void)
268{
269 struct exynos4_ohci_platdata *pdata = &smdkv310_ohci_pdata;
270
271 exynos4_ohci_set_platdata(pdata);
272}
273
Sachin Kamatfb395c32012-05-20 07:46:44 +0900274/* USB OTG */
275static struct s3c_hsotg_plat smdkv310_hsotg_pdata;
276
Sachin Kamat1b1ce352012-07-12 17:48:49 +0900277/* Audio device */
278static struct platform_device smdkv310_device_audio = {
279 .name = "smdk-audio",
280 .id = -1,
281};
282
Changhwan Youncdff6e62010-09-20 15:25:51 +0900283static struct platform_device *smdkv310_devices[] __initdata = {
Hyuk Lee2b111482010-10-06 14:50:20 +0900284 &s3c_device_hsmmc0,
285 &s3c_device_hsmmc1,
286 &s3c_device_hsmmc2,
287 &s3c_device_hsmmc3,
Kukjin Kim285dee72010-12-31 10:52:05 +0900288 &s3c_device_i2c1,
Hatim Alic0735c82011-09-27 07:37:18 +0900289 &s5p_device_i2c_hdmiphy,
Changhwan Youncdff6e62010-09-20 15:25:51 +0900290 &s3c_device_rtc,
Sachin Kamatfb395c32012-05-20 07:46:44 +0900291 &s3c_device_usb_hsotg,
Jemings Ko8d75c912010-09-20 15:33:04 +0900292 &s3c_device_wdt,
Jingoo Han9830f6a2011-09-28 10:33:25 +0900293 &s5p_device_ehci,
Sachin Kamat568f0e22011-09-28 11:13:30 +0900294 &s5p_device_fimc0,
295 &s5p_device_fimc1,
296 &s5p_device_fimc2,
297 &s5p_device_fimc3,
Sachin Kamate0d49c72012-01-31 13:28:52 +0900298 &s5p_device_fimc_md,
Sachin Kamatb3421f92012-03-09 06:51:45 -0800299 &s5p_device_g2d,
Sachin Kamat9fbe8c72012-03-09 08:19:21 -0800300 &s5p_device_jpeg,
Sachin Kamatab25a8d2012-05-12 16:34:06 +0900301#ifdef CONFIG_DRM_EXYNOS
302 &exynos_device_drm,
303#endif
Kukjin Kimd11135c2011-02-14 14:59:52 +0900304 &exynos4_device_ac97,
305 &exynos4_device_i2s0,
Jingoo Han744f20f2011-12-23 11:20:50 +0900306 &exynos4_device_ohci,
Naveen Krishna Chbe4c33b2011-02-22 17:16:58 +0900307 &samsung_device_keypad,
Sachin Kamat95727e12011-08-12 18:21:27 +0900308 &s5p_device_mfc,
309 &s5p_device_mfc_l,
310 &s5p_device_mfc_r,
Naveen Krishna Chatradhi2ba707a2011-07-18 15:14:01 +0900311 &exynos4_device_spdif,
Jassi Brarfbcb44d2011-01-18 14:41:43 +0900312 &samsung_asoc_dma,
Sangbeom Kim2839cc12011-07-21 14:12:19 +0900313 &samsung_asoc_idma,
Kukjin Kim42c0d262011-08-18 21:14:28 +0900314 &s5p_device_fimd0,
Sachin Kamat1b1ce352012-07-12 17:48:49 +0900315 &smdkv310_device_audio,
Kukjin Kim42c0d262011-08-18 21:14:28 +0900316 &smdkv310_lcd_lte480wv,
Jassi Brarfbcb44d2011-01-18 14:41:43 +0900317 &smdkv310_smsc911x,
Inderpal Singh0d855f42011-07-04 19:19:36 +0900318 &exynos4_device_ahci,
Hatim Alic0735c82011-09-27 07:37:18 +0900319 &s5p_device_hdmi,
320 &s5p_device_mixer,
Changhwan Youncdff6e62010-09-20 15:25:51 +0900321};
322
Daein Mooncbff3eb2010-10-26 12:51:17 +0900323static void __init smdkv310_smsc911x_init(void)
324{
325 u32 cs1;
326
327 /* configure nCS1 width to 16 bits */
Kukjin Kim8cf460a2010-11-15 09:18:57 +0900328 cs1 = __raw_readl(S5P_SROM_BW) &
329 ~(S5P_SROM_BW__CS_MASK << S5P_SROM_BW__NCS1__SHIFT);
330 cs1 |= ((1 << S5P_SROM_BW__DATAWIDTH__SHIFT) |
331 (1 << S5P_SROM_BW__WAITENABLE__SHIFT) |
332 (1 << S5P_SROM_BW__BYTEENABLE__SHIFT)) <<
333 S5P_SROM_BW__NCS1__SHIFT;
334 __raw_writel(cs1, S5P_SROM_BW);
Daein Mooncbff3eb2010-10-26 12:51:17 +0900335
336 /* set timing for nCS1 suitable for ethernet chip */
Kukjin Kim8cf460a2010-11-15 09:18:57 +0900337 __raw_writel((0x1 << S5P_SROM_BCX__PMC__SHIFT) |
338 (0x9 << S5P_SROM_BCX__TACP__SHIFT) |
339 (0xc << S5P_SROM_BCX__TCAH__SHIFT) |
340 (0x1 << S5P_SROM_BCX__TCOH__SHIFT) |
341 (0x6 << S5P_SROM_BCX__TACC__SHIFT) |
342 (0x1 << S5P_SROM_BCX__TCOS__SHIFT) |
343 (0x1 << S5P_SROM_BCX__TACS__SHIFT), S5P_SROM_BC1);
Daein Mooncbff3eb2010-10-26 12:51:17 +0900344}
345
Banajit Goswami8689de72011-07-20 23:45:21 +0900346/* LCD Backlight data */
347static struct samsung_bl_gpio_info smdkv310_bl_gpio_info = {
348 .no = EXYNOS4_GPD0(1),
349 .func = S3C_GPIO_SFN(2),
350};
351
352static struct platform_pwm_backlight_data smdkv310_bl_data = {
353 .pwm_id = 1,
354 .pwm_period_ns = 1000,
355};
356
Hatim Alic0735c82011-09-27 07:37:18 +0900357static void s5p_tv_setup(void)
358{
359 /* direct HPD to HDMI chip */
360 WARN_ON(gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug"));
361 s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
362 s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);
Hatim Alic0735c82011-09-27 07:37:18 +0900363}
364
Changhwan Younb1d69cc2010-07-16 12:18:36 +0900365static void __init smdkv310_map_io(void)
366{
Kukjin Kimcc511b82011-12-27 08:18:36 +0100367 exynos_init_io(NULL, 0);
Kukjin Kim2e274372012-07-12 18:03:52 +0900368 s3c24xx_init_clocks(clk_xusbxti.rate);
Changhwan Younb1d69cc2010-07-16 12:18:36 +0900369 s3c24xx_init_uarts(smdkv310_uartcfgs, ARRAY_SIZE(smdkv310_uartcfgs));
370}
371
Sachin Kamat95727e12011-08-12 18:21:27 +0900372static void __init smdkv310_reserve(void)
373{
374 s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
375}
376
Changhwan Younb1d69cc2010-07-16 12:18:36 +0900377static void __init smdkv310_machine_init(void)
378{
Jassi Brar6f5c11c2010-12-21 09:59:05 +0900379 s3c_i2c1_set_platdata(NULL);
380 i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
381
Daein Mooncbff3eb2010-10-26 12:51:17 +0900382 smdkv310_smsc911x_init();
383
Hyuk Lee2b111482010-10-06 14:50:20 +0900384 s3c_sdhci0_set_platdata(&smdkv310_hsmmc0_pdata);
385 s3c_sdhci1_set_platdata(&smdkv310_hsmmc1_pdata);
386 s3c_sdhci2_set_platdata(&smdkv310_hsmmc2_pdata);
387 s3c_sdhci3_set_platdata(&smdkv310_hsmmc3_pdata);
388
Hatim Alic0735c82011-09-27 07:37:18 +0900389 s5p_tv_setup();
390 s5p_i2c_hdmiphy_set_platdata(NULL);
391
Naveen Krishna Chbe4c33b2011-02-22 17:16:58 +0900392 samsung_keypad_set_platdata(&smdkv310_keypad_data);
393
Banajit Goswami8689de72011-07-20 23:45:21 +0900394 samsung_bl_set(&smdkv310_bl_gpio_info, &smdkv310_bl_data);
Sachin Kamatab25a8d2012-05-12 16:34:06 +0900395#ifdef CONFIG_DRM_EXYNOS
396 s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;
397 exynos4_fimd0_gpio_setup_24bpp();
398#else
Kukjin Kim42c0d262011-08-18 21:14:28 +0900399 s5p_fimd0_set_platdata(&smdkv310_lcd0_pdata);
Sachin Kamatab25a8d2012-05-12 16:34:06 +0900400#endif
Banajit Goswami8689de72011-07-20 23:45:21 +0900401
Jingoo Han9830f6a2011-09-28 10:33:25 +0900402 smdkv310_ehci_init();
Jingoo Han744f20f2011-12-23 11:20:50 +0900403 smdkv310_ohci_init();
Sachin Kamatfb395c32012-05-20 07:46:44 +0900404 s3c_hsotg_set_platdata(&smdkv310_hsotg_pdata);
Jingoo Han9830f6a2011-09-28 10:33:25 +0900405
Changhwan Youncdff6e62010-09-20 15:25:51 +0900406 platform_add_devices(smdkv310_devices, ARRAY_SIZE(smdkv310_devices));
Changhwan Younb1d69cc2010-07-16 12:18:36 +0900407}
408
409MACHINE_START(SMDKV310, "SMDKV310")
410 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
411 /* Maintainer: Changhwan Youn <chaos.youn@samsung.com> */
Tushar Behera1abd3282011-09-19 20:09:01 +0900412 .atag_offset = 0x100,
Kukjin Kimd11135c2011-02-14 14:59:52 +0900413 .init_irq = exynos4_init_irq,
Changhwan Younb1d69cc2010-07-16 12:18:36 +0900414 .map_io = smdkv310_map_io,
Marc Zyngier4e44d2c2011-05-30 11:04:53 +0100415 .handle_irq = gic_handle_irq,
Changhwan Younb1d69cc2010-07-16 12:18:36 +0900416 .init_machine = smdkv310_machine_init,
Kukjin Kimd11135c2011-02-14 14:59:52 +0900417 .timer = &exynos4_timer,
Sachin Kamat95727e12011-08-12 18:21:27 +0900418 .reserve = &smdkv310_reserve,
Russell King9eb48592012-01-03 11:56:53 +0100419 .restart = exynos4_restart,
Changhwan Younb1d69cc2010-07-16 12:18:36 +0900420MACHINE_END
Kukjin Kim42c0d262011-08-18 21:14:28 +0900421
422MACHINE_START(SMDKC210, "SMDKC210")
423 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
Tushar Behera1abd3282011-09-19 20:09:01 +0900424 .atag_offset = 0x100,
Kukjin Kim42c0d262011-08-18 21:14:28 +0900425 .init_irq = exynos4_init_irq,
426 .map_io = smdkv310_map_io,
Marc Zyngier4e44d2c2011-05-30 11:04:53 +0100427 .handle_irq = gic_handle_irq,
Kukjin Kim42c0d262011-08-18 21:14:28 +0900428 .init_machine = smdkv310_machine_init,
Shawn Guobb13fab2012-04-26 10:35:40 +0800429 .init_late = exynos_init_late,
Kukjin Kim42c0d262011-08-18 21:14:28 +0900430 .timer = &exynos4_timer,
Sachin Kamat1034b9f2012-07-19 14:43:24 +0900431 .reserve = &smdkv310_reserve,
Russell King9eb48592012-01-03 11:56:53 +0100432 .restart = exynos4_restart,
Kukjin Kim42c0d262011-08-18 21:14:28 +0900433MACHINE_END