Thomas Gleixner | d2912cb | 2019-06-04 10:11:33 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-only |
Andy Shevchenko | 4b45efe | 2015-07-27 18:04:03 +0300 | [diff] [blame] | 2 | /* |
| 3 | * Intel LPSS PCI support. |
| 4 | * |
| 5 | * Copyright (C) 2015, Intel Corporation |
| 6 | * |
| 7 | * Authors: Andy Shevchenko <andriy.shevchenko@linux.intel.com> |
| 8 | * Mika Westerberg <mika.westerberg@linux.intel.com> |
Andy Shevchenko | 4b45efe | 2015-07-27 18:04:03 +0300 | [diff] [blame] | 9 | */ |
| 10 | |
| 11 | #include <linux/ioport.h> |
| 12 | #include <linux/kernel.h> |
| 13 | #include <linux/module.h> |
| 14 | #include <linux/pci.h> |
Andy Shevchenko | 4b45efe | 2015-07-27 18:04:03 +0300 | [diff] [blame] | 15 | #include <linux/pm_runtime.h> |
Mika Westerberg | 028af59 | 2015-11-30 17:11:42 +0200 | [diff] [blame] | 16 | #include <linux/property.h> |
Andy Shevchenko | 4b45efe | 2015-07-27 18:04:03 +0300 | [diff] [blame] | 17 | |
| 18 | #include "intel-lpss.h" |
| 19 | |
| 20 | static int intel_lpss_pci_probe(struct pci_dev *pdev, |
| 21 | const struct pci_device_id *id) |
| 22 | { |
| 23 | struct intel_lpss_platform_info *info; |
| 24 | int ret; |
| 25 | |
| 26 | ret = pcim_enable_device(pdev); |
| 27 | if (ret) |
| 28 | return ret; |
| 29 | |
| 30 | info = devm_kmemdup(&pdev->dev, (void *)id->driver_data, sizeof(*info), |
| 31 | GFP_KERNEL); |
| 32 | if (!info) |
| 33 | return -ENOMEM; |
| 34 | |
| 35 | info->mem = &pdev->resource[0]; |
| 36 | info->irq = pdev->irq; |
| 37 | |
Kai-Heng Feng | 76380a6 | 2019-07-05 12:55:03 +0800 | [diff] [blame] | 38 | pdev->d3cold_delay = 0; |
| 39 | |
Andy Shevchenko | 4b45efe | 2015-07-27 18:04:03 +0300 | [diff] [blame] | 40 | /* Probably it is enough to set this for iDMA capable devices only */ |
| 41 | pci_set_master(pdev); |
Andy Shevchenko | 85a9419 | 2016-11-15 12:37:04 +0200 | [diff] [blame] | 42 | pci_try_set_mwi(pdev); |
Andy Shevchenko | 4b45efe | 2015-07-27 18:04:03 +0300 | [diff] [blame] | 43 | |
| 44 | ret = intel_lpss_probe(&pdev->dev, info); |
| 45 | if (ret) |
| 46 | return ret; |
| 47 | |
| 48 | pm_runtime_put(&pdev->dev); |
| 49 | pm_runtime_allow(&pdev->dev); |
| 50 | |
| 51 | return 0; |
| 52 | } |
| 53 | |
| 54 | static void intel_lpss_pci_remove(struct pci_dev *pdev) |
| 55 | { |
| 56 | pm_runtime_forbid(&pdev->dev); |
| 57 | pm_runtime_get_sync(&pdev->dev); |
| 58 | |
| 59 | intel_lpss_remove(&pdev->dev); |
| 60 | } |
| 61 | |
| 62 | static INTEL_LPSS_PM_OPS(intel_lpss_pci_pm_ops); |
| 63 | |
| 64 | static const struct intel_lpss_platform_info spt_info = { |
| 65 | .clk_rate = 120000000, |
| 66 | }; |
| 67 | |
Mika Westerberg | 028af59 | 2015-11-30 17:11:42 +0200 | [diff] [blame] | 68 | static struct property_entry spt_i2c_properties[] = { |
| 69 | PROPERTY_ENTRY_U32("i2c-sda-hold-time-ns", 230), |
| 70 | { }, |
| 71 | }; |
| 72 | |
Mika Westerberg | 028af59 | 2015-11-30 17:11:42 +0200 | [diff] [blame] | 73 | static const struct intel_lpss_platform_info spt_i2c_info = { |
| 74 | .clk_rate = 120000000, |
Heikki Krogerus | f4d0526 | 2016-03-29 14:52:23 +0300 | [diff] [blame] | 75 | .properties = spt_i2c_properties, |
Mika Westerberg | 028af59 | 2015-11-30 17:11:42 +0200 | [diff] [blame] | 76 | }; |
| 77 | |
Andy Shevchenko | ec14c53 | 2015-11-30 17:11:43 +0200 | [diff] [blame] | 78 | static struct property_entry uart_properties[] = { |
| 79 | PROPERTY_ENTRY_U32("reg-io-width", 4), |
| 80 | PROPERTY_ENTRY_U32("reg-shift", 2), |
| 81 | PROPERTY_ENTRY_BOOL("snps,uart-16550-compatible"), |
| 82 | { }, |
| 83 | }; |
| 84 | |
Andy Shevchenko | 4b45efe | 2015-07-27 18:04:03 +0300 | [diff] [blame] | 85 | static const struct intel_lpss_platform_info spt_uart_info = { |
| 86 | .clk_rate = 120000000, |
| 87 | .clk_con_id = "baudclk", |
Heikki Krogerus | f4d0526 | 2016-03-29 14:52:23 +0300 | [diff] [blame] | 88 | .properties = uart_properties, |
Andy Shevchenko | 4b45efe | 2015-07-27 18:04:03 +0300 | [diff] [blame] | 89 | }; |
| 90 | |
Andy Shevchenko | ff0a04a | 2015-10-21 12:41:48 +0300 | [diff] [blame] | 91 | static const struct intel_lpss_platform_info bxt_info = { |
| 92 | .clk_rate = 100000000, |
| 93 | }; |
| 94 | |
| 95 | static const struct intel_lpss_platform_info bxt_uart_info = { |
| 96 | .clk_rate = 100000000, |
| 97 | .clk_con_id = "baudclk", |
Heikki Krogerus | f4d0526 | 2016-03-29 14:52:23 +0300 | [diff] [blame] | 98 | .properties = uart_properties, |
Andy Shevchenko | ff0a04a | 2015-10-21 12:41:48 +0300 | [diff] [blame] | 99 | }; |
| 100 | |
Mika Westerberg | 0343b2f | 2016-01-26 14:17:49 +0200 | [diff] [blame] | 101 | static struct property_entry bxt_i2c_properties[] = { |
| 102 | PROPERTY_ENTRY_U32("i2c-sda-hold-time-ns", 42), |
| 103 | PROPERTY_ENTRY_U32("i2c-sda-falling-time-ns", 171), |
| 104 | PROPERTY_ENTRY_U32("i2c-scl-falling-time-ns", 208), |
| 105 | { }, |
| 106 | }; |
| 107 | |
Andy Shevchenko | ff0a04a | 2015-10-21 12:41:48 +0300 | [diff] [blame] | 108 | static const struct intel_lpss_platform_info bxt_i2c_info = { |
| 109 | .clk_rate = 133000000, |
Heikki Krogerus | f4d0526 | 2016-03-29 14:52:23 +0300 | [diff] [blame] | 110 | .properties = bxt_i2c_properties, |
Andy Shevchenko | ff0a04a | 2015-10-21 12:41:48 +0300 | [diff] [blame] | 111 | }; |
| 112 | |
Jarkko Nikula | c50cdd6 | 2016-09-12 14:41:33 +0300 | [diff] [blame] | 113 | static struct property_entry apl_i2c_properties[] = { |
| 114 | PROPERTY_ENTRY_U32("i2c-sda-hold-time-ns", 207), |
| 115 | PROPERTY_ENTRY_U32("i2c-sda-falling-time-ns", 171), |
| 116 | PROPERTY_ENTRY_U32("i2c-scl-falling-time-ns", 208), |
| 117 | { }, |
| 118 | }; |
| 119 | |
| 120 | static const struct intel_lpss_platform_info apl_i2c_info = { |
| 121 | .clk_rate = 133000000, |
| 122 | .properties = apl_i2c_properties, |
| 123 | }; |
| 124 | |
Jarkko Nikula | 3f31bc6 | 2019-09-04 08:56:25 +0300 | [diff] [blame] | 125 | static struct property_entry glk_i2c_properties[] = { |
| 126 | PROPERTY_ENTRY_U32("i2c-sda-hold-time-ns", 313), |
| 127 | PROPERTY_ENTRY_U32("i2c-sda-falling-time-ns", 171), |
| 128 | PROPERTY_ENTRY_U32("i2c-scl-falling-time-ns", 290), |
| 129 | { }, |
| 130 | }; |
| 131 | |
| 132 | static const struct intel_lpss_platform_info glk_i2c_info = { |
| 133 | .clk_rate = 133000000, |
| 134 | .properties = glk_i2c_properties, |
| 135 | }; |
| 136 | |
Jarkko Nikula | 4e93a65 | 2018-05-18 11:38:27 +0300 | [diff] [blame] | 137 | static const struct intel_lpss_platform_info cnl_i2c_info = { |
| 138 | .clk_rate = 216000000, |
| 139 | .properties = spt_i2c_properties, |
| 140 | }; |
| 141 | |
Jarkko Nikula | d2923aa | 2020-03-16 16:32:24 +0200 | [diff] [blame] | 142 | static const struct intel_lpss_platform_info ehl_i2c_info = { |
| 143 | .clk_rate = 100000000, |
| 144 | .properties = bxt_i2c_properties, |
| 145 | }; |
| 146 | |
Andy Shevchenko | 4b45efe | 2015-07-27 18:04:03 +0300 | [diff] [blame] | 147 | static const struct pci_device_id intel_lpss_pci_ids[] = { |
Andy Shevchenko | dd047dc | 2019-10-29 11:44:09 +0200 | [diff] [blame] | 148 | /* CML-LP */ |
Andy Shevchenko | dd66290 | 2019-04-30 19:56:26 +0300 | [diff] [blame] | 149 | { PCI_VDEVICE(INTEL, 0x02a8), (kernel_ulong_t)&spt_uart_info }, |
| 150 | { PCI_VDEVICE(INTEL, 0x02a9), (kernel_ulong_t)&spt_uart_info }, |
| 151 | { PCI_VDEVICE(INTEL, 0x02aa), (kernel_ulong_t)&spt_info }, |
| 152 | { PCI_VDEVICE(INTEL, 0x02ab), (kernel_ulong_t)&spt_info }, |
| 153 | { PCI_VDEVICE(INTEL, 0x02c5), (kernel_ulong_t)&cnl_i2c_info }, |
| 154 | { PCI_VDEVICE(INTEL, 0x02c6), (kernel_ulong_t)&cnl_i2c_info }, |
| 155 | { PCI_VDEVICE(INTEL, 0x02c7), (kernel_ulong_t)&spt_uart_info }, |
| 156 | { PCI_VDEVICE(INTEL, 0x02e8), (kernel_ulong_t)&cnl_i2c_info }, |
| 157 | { PCI_VDEVICE(INTEL, 0x02e9), (kernel_ulong_t)&cnl_i2c_info }, |
| 158 | { PCI_VDEVICE(INTEL, 0x02ea), (kernel_ulong_t)&cnl_i2c_info }, |
| 159 | { PCI_VDEVICE(INTEL, 0x02eb), (kernel_ulong_t)&cnl_i2c_info }, |
| 160 | { PCI_VDEVICE(INTEL, 0x02fb), (kernel_ulong_t)&spt_info }, |
Andy Shevchenko | dd047dc | 2019-10-29 11:44:09 +0200 | [diff] [blame] | 161 | /* CML-H */ |
| 162 | { PCI_VDEVICE(INTEL, 0x06a8), (kernel_ulong_t)&spt_uart_info }, |
| 163 | { PCI_VDEVICE(INTEL, 0x06a9), (kernel_ulong_t)&spt_uart_info }, |
| 164 | { PCI_VDEVICE(INTEL, 0x06aa), (kernel_ulong_t)&spt_info }, |
| 165 | { PCI_VDEVICE(INTEL, 0x06ab), (kernel_ulong_t)&spt_info }, |
| 166 | { PCI_VDEVICE(INTEL, 0x06c7), (kernel_ulong_t)&spt_uart_info }, |
| 167 | { PCI_VDEVICE(INTEL, 0x06e8), (kernel_ulong_t)&cnl_i2c_info }, |
| 168 | { PCI_VDEVICE(INTEL, 0x06e9), (kernel_ulong_t)&cnl_i2c_info }, |
| 169 | { PCI_VDEVICE(INTEL, 0x06ea), (kernel_ulong_t)&cnl_i2c_info }, |
| 170 | { PCI_VDEVICE(INTEL, 0x06eb), (kernel_ulong_t)&cnl_i2c_info }, |
| 171 | { PCI_VDEVICE(INTEL, 0x06fb), (kernel_ulong_t)&spt_info }, |
Huiquan Zhong | 023269c | 2016-01-15 00:12:31 +0800 | [diff] [blame] | 172 | /* BXT A-Step */ |
Andy Shevchenko | ff0a04a | 2015-10-21 12:41:48 +0300 | [diff] [blame] | 173 | { PCI_VDEVICE(INTEL, 0x0aac), (kernel_ulong_t)&bxt_i2c_info }, |
| 174 | { PCI_VDEVICE(INTEL, 0x0aae), (kernel_ulong_t)&bxt_i2c_info }, |
| 175 | { PCI_VDEVICE(INTEL, 0x0ab0), (kernel_ulong_t)&bxt_i2c_info }, |
| 176 | { PCI_VDEVICE(INTEL, 0x0ab2), (kernel_ulong_t)&bxt_i2c_info }, |
| 177 | { PCI_VDEVICE(INTEL, 0x0ab4), (kernel_ulong_t)&bxt_i2c_info }, |
| 178 | { PCI_VDEVICE(INTEL, 0x0ab6), (kernel_ulong_t)&bxt_i2c_info }, |
| 179 | { PCI_VDEVICE(INTEL, 0x0ab8), (kernel_ulong_t)&bxt_i2c_info }, |
| 180 | { PCI_VDEVICE(INTEL, 0x0aba), (kernel_ulong_t)&bxt_i2c_info }, |
| 181 | { PCI_VDEVICE(INTEL, 0x0abc), (kernel_ulong_t)&bxt_uart_info }, |
| 182 | { PCI_VDEVICE(INTEL, 0x0abe), (kernel_ulong_t)&bxt_uart_info }, |
| 183 | { PCI_VDEVICE(INTEL, 0x0ac0), (kernel_ulong_t)&bxt_uart_info }, |
| 184 | { PCI_VDEVICE(INTEL, 0x0ac2), (kernel_ulong_t)&bxt_info }, |
| 185 | { PCI_VDEVICE(INTEL, 0x0ac4), (kernel_ulong_t)&bxt_info }, |
| 186 | { PCI_VDEVICE(INTEL, 0x0ac6), (kernel_ulong_t)&bxt_info }, |
| 187 | { PCI_VDEVICE(INTEL, 0x0aee), (kernel_ulong_t)&bxt_uart_info }, |
Huiquan Zhong | 023269c | 2016-01-15 00:12:31 +0800 | [diff] [blame] | 188 | /* BXT B-Step */ |
| 189 | { PCI_VDEVICE(INTEL, 0x1aac), (kernel_ulong_t)&bxt_i2c_info }, |
| 190 | { PCI_VDEVICE(INTEL, 0x1aae), (kernel_ulong_t)&bxt_i2c_info }, |
| 191 | { PCI_VDEVICE(INTEL, 0x1ab0), (kernel_ulong_t)&bxt_i2c_info }, |
| 192 | { PCI_VDEVICE(INTEL, 0x1ab2), (kernel_ulong_t)&bxt_i2c_info }, |
| 193 | { PCI_VDEVICE(INTEL, 0x1ab4), (kernel_ulong_t)&bxt_i2c_info }, |
| 194 | { PCI_VDEVICE(INTEL, 0x1ab6), (kernel_ulong_t)&bxt_i2c_info }, |
| 195 | { PCI_VDEVICE(INTEL, 0x1ab8), (kernel_ulong_t)&bxt_i2c_info }, |
| 196 | { PCI_VDEVICE(INTEL, 0x1aba), (kernel_ulong_t)&bxt_i2c_info }, |
| 197 | { PCI_VDEVICE(INTEL, 0x1abc), (kernel_ulong_t)&bxt_uart_info }, |
| 198 | { PCI_VDEVICE(INTEL, 0x1abe), (kernel_ulong_t)&bxt_uart_info }, |
| 199 | { PCI_VDEVICE(INTEL, 0x1ac0), (kernel_ulong_t)&bxt_uart_info }, |
| 200 | { PCI_VDEVICE(INTEL, 0x1ac2), (kernel_ulong_t)&bxt_info }, |
| 201 | { PCI_VDEVICE(INTEL, 0x1ac4), (kernel_ulong_t)&bxt_info }, |
| 202 | { PCI_VDEVICE(INTEL, 0x1ac6), (kernel_ulong_t)&bxt_info }, |
| 203 | { PCI_VDEVICE(INTEL, 0x1aee), (kernel_ulong_t)&bxt_uart_info }, |
Andy Shevchenko | f80e78a | 2017-01-11 14:16:09 +0200 | [diff] [blame] | 204 | /* GLK */ |
Jarkko Nikula | 3f31bc6 | 2019-09-04 08:56:25 +0300 | [diff] [blame] | 205 | { PCI_VDEVICE(INTEL, 0x31ac), (kernel_ulong_t)&glk_i2c_info }, |
| 206 | { PCI_VDEVICE(INTEL, 0x31ae), (kernel_ulong_t)&glk_i2c_info }, |
| 207 | { PCI_VDEVICE(INTEL, 0x31b0), (kernel_ulong_t)&glk_i2c_info }, |
| 208 | { PCI_VDEVICE(INTEL, 0x31b2), (kernel_ulong_t)&glk_i2c_info }, |
| 209 | { PCI_VDEVICE(INTEL, 0x31b4), (kernel_ulong_t)&glk_i2c_info }, |
| 210 | { PCI_VDEVICE(INTEL, 0x31b6), (kernel_ulong_t)&glk_i2c_info }, |
| 211 | { PCI_VDEVICE(INTEL, 0x31b8), (kernel_ulong_t)&glk_i2c_info }, |
| 212 | { PCI_VDEVICE(INTEL, 0x31ba), (kernel_ulong_t)&glk_i2c_info }, |
Andy Shevchenko | f80e78a | 2017-01-11 14:16:09 +0200 | [diff] [blame] | 213 | { PCI_VDEVICE(INTEL, 0x31bc), (kernel_ulong_t)&bxt_uart_info }, |
| 214 | { PCI_VDEVICE(INTEL, 0x31be), (kernel_ulong_t)&bxt_uart_info }, |
| 215 | { PCI_VDEVICE(INTEL, 0x31c0), (kernel_ulong_t)&bxt_uart_info }, |
Andy Shevchenko | f80e78a | 2017-01-11 14:16:09 +0200 | [diff] [blame] | 216 | { PCI_VDEVICE(INTEL, 0x31c2), (kernel_ulong_t)&bxt_info }, |
| 217 | { PCI_VDEVICE(INTEL, 0x31c4), (kernel_ulong_t)&bxt_info }, |
| 218 | { PCI_VDEVICE(INTEL, 0x31c6), (kernel_ulong_t)&bxt_info }, |
Andy Shevchenko | f88314c | 2019-05-24 21:13:44 +0300 | [diff] [blame] | 219 | { PCI_VDEVICE(INTEL, 0x31ee), (kernel_ulong_t)&bxt_uart_info }, |
Mika Westerberg | a13c93b | 2018-06-27 23:48:08 +0300 | [diff] [blame] | 220 | /* ICL-LP */ |
| 221 | { PCI_VDEVICE(INTEL, 0x34a8), (kernel_ulong_t)&spt_uart_info }, |
| 222 | { PCI_VDEVICE(INTEL, 0x34a9), (kernel_ulong_t)&spt_uart_info }, |
| 223 | { PCI_VDEVICE(INTEL, 0x34aa), (kernel_ulong_t)&spt_info }, |
| 224 | { PCI_VDEVICE(INTEL, 0x34ab), (kernel_ulong_t)&spt_info }, |
| 225 | { PCI_VDEVICE(INTEL, 0x34c5), (kernel_ulong_t)&bxt_i2c_info }, |
| 226 | { PCI_VDEVICE(INTEL, 0x34c6), (kernel_ulong_t)&bxt_i2c_info }, |
| 227 | { PCI_VDEVICE(INTEL, 0x34c7), (kernel_ulong_t)&spt_uart_info }, |
| 228 | { PCI_VDEVICE(INTEL, 0x34e8), (kernel_ulong_t)&bxt_i2c_info }, |
| 229 | { PCI_VDEVICE(INTEL, 0x34e9), (kernel_ulong_t)&bxt_i2c_info }, |
| 230 | { PCI_VDEVICE(INTEL, 0x34ea), (kernel_ulong_t)&bxt_i2c_info }, |
| 231 | { PCI_VDEVICE(INTEL, 0x34eb), (kernel_ulong_t)&bxt_i2c_info }, |
| 232 | { PCI_VDEVICE(INTEL, 0x34fb), (kernel_ulong_t)&spt_info }, |
Andy Shevchenko | 01e4ece | 2019-06-21 15:58:07 +0300 | [diff] [blame] | 233 | /* EHL */ |
| 234 | { PCI_VDEVICE(INTEL, 0x4b28), (kernel_ulong_t)&bxt_uart_info }, |
| 235 | { PCI_VDEVICE(INTEL, 0x4b29), (kernel_ulong_t)&bxt_uart_info }, |
| 236 | { PCI_VDEVICE(INTEL, 0x4b2a), (kernel_ulong_t)&bxt_info }, |
| 237 | { PCI_VDEVICE(INTEL, 0x4b2b), (kernel_ulong_t)&bxt_info }, |
| 238 | { PCI_VDEVICE(INTEL, 0x4b37), (kernel_ulong_t)&bxt_info }, |
Jarkko Nikula | d2923aa | 2020-03-16 16:32:24 +0200 | [diff] [blame] | 239 | { PCI_VDEVICE(INTEL, 0x4b44), (kernel_ulong_t)&ehl_i2c_info }, |
| 240 | { PCI_VDEVICE(INTEL, 0x4b45), (kernel_ulong_t)&ehl_i2c_info }, |
| 241 | { PCI_VDEVICE(INTEL, 0x4b4b), (kernel_ulong_t)&ehl_i2c_info }, |
| 242 | { PCI_VDEVICE(INTEL, 0x4b4c), (kernel_ulong_t)&ehl_i2c_info }, |
Andy Shevchenko | 01e4ece | 2019-06-21 15:58:07 +0300 | [diff] [blame] | 243 | { PCI_VDEVICE(INTEL, 0x4b4d), (kernel_ulong_t)&bxt_uart_info }, |
Jarkko Nikula | d2923aa | 2020-03-16 16:32:24 +0200 | [diff] [blame] | 244 | { PCI_VDEVICE(INTEL, 0x4b78), (kernel_ulong_t)&ehl_i2c_info }, |
| 245 | { PCI_VDEVICE(INTEL, 0x4b79), (kernel_ulong_t)&ehl_i2c_info }, |
| 246 | { PCI_VDEVICE(INTEL, 0x4b7a), (kernel_ulong_t)&ehl_i2c_info }, |
| 247 | { PCI_VDEVICE(INTEL, 0x4b7b), (kernel_ulong_t)&ehl_i2c_info }, |
Andy Shevchenko | 57b89dd | 2019-12-09 16:15:07 +0200 | [diff] [blame] | 248 | /* JSL */ |
| 249 | { PCI_VDEVICE(INTEL, 0x4da8), (kernel_ulong_t)&spt_uart_info }, |
| 250 | { PCI_VDEVICE(INTEL, 0x4da9), (kernel_ulong_t)&spt_uart_info }, |
| 251 | { PCI_VDEVICE(INTEL, 0x4daa), (kernel_ulong_t)&spt_info }, |
| 252 | { PCI_VDEVICE(INTEL, 0x4dab), (kernel_ulong_t)&spt_info }, |
Andy Shevchenko | 57b89dd | 2019-12-09 16:15:07 +0200 | [diff] [blame] | 253 | { PCI_VDEVICE(INTEL, 0x4dc5), (kernel_ulong_t)&bxt_i2c_info }, |
| 254 | { PCI_VDEVICE(INTEL, 0x4dc6), (kernel_ulong_t)&bxt_i2c_info }, |
Andy Shevchenko | 9a87524 | 2020-04-14 12:51:34 +0300 | [diff] [blame] | 255 | { PCI_VDEVICE(INTEL, 0x4dc7), (kernel_ulong_t)&spt_uart_info }, |
Andy Shevchenko | 57b89dd | 2019-12-09 16:15:07 +0200 | [diff] [blame] | 256 | { PCI_VDEVICE(INTEL, 0x4de8), (kernel_ulong_t)&bxt_i2c_info }, |
| 257 | { PCI_VDEVICE(INTEL, 0x4de9), (kernel_ulong_t)&bxt_i2c_info }, |
| 258 | { PCI_VDEVICE(INTEL, 0x4dea), (kernel_ulong_t)&bxt_i2c_info }, |
| 259 | { PCI_VDEVICE(INTEL, 0x4deb), (kernel_ulong_t)&bxt_i2c_info }, |
| 260 | { PCI_VDEVICE(INTEL, 0x4dfb), (kernel_ulong_t)&spt_info }, |
Andy Shevchenko | ff0a04a | 2015-10-21 12:41:48 +0300 | [diff] [blame] | 261 | /* APL */ |
Jarkko Nikula | c50cdd6 | 2016-09-12 14:41:33 +0300 | [diff] [blame] | 262 | { PCI_VDEVICE(INTEL, 0x5aac), (kernel_ulong_t)&apl_i2c_info }, |
| 263 | { PCI_VDEVICE(INTEL, 0x5aae), (kernel_ulong_t)&apl_i2c_info }, |
| 264 | { PCI_VDEVICE(INTEL, 0x5ab0), (kernel_ulong_t)&apl_i2c_info }, |
| 265 | { PCI_VDEVICE(INTEL, 0x5ab2), (kernel_ulong_t)&apl_i2c_info }, |
| 266 | { PCI_VDEVICE(INTEL, 0x5ab4), (kernel_ulong_t)&apl_i2c_info }, |
| 267 | { PCI_VDEVICE(INTEL, 0x5ab6), (kernel_ulong_t)&apl_i2c_info }, |
| 268 | { PCI_VDEVICE(INTEL, 0x5ab8), (kernel_ulong_t)&apl_i2c_info }, |
| 269 | { PCI_VDEVICE(INTEL, 0x5aba), (kernel_ulong_t)&apl_i2c_info }, |
Andy Shevchenko | ff0a04a | 2015-10-21 12:41:48 +0300 | [diff] [blame] | 270 | { PCI_VDEVICE(INTEL, 0x5abc), (kernel_ulong_t)&bxt_uart_info }, |
| 271 | { PCI_VDEVICE(INTEL, 0x5abe), (kernel_ulong_t)&bxt_uart_info }, |
| 272 | { PCI_VDEVICE(INTEL, 0x5ac0), (kernel_ulong_t)&bxt_uart_info }, |
| 273 | { PCI_VDEVICE(INTEL, 0x5ac2), (kernel_ulong_t)&bxt_info }, |
| 274 | { PCI_VDEVICE(INTEL, 0x5ac4), (kernel_ulong_t)&bxt_info }, |
| 275 | { PCI_VDEVICE(INTEL, 0x5ac6), (kernel_ulong_t)&bxt_info }, |
| 276 | { PCI_VDEVICE(INTEL, 0x5aee), (kernel_ulong_t)&bxt_uart_info }, |
Andy Shevchenko | 4b45efe | 2015-07-27 18:04:03 +0300 | [diff] [blame] | 277 | /* SPT-LP */ |
| 278 | { PCI_VDEVICE(INTEL, 0x9d27), (kernel_ulong_t)&spt_uart_info }, |
| 279 | { PCI_VDEVICE(INTEL, 0x9d28), (kernel_ulong_t)&spt_uart_info }, |
| 280 | { PCI_VDEVICE(INTEL, 0x9d29), (kernel_ulong_t)&spt_info }, |
| 281 | { PCI_VDEVICE(INTEL, 0x9d2a), (kernel_ulong_t)&spt_info }, |
Mika Westerberg | 028af59 | 2015-11-30 17:11:42 +0200 | [diff] [blame] | 282 | { PCI_VDEVICE(INTEL, 0x9d60), (kernel_ulong_t)&spt_i2c_info }, |
| 283 | { PCI_VDEVICE(INTEL, 0x9d61), (kernel_ulong_t)&spt_i2c_info }, |
| 284 | { PCI_VDEVICE(INTEL, 0x9d62), (kernel_ulong_t)&spt_i2c_info }, |
| 285 | { PCI_VDEVICE(INTEL, 0x9d63), (kernel_ulong_t)&spt_i2c_info }, |
| 286 | { PCI_VDEVICE(INTEL, 0x9d64), (kernel_ulong_t)&spt_i2c_info }, |
| 287 | { PCI_VDEVICE(INTEL, 0x9d65), (kernel_ulong_t)&spt_i2c_info }, |
Andy Shevchenko | 4b45efe | 2015-07-27 18:04:03 +0300 | [diff] [blame] | 288 | { PCI_VDEVICE(INTEL, 0x9d66), (kernel_ulong_t)&spt_uart_info }, |
Andy Shevchenko | b418bbf | 2017-05-15 11:23:14 +0300 | [diff] [blame] | 289 | /* CNL-LP */ |
| 290 | { PCI_VDEVICE(INTEL, 0x9da8), (kernel_ulong_t)&spt_uart_info }, |
| 291 | { PCI_VDEVICE(INTEL, 0x9da9), (kernel_ulong_t)&spt_uart_info }, |
| 292 | { PCI_VDEVICE(INTEL, 0x9daa), (kernel_ulong_t)&spt_info }, |
| 293 | { PCI_VDEVICE(INTEL, 0x9dab), (kernel_ulong_t)&spt_info }, |
Jarkko Nikula | 4e93a65 | 2018-05-18 11:38:27 +0300 | [diff] [blame] | 294 | { PCI_VDEVICE(INTEL, 0x9dc5), (kernel_ulong_t)&cnl_i2c_info }, |
| 295 | { PCI_VDEVICE(INTEL, 0x9dc6), (kernel_ulong_t)&cnl_i2c_info }, |
Andy Shevchenko | b418bbf | 2017-05-15 11:23:14 +0300 | [diff] [blame] | 296 | { PCI_VDEVICE(INTEL, 0x9dc7), (kernel_ulong_t)&spt_uart_info }, |
Jarkko Nikula | 4e93a65 | 2018-05-18 11:38:27 +0300 | [diff] [blame] | 297 | { PCI_VDEVICE(INTEL, 0x9de8), (kernel_ulong_t)&cnl_i2c_info }, |
| 298 | { PCI_VDEVICE(INTEL, 0x9de9), (kernel_ulong_t)&cnl_i2c_info }, |
| 299 | { PCI_VDEVICE(INTEL, 0x9dea), (kernel_ulong_t)&cnl_i2c_info }, |
| 300 | { PCI_VDEVICE(INTEL, 0x9deb), (kernel_ulong_t)&cnl_i2c_info }, |
Andy Shevchenko | f88314c | 2019-05-24 21:13:44 +0300 | [diff] [blame] | 301 | { PCI_VDEVICE(INTEL, 0x9dfb), (kernel_ulong_t)&spt_info }, |
Andy Shevchenko | ec65b56 | 2019-08-01 16:28:41 +0300 | [diff] [blame] | 302 | /* TGL-LP */ |
| 303 | { PCI_VDEVICE(INTEL, 0xa0a8), (kernel_ulong_t)&bxt_uart_info }, |
| 304 | { PCI_VDEVICE(INTEL, 0xa0a9), (kernel_ulong_t)&bxt_uart_info }, |
| 305 | { PCI_VDEVICE(INTEL, 0xa0aa), (kernel_ulong_t)&spt_info }, |
| 306 | { PCI_VDEVICE(INTEL, 0xa0ab), (kernel_ulong_t)&spt_info }, |
| 307 | { PCI_VDEVICE(INTEL, 0xa0c5), (kernel_ulong_t)&spt_i2c_info }, |
| 308 | { PCI_VDEVICE(INTEL, 0xa0c6), (kernel_ulong_t)&spt_i2c_info }, |
| 309 | { PCI_VDEVICE(INTEL, 0xa0c7), (kernel_ulong_t)&bxt_uart_info }, |
| 310 | { PCI_VDEVICE(INTEL, 0xa0d8), (kernel_ulong_t)&spt_i2c_info }, |
| 311 | { PCI_VDEVICE(INTEL, 0xa0d9), (kernel_ulong_t)&spt_i2c_info }, |
| 312 | { PCI_VDEVICE(INTEL, 0xa0da), (kernel_ulong_t)&bxt_uart_info }, |
| 313 | { PCI_VDEVICE(INTEL, 0xa0db), (kernel_ulong_t)&bxt_uart_info }, |
| 314 | { PCI_VDEVICE(INTEL, 0xa0dc), (kernel_ulong_t)&bxt_uart_info }, |
| 315 | { PCI_VDEVICE(INTEL, 0xa0dd), (kernel_ulong_t)&bxt_uart_info }, |
| 316 | { PCI_VDEVICE(INTEL, 0xa0de), (kernel_ulong_t)&spt_info }, |
| 317 | { PCI_VDEVICE(INTEL, 0xa0df), (kernel_ulong_t)&spt_info }, |
| 318 | { PCI_VDEVICE(INTEL, 0xa0e8), (kernel_ulong_t)&spt_i2c_info }, |
| 319 | { PCI_VDEVICE(INTEL, 0xa0e9), (kernel_ulong_t)&spt_i2c_info }, |
| 320 | { PCI_VDEVICE(INTEL, 0xa0ea), (kernel_ulong_t)&spt_i2c_info }, |
| 321 | { PCI_VDEVICE(INTEL, 0xa0eb), (kernel_ulong_t)&spt_i2c_info }, |
| 322 | { PCI_VDEVICE(INTEL, 0xa0fb), (kernel_ulong_t)&spt_info }, |
| 323 | { PCI_VDEVICE(INTEL, 0xa0fd), (kernel_ulong_t)&spt_info }, |
| 324 | { PCI_VDEVICE(INTEL, 0xa0fe), (kernel_ulong_t)&spt_info }, |
Andy Shevchenko | 4b45efe | 2015-07-27 18:04:03 +0300 | [diff] [blame] | 325 | /* SPT-H */ |
| 326 | { PCI_VDEVICE(INTEL, 0xa127), (kernel_ulong_t)&spt_uart_info }, |
| 327 | { PCI_VDEVICE(INTEL, 0xa128), (kernel_ulong_t)&spt_uart_info }, |
| 328 | { PCI_VDEVICE(INTEL, 0xa129), (kernel_ulong_t)&spt_info }, |
| 329 | { PCI_VDEVICE(INTEL, 0xa12a), (kernel_ulong_t)&spt_info }, |
Mika Westerberg | 028af59 | 2015-11-30 17:11:42 +0200 | [diff] [blame] | 330 | { PCI_VDEVICE(INTEL, 0xa160), (kernel_ulong_t)&spt_i2c_info }, |
| 331 | { PCI_VDEVICE(INTEL, 0xa161), (kernel_ulong_t)&spt_i2c_info }, |
Florian R. Hölzlwimmer | e4b9147 | 2017-08-19 15:26:49 +0200 | [diff] [blame] | 332 | { PCI_VDEVICE(INTEL, 0xa162), (kernel_ulong_t)&spt_i2c_info }, |
Andy Shevchenko | 4b45efe | 2015-07-27 18:04:03 +0300 | [diff] [blame] | 333 | { PCI_VDEVICE(INTEL, 0xa166), (kernel_ulong_t)&spt_uart_info }, |
Mika Westerberg | 77fc5ff | 2016-07-04 18:24:54 +0300 | [diff] [blame] | 334 | /* KBL-H */ |
Jarkko Nikula | 2c8c341 | 2016-09-29 12:59:39 +0300 | [diff] [blame] | 335 | { PCI_VDEVICE(INTEL, 0xa2a7), (kernel_ulong_t)&spt_uart_info }, |
| 336 | { PCI_VDEVICE(INTEL, 0xa2a8), (kernel_ulong_t)&spt_uart_info }, |
| 337 | { PCI_VDEVICE(INTEL, 0xa2a9), (kernel_ulong_t)&spt_info }, |
| 338 | { PCI_VDEVICE(INTEL, 0xa2aa), (kernel_ulong_t)&spt_info }, |
| 339 | { PCI_VDEVICE(INTEL, 0xa2e0), (kernel_ulong_t)&spt_i2c_info }, |
| 340 | { PCI_VDEVICE(INTEL, 0xa2e1), (kernel_ulong_t)&spt_i2c_info }, |
| 341 | { PCI_VDEVICE(INTEL, 0xa2e2), (kernel_ulong_t)&spt_i2c_info }, |
| 342 | { PCI_VDEVICE(INTEL, 0xa2e3), (kernel_ulong_t)&spt_i2c_info }, |
| 343 | { PCI_VDEVICE(INTEL, 0xa2e6), (kernel_ulong_t)&spt_uart_info }, |
Andy Shevchenko | b418bbf | 2017-05-15 11:23:14 +0300 | [diff] [blame] | 344 | /* CNL-H */ |
| 345 | { PCI_VDEVICE(INTEL, 0xa328), (kernel_ulong_t)&spt_uart_info }, |
| 346 | { PCI_VDEVICE(INTEL, 0xa329), (kernel_ulong_t)&spt_uart_info }, |
| 347 | { PCI_VDEVICE(INTEL, 0xa32a), (kernel_ulong_t)&spt_info }, |
| 348 | { PCI_VDEVICE(INTEL, 0xa32b), (kernel_ulong_t)&spt_info }, |
Andy Shevchenko | b418bbf | 2017-05-15 11:23:14 +0300 | [diff] [blame] | 349 | { PCI_VDEVICE(INTEL, 0xa347), (kernel_ulong_t)&spt_uart_info }, |
Jarkko Nikula | 4e93a65 | 2018-05-18 11:38:27 +0300 | [diff] [blame] | 350 | { PCI_VDEVICE(INTEL, 0xa368), (kernel_ulong_t)&cnl_i2c_info }, |
| 351 | { PCI_VDEVICE(INTEL, 0xa369), (kernel_ulong_t)&cnl_i2c_info }, |
| 352 | { PCI_VDEVICE(INTEL, 0xa36a), (kernel_ulong_t)&cnl_i2c_info }, |
| 353 | { PCI_VDEVICE(INTEL, 0xa36b), (kernel_ulong_t)&cnl_i2c_info }, |
Andy Shevchenko | f88314c | 2019-05-24 21:13:44 +0300 | [diff] [blame] | 354 | { PCI_VDEVICE(INTEL, 0xa37b), (kernel_ulong_t)&spt_info }, |
Andy Shevchenko | 4e213b4 | 2020-01-13 14:57:29 +0200 | [diff] [blame] | 355 | /* CML-V */ |
| 356 | { PCI_VDEVICE(INTEL, 0xa3a7), (kernel_ulong_t)&spt_uart_info }, |
| 357 | { PCI_VDEVICE(INTEL, 0xa3a8), (kernel_ulong_t)&spt_uart_info }, |
| 358 | { PCI_VDEVICE(INTEL, 0xa3a9), (kernel_ulong_t)&spt_info }, |
| 359 | { PCI_VDEVICE(INTEL, 0xa3aa), (kernel_ulong_t)&spt_info }, |
| 360 | { PCI_VDEVICE(INTEL, 0xa3e0), (kernel_ulong_t)&spt_i2c_info }, |
| 361 | { PCI_VDEVICE(INTEL, 0xa3e1), (kernel_ulong_t)&spt_i2c_info }, |
| 362 | { PCI_VDEVICE(INTEL, 0xa3e2), (kernel_ulong_t)&spt_i2c_info }, |
| 363 | { PCI_VDEVICE(INTEL, 0xa3e3), (kernel_ulong_t)&spt_i2c_info }, |
| 364 | { PCI_VDEVICE(INTEL, 0xa3e6), (kernel_ulong_t)&spt_uart_info }, |
Andy Shevchenko | 4b45efe | 2015-07-27 18:04:03 +0300 | [diff] [blame] | 365 | { } |
| 366 | }; |
| 367 | MODULE_DEVICE_TABLE(pci, intel_lpss_pci_ids); |
| 368 | |
| 369 | static struct pci_driver intel_lpss_pci_driver = { |
| 370 | .name = "intel-lpss", |
| 371 | .id_table = intel_lpss_pci_ids, |
| 372 | .probe = intel_lpss_pci_probe, |
| 373 | .remove = intel_lpss_pci_remove, |
| 374 | .driver = { |
| 375 | .pm = &intel_lpss_pci_pm_ops, |
| 376 | }, |
| 377 | }; |
| 378 | |
| 379 | module_pci_driver(intel_lpss_pci_driver); |
| 380 | |
| 381 | MODULE_AUTHOR("Andy Shevchenko <andriy.shevchenko@linux.intel.com>"); |
| 382 | MODULE_AUTHOR("Mika Westerberg <mika.westerberg@linux.intel.com>"); |
| 383 | MODULE_DESCRIPTION("Intel LPSS PCI driver"); |
| 384 | MODULE_LICENSE("GPL v2"); |