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Bryan Wu2f6f4bc2008-11-18 17:48:21 +08001/*
Robin Getz96f10502009-09-24 14:11:24 +00002 * Copyright 2008-2009 Analog Devices Inc.
Bryan Wu2f6f4bc2008-11-18 17:48:21 +08003 *
Robin Getz96f10502009-09-24 14:11:24 +00004 * Licensed under the GPL-2 or later
Bryan Wu2f6f4bc2008-11-18 17:48:21 +08005 */
6
7#ifndef _CDEF_BF516_H
8#define _CDEF_BF516_H
9
10/* include all Core registers and bit definitions */
11#include "defBF516.h"
12
13/* include core specific register pointer definitions */
14#include <asm/cdef_LPBlackfin.h>
15
16/* SYSTEM & MMR ADDRESS DEFINITIONS FOR ADSP-BF516 */
17
18/* include cdefBF51x_base.h for the set of #defines that are common to all ADSP-BF51x processors */
19#include "cdefBF51x_base.h"
20
21/* The following are the #defines needed by ADSP-BF516 that are not in the common header */
22
Sonic Zhang39ca4452009-01-07 23:14:39 +080023/* 10/100 Ethernet Controller (0xFFC03000 - 0xFFC031FF) */
24
25#define bfin_read_EMAC_OPMODE() bfin_read32(EMAC_OPMODE)
26#define bfin_write_EMAC_OPMODE(val) bfin_write32(EMAC_OPMODE, val)
27#define bfin_read_EMAC_ADDRLO() bfin_read32(EMAC_ADDRLO)
28#define bfin_write_EMAC_ADDRLO(val) bfin_write32(EMAC_ADDRLO, val)
29#define bfin_read_EMAC_ADDRHI() bfin_read32(EMAC_ADDRHI)
30#define bfin_write_EMAC_ADDRHI(val) bfin_write32(EMAC_ADDRHI, val)
31#define bfin_read_EMAC_HASHLO() bfin_read32(EMAC_HASHLO)
32#define bfin_write_EMAC_HASHLO(val) bfin_write32(EMAC_HASHLO, val)
33#define bfin_read_EMAC_HASHHI() bfin_read32(EMAC_HASHHI)
34#define bfin_write_EMAC_HASHHI(val) bfin_write32(EMAC_HASHHI, val)
35#define bfin_read_EMAC_STAADD() bfin_read32(EMAC_STAADD)
36#define bfin_write_EMAC_STAADD(val) bfin_write32(EMAC_STAADD, val)
37#define bfin_read_EMAC_STADAT() bfin_read32(EMAC_STADAT)
38#define bfin_write_EMAC_STADAT(val) bfin_write32(EMAC_STADAT, val)
39#define bfin_read_EMAC_FLC() bfin_read32(EMAC_FLC)
40#define bfin_write_EMAC_FLC(val) bfin_write32(EMAC_FLC, val)
41#define bfin_read_EMAC_VLAN1() bfin_read32(EMAC_VLAN1)
42#define bfin_write_EMAC_VLAN1(val) bfin_write32(EMAC_VLAN1, val)
43#define bfin_read_EMAC_VLAN2() bfin_read32(EMAC_VLAN2)
44#define bfin_write_EMAC_VLAN2(val) bfin_write32(EMAC_VLAN2, val)
45#define bfin_read_EMAC_WKUP_CTL() bfin_read32(EMAC_WKUP_CTL)
46#define bfin_write_EMAC_WKUP_CTL(val) bfin_write32(EMAC_WKUP_CTL, val)
47#define bfin_read_EMAC_WKUP_FFMSK0() bfin_read32(EMAC_WKUP_FFMSK0)
48#define bfin_write_EMAC_WKUP_FFMSK0(val) bfin_write32(EMAC_WKUP_FFMSK0, val)
49#define bfin_read_EMAC_WKUP_FFMSK1() bfin_read32(EMAC_WKUP_FFMSK1)
50#define bfin_write_EMAC_WKUP_FFMSK1(val) bfin_write32(EMAC_WKUP_FFMSK1, val)
51#define bfin_read_EMAC_WKUP_FFMSK2() bfin_read32(EMAC_WKUP_FFMSK2)
52#define bfin_write_EMAC_WKUP_FFMSK2(val) bfin_write32(EMAC_WKUP_FFMSK2, val)
53#define bfin_read_EMAC_WKUP_FFMSK3() bfin_read32(EMAC_WKUP_FFMSK3)
54#define bfin_write_EMAC_WKUP_FFMSK3(val) bfin_write32(EMAC_WKUP_FFMSK3, val)
55#define bfin_read_EMAC_WKUP_FFCMD() bfin_read32(EMAC_WKUP_FFCMD)
56#define bfin_write_EMAC_WKUP_FFCMD(val) bfin_write32(EMAC_WKUP_FFCMD, val)
57#define bfin_read_EMAC_WKUP_FFOFF() bfin_read32(EMAC_WKUP_FFOFF)
58#define bfin_write_EMAC_WKUP_FFOFF(val) bfin_write32(EMAC_WKUP_FFOFF, val)
59#define bfin_read_EMAC_WKUP_FFCRC0() bfin_read32(EMAC_WKUP_FFCRC0)
60#define bfin_write_EMAC_WKUP_FFCRC0(val) bfin_write32(EMAC_WKUP_FFCRC0, val)
61#define bfin_read_EMAC_WKUP_FFCRC1() bfin_read32(EMAC_WKUP_FFCRC1)
62#define bfin_write_EMAC_WKUP_FFCRC1(val) bfin_write32(EMAC_WKUP_FFCRC1, val)
63
64#define bfin_read_EMAC_SYSCTL() bfin_read32(EMAC_SYSCTL)
65#define bfin_write_EMAC_SYSCTL(val) bfin_write32(EMAC_SYSCTL, val)
66#define bfin_read_EMAC_SYSTAT() bfin_read32(EMAC_SYSTAT)
67#define bfin_write_EMAC_SYSTAT(val) bfin_write32(EMAC_SYSTAT, val)
68#define bfin_read_EMAC_RX_STAT() bfin_read32(EMAC_RX_STAT)
69#define bfin_write_EMAC_RX_STAT(val) bfin_write32(EMAC_RX_STAT, val)
70#define bfin_read_EMAC_RX_STKY() bfin_read32(EMAC_RX_STKY)
71#define bfin_write_EMAC_RX_STKY(val) bfin_write32(EMAC_RX_STKY, val)
72#define bfin_read_EMAC_RX_IRQE() bfin_read32(EMAC_RX_IRQE)
73#define bfin_write_EMAC_RX_IRQE(val) bfin_write32(EMAC_RX_IRQE, val)
74#define bfin_read_EMAC_TX_STAT() bfin_read32(EMAC_TX_STAT)
75#define bfin_write_EMAC_TX_STAT(val) bfin_write32(EMAC_TX_STAT, val)
76#define bfin_read_EMAC_TX_STKY() bfin_read32(EMAC_TX_STKY)
77#define bfin_write_EMAC_TX_STKY(val) bfin_write32(EMAC_TX_STKY, val)
78#define bfin_read_EMAC_TX_IRQE() bfin_read32(EMAC_TX_IRQE)
79#define bfin_write_EMAC_TX_IRQE(val) bfin_write32(EMAC_TX_IRQE, val)
80
81#define bfin_read_EMAC_MMC_CTL() bfin_read32(EMAC_MMC_CTL)
82#define bfin_write_EMAC_MMC_CTL(val) bfin_write32(EMAC_MMC_CTL, val)
83#define bfin_read_EMAC_MMC_RIRQS() bfin_read32(EMAC_MMC_RIRQS)
84#define bfin_write_EMAC_MMC_RIRQS(val) bfin_write32(EMAC_MMC_RIRQS, val)
85#define bfin_read_EMAC_MMC_RIRQE() bfin_read32(EMAC_MMC_RIRQE)
86#define bfin_write_EMAC_MMC_RIRQE(val) bfin_write32(EMAC_MMC_RIRQE, val)
87#define bfin_read_EMAC_MMC_TIRQS() bfin_read32(EMAC_MMC_TIRQS)
88#define bfin_write_EMAC_MMC_TIRQS(val) bfin_write32(EMAC_MMC_TIRQS, val)
89#define bfin_read_EMAC_MMC_TIRQE() bfin_read32(EMAC_MMC_TIRQE)
90#define bfin_write_EMAC_MMC_TIRQE(val) bfin_write32(EMAC_MMC_TIRQE, val)
91
92#define bfin_read_EMAC_RXC_OK() bfin_read32(EMAC_RXC_OK)
93#define bfin_write_EMAC_RXC_OK(val) bfin_write32(EMAC_RXC_OK, val)
94#define bfin_read_EMAC_RXC_FCS() bfin_read32(EMAC_RXC_FCS)
95#define bfin_write_EMAC_RXC_FCS(val) bfin_write32(EMAC_RXC_FCS, val)
96#define bfin_read_EMAC_RXC_ALIGN() bfin_read32(EMAC_RXC_ALIGN)
97#define bfin_write_EMAC_RXC_ALIGN(val) bfin_write32(EMAC_RXC_ALIGN, val)
98#define bfin_read_EMAC_RXC_OCTET() bfin_read32(EMAC_RXC_OCTET)
99#define bfin_write_EMAC_RXC_OCTET(val) bfin_write32(EMAC_RXC_OCTET, val)
100#define bfin_read_EMAC_RXC_DMAOVF() bfin_read32(EMAC_RXC_DMAOVF)
101#define bfin_write_EMAC_RXC_DMAOVF(val) bfin_write32(EMAC_RXC_DMAOVF, val)
102#define bfin_read_EMAC_RXC_UNICST() bfin_read32(EMAC_RXC_UNICST)
103#define bfin_write_EMAC_RXC_UNICST(val) bfin_write32(EMAC_RXC_UNICST, val)
104#define bfin_read_EMAC_RXC_MULTI() bfin_read32(EMAC_RXC_MULTI)
105#define bfin_write_EMAC_RXC_MULTI(val) bfin_write32(EMAC_RXC_MULTI, val)
106#define bfin_read_EMAC_RXC_BROAD() bfin_read32(EMAC_RXC_BROAD)
107#define bfin_write_EMAC_RXC_BROAD(val) bfin_write32(EMAC_RXC_BROAD, val)
108#define bfin_read_EMAC_RXC_LNERRI() bfin_read32(EMAC_RXC_LNERRI)
109#define bfin_write_EMAC_RXC_LNERRI(val) bfin_write32(EMAC_RXC_LNERRI, val)
110#define bfin_read_EMAC_RXC_LNERRO() bfin_read32(EMAC_RXC_LNERRO)
111#define bfin_write_EMAC_RXC_LNERRO(val) bfin_write32(EMAC_RXC_LNERRO, val)
112#define bfin_read_EMAC_RXC_LONG() bfin_read32(EMAC_RXC_LONG)
113#define bfin_write_EMAC_RXC_LONG(val) bfin_write32(EMAC_RXC_LONG, val)
114#define bfin_read_EMAC_RXC_MACCTL() bfin_read32(EMAC_RXC_MACCTL)
115#define bfin_write_EMAC_RXC_MACCTL(val) bfin_write32(EMAC_RXC_MACCTL, val)
116#define bfin_read_EMAC_RXC_OPCODE() bfin_read32(EMAC_RXC_OPCODE)
117#define bfin_write_EMAC_RXC_OPCODE(val) bfin_write32(EMAC_RXC_OPCODE, val)
118#define bfin_read_EMAC_RXC_PAUSE() bfin_read32(EMAC_RXC_PAUSE)
119#define bfin_write_EMAC_RXC_PAUSE(val) bfin_write32(EMAC_RXC_PAUSE, val)
120#define bfin_read_EMAC_RXC_ALLFRM() bfin_read32(EMAC_RXC_ALLFRM)
121#define bfin_write_EMAC_RXC_ALLFRM(val) bfin_write32(EMAC_RXC_ALLFRM, val)
122#define bfin_read_EMAC_RXC_ALLOCT() bfin_read32(EMAC_RXC_ALLOCT)
123#define bfin_write_EMAC_RXC_ALLOCT(val) bfin_write32(EMAC_RXC_ALLOCT, val)
124#define bfin_read_EMAC_RXC_TYPED() bfin_read32(EMAC_RXC_TYPED)
125#define bfin_write_EMAC_RXC_TYPED(val) bfin_write32(EMAC_RXC_TYPED, val)
126#define bfin_read_EMAC_RXC_SHORT() bfin_read32(EMAC_RXC_SHORT)
127#define bfin_write_EMAC_RXC_SHORT(val) bfin_write32(EMAC_RXC_SHORT, val)
128#define bfin_read_EMAC_RXC_EQ64() bfin_read32(EMAC_RXC_EQ64)
129#define bfin_write_EMAC_RXC_EQ64(val) bfin_write32(EMAC_RXC_EQ64, val)
130#define bfin_read_EMAC_RXC_LT128() bfin_read32(EMAC_RXC_LT128)
131#define bfin_write_EMAC_RXC_LT128(val) bfin_write32(EMAC_RXC_LT128, val)
132#define bfin_read_EMAC_RXC_LT256() bfin_read32(EMAC_RXC_LT256)
133#define bfin_write_EMAC_RXC_LT256(val) bfin_write32(EMAC_RXC_LT256, val)
134#define bfin_read_EMAC_RXC_LT512() bfin_read32(EMAC_RXC_LT512)
135#define bfin_write_EMAC_RXC_LT512(val) bfin_write32(EMAC_RXC_LT512, val)
136#define bfin_read_EMAC_RXC_LT1024() bfin_read32(EMAC_RXC_LT1024)
137#define bfin_write_EMAC_RXC_LT1024(val) bfin_write32(EMAC_RXC_LT1024, val)
138#define bfin_read_EMAC_RXC_GE1024() bfin_read32(EMAC_RXC_GE1024)
139#define bfin_write_EMAC_RXC_GE1024(val) bfin_write32(EMAC_RXC_GE1024, val)
140
141#define bfin_read_EMAC_TXC_OK() bfin_read32(EMAC_TXC_OK)
142#define bfin_write_EMAC_TXC_OK(val) bfin_write32(EMAC_TXC_OK, val)
143#define bfin_read_EMAC_TXC_1COL() bfin_read32(EMAC_TXC_1COL)
144#define bfin_write_EMAC_TXC_1COL(val) bfin_write32(EMAC_TXC_1COL, val)
145#define bfin_read_EMAC_TXC_GT1COL() bfin_read32(EMAC_TXC_GT1COL)
146#define bfin_write_EMAC_TXC_GT1COL(val) bfin_write32(EMAC_TXC_GT1COL, val)
147#define bfin_read_EMAC_TXC_OCTET() bfin_read32(EMAC_TXC_OCTET)
148#define bfin_write_EMAC_TXC_OCTET(val) bfin_write32(EMAC_TXC_OCTET, val)
149#define bfin_read_EMAC_TXC_DEFER() bfin_read32(EMAC_TXC_DEFER)
150#define bfin_write_EMAC_TXC_DEFER(val) bfin_write32(EMAC_TXC_DEFER, val)
151#define bfin_read_EMAC_TXC_LATECL() bfin_read32(EMAC_TXC_LATECL)
152#define bfin_write_EMAC_TXC_LATECL(val) bfin_write32(EMAC_TXC_LATECL, val)
153#define bfin_read_EMAC_TXC_XS_COL() bfin_read32(EMAC_TXC_XS_COL)
154#define bfin_write_EMAC_TXC_XS_COL(val) bfin_write32(EMAC_TXC_XS_COL, val)
155#define bfin_read_EMAC_TXC_DMAUND() bfin_read32(EMAC_TXC_DMAUND)
156#define bfin_write_EMAC_TXC_DMAUND(val) bfin_write32(EMAC_TXC_DMAUND, val)
157#define bfin_read_EMAC_TXC_CRSERR() bfin_read32(EMAC_TXC_CRSERR)
158#define bfin_write_EMAC_TXC_CRSERR(val) bfin_write32(EMAC_TXC_CRSERR, val)
159#define bfin_read_EMAC_TXC_UNICST() bfin_read32(EMAC_TXC_UNICST)
160#define bfin_write_EMAC_TXC_UNICST(val) bfin_write32(EMAC_TXC_UNICST, val)
161#define bfin_read_EMAC_TXC_MULTI() bfin_read32(EMAC_TXC_MULTI)
162#define bfin_write_EMAC_TXC_MULTI(val) bfin_write32(EMAC_TXC_MULTI, val)
163#define bfin_read_EMAC_TXC_BROAD() bfin_read32(EMAC_TXC_BROAD)
164#define bfin_write_EMAC_TXC_BROAD(val) bfin_write32(EMAC_TXC_BROAD, val)
165#define bfin_read_EMAC_TXC_XS_DFR() bfin_read32(EMAC_TXC_XS_DFR)
166#define bfin_write_EMAC_TXC_XS_DFR(val) bfin_write32(EMAC_TXC_XS_DFR, val)
167#define bfin_read_EMAC_TXC_MACCTL() bfin_read32(EMAC_TXC_MACCTL)
168#define bfin_write_EMAC_TXC_MACCTL(val) bfin_write32(EMAC_TXC_MACCTL, val)
169#define bfin_read_EMAC_TXC_ALLFRM() bfin_read32(EMAC_TXC_ALLFRM)
170#define bfin_write_EMAC_TXC_ALLFRM(val) bfin_write32(EMAC_TXC_ALLFRM, val)
171#define bfin_read_EMAC_TXC_ALLOCT() bfin_read32(EMAC_TXC_ALLOCT)
172#define bfin_write_EMAC_TXC_ALLOCT(val) bfin_write32(EMAC_TXC_ALLOCT, val)
173#define bfin_read_EMAC_TXC_EQ64() bfin_read32(EMAC_TXC_EQ64)
174#define bfin_write_EMAC_TXC_EQ64(val) bfin_write32(EMAC_TXC_EQ64, val)
175#define bfin_read_EMAC_TXC_LT128() bfin_read32(EMAC_TXC_LT128)
176#define bfin_write_EMAC_TXC_LT128(val) bfin_write32(EMAC_TXC_LT128, val)
177#define bfin_read_EMAC_TXC_LT256() bfin_read32(EMAC_TXC_LT256)
178#define bfin_write_EMAC_TXC_LT256(val) bfin_write32(EMAC_TXC_LT256, val)
179#define bfin_read_EMAC_TXC_LT512() bfin_read32(EMAC_TXC_LT512)
180#define bfin_write_EMAC_TXC_LT512(val) bfin_write32(EMAC_TXC_LT512, val)
181#define bfin_read_EMAC_TXC_LT1024() bfin_read32(EMAC_TXC_LT1024)
182#define bfin_write_EMAC_TXC_LT1024(val) bfin_write32(EMAC_TXC_LT1024, val)
183#define bfin_read_EMAC_TXC_GE1024() bfin_read32(EMAC_TXC_GE1024)
184#define bfin_write_EMAC_TXC_GE1024(val) bfin_write32(EMAC_TXC_GE1024, val)
185#define bfin_read_EMAC_TXC_ABORT() bfin_read32(EMAC_TXC_ABORT)
186#define bfin_write_EMAC_TXC_ABORT(val) bfin_write32(EMAC_TXC_ABORT, val)
187
Cliff Caiabd750a2009-03-29 01:03:20 +0800188/* Removable Storage Interface Registers */
189
190#define bfin_read_RSI_PWR_CTL() bfin_read16(RSI_PWR_CONTROL)
191#define bfin_write_RSI_PWR_CTL(val) bfin_write16(RSI_PWR_CONTROL, val)
192#define bfin_read_RSI_CLK_CTL() bfin_read16(RSI_CLK_CONTROL)
193#define bfin_write_RSI_CLK_CTL(val) bfin_write16(RSI_CLK_CONTROL, val)
194#define bfin_read_RSI_ARGUMENT() bfin_read32(RSI_ARGUMENT)
195#define bfin_write_RSI_ARGUMENT(val) bfin_write32(RSI_ARGUMENT, val)
196#define bfin_read_RSI_COMMAND() bfin_read16(RSI_COMMAND)
197#define bfin_write_RSI_COMMAND(val) bfin_write16(RSI_COMMAND, val)
198#define bfin_read_RSI_RESP_CMD() bfin_read16(RSI_RESP_CMD)
199#define bfin_write_RSI_RESP_CMD(val) bfin_write16(RSI_RESP_CMD, val)
200#define bfin_read_RSI_RESPONSE0() bfin_read32(RSI_RESPONSE0)
201#define bfin_write_RSI_RESPONSE0(val) bfin_write32(RSI_RESPONSE0, val)
202#define bfin_read_RSI_RESPONSE1() bfin_read32(RSI_RESPONSE1)
203#define bfin_write_RSI_RESPONSE1(val) bfin_write32(RSI_RESPONSE1, val)
204#define bfin_read_RSI_RESPONSE2() bfin_read32(RSI_RESPONSE2)
205#define bfin_write_RSI_RESPONSE2(val) bfin_write32(RSI_RESPONSE2, val)
206#define bfin_read_RSI_RESPONSE3() bfin_read32(RSI_RESPONSE3)
207#define bfin_write_RSI_RESPONSE3(val) bfin_write32(RSI_RESPONSE3, val)
208#define bfin_read_RSI_DATA_TIMER() bfin_read32(RSI_DATA_TIMER)
209#define bfin_write_RSI_DATA_TIMER(val) bfin_write32(RSI_DATA_TIMER, val)
210#define bfin_read_RSI_DATA_LGTH() bfin_read16(RSI_DATA_LGTH)
211#define bfin_write_RSI_DATA_LGTH(val) bfin_write16(RSI_DATA_LGTH, val)
212#define bfin_read_RSI_DATA_CTL() bfin_read16(RSI_DATA_CONTROL)
213#define bfin_write_RSI_DATA_CTL(val) bfin_write16(RSI_DATA_CONTROL, val)
214#define bfin_read_RSI_DATA_CNT() bfin_read16(RSI_DATA_CNT)
215#define bfin_write_RSI_DATA_CNT(val) bfin_write16(RSI_DATA_CNT, val)
216#define bfin_read_RSI_STATUS() bfin_read32(RSI_STATUS)
217#define bfin_write_RSI_STATUS(val) bfin_write32(RSI_STATUS, val)
218#define bfin_read_RSI_STATUS_CLR() bfin_read16(RSI_STATUSCL)
219#define bfin_write_RSI_STATUS_CLR(val) bfin_write16(RSI_STATUSCL, val)
220#define bfin_read_RSI_MASK0() bfin_read32(RSI_MASK0)
221#define bfin_write_RSI_MASK0(val) bfin_write32(RSI_MASK0, val)
222#define bfin_read_RSI_MASK1() bfin_read32(RSI_MASK1)
223#define bfin_write_RSI_MASK1(val) bfin_write32(RSI_MASK1, val)
224#define bfin_read_RSI_FIFO_CNT() bfin_read16(RSI_FIFO_CNT)
225#define bfin_write_RSI_FIFO_CNT(val) bfin_write16(RSI_FIFO_CNT, val)
226#define bfin_read_RSI_CEATA_CTL() bfin_read16(RSI_CEATA_CONTROL)
227#define bfin_write_RSI_CEATA_CTL(val) bfin_write16(RSI_CEATA_CONTROL, val)
228#define bfin_read_RSI_FIFO() bfin_read32(RSI_FIFO)
229#define bfin_write_RSI_FIFO(val) bfin_write32(RSI_FIFO, val)
230#define bfin_read_RSI_E_STATUS() bfin_read16(RSI_ESTAT)
231#define bfin_write_RSI_E_STATUS(val) bfin_write16(RSI_ESTAT, val)
232#define bfin_read_RSI_E_MASK() bfin_read16(RSI_EMASK)
233#define bfin_write_RSI_E_MASK(val) bfin_write16(RSI_EMASK, val)
234#define bfin_read_RSI_CFG() bfin_read16(RSI_CONFIG)
235#define bfin_write_RSI_CFG(val) bfin_write16(RSI_CONFIG, val)
236#define bfin_read_RSI_RD_WAIT_EN() bfin_read16(RSI_RD_WAIT_EN)
237#define bfin_write_RSI_RD_WAIT_EN(val) bfin_write16(RSI_RD_WAIT_EN, val)
238#define bfin_read_RSI_PID0() bfin_read16(RSI_PID0)
239#define bfin_write_RSI_PID0(val) bfin_write16(RSI_PID0, val)
240#define bfin_read_RSI_PID1() bfin_read16(RSI_PID1)
241#define bfin_write_RSI_PID1(val) bfin_write16(RSI_PID1, val)
242#define bfin_read_RSI_PID2() bfin_read16(RSI_PID2)
243#define bfin_write_RSI_PID2(val) bfin_write16(RSI_PID2, val)
244#define bfin_read_RSI_PID3() bfin_read16(RSI_PID3)
245#define bfin_write_RSI_PID3(val) bfin_write16(RSI_PID3, val)
246#define bfin_read_RSI_PID4() bfin_read16(RSI_PID4)
247#define bfin_write_RSI_PID4(val) bfin_write16(RSI_PID4, val)
248#define bfin_read_RSI_PID5() bfin_read16(RSI_PID5)
249#define bfin_write_RSI_PID5(val) bfin_write16(RSI_PID5, val)
250#define bfin_read_RSI_PID6() bfin_read16(RSI_PID6)
251#define bfin_write_RSI_PID6(val) bfin_write16(RSI_PID6, val)
252#define bfin_read_RSI_PID7() bfin_read16(RSI_PID7)
253#define bfin_write_RSI_PID7(val) bfin_write16(RSI_PID7, val)
254
Bryan Wu2f6f4bc2008-11-18 17:48:21 +0800255#endif /* _CDEF_BF516_H */