Rob Clark | a7d3c95 | 2014-05-30 14:47:38 -0400 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2013 Red Hat |
| 3 | * Author: Rob Clark <robdclark@gmail.com> |
| 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify it |
| 6 | * under the terms of the GNU General Public License version 2 as published by |
| 7 | * the Free Software Foundation. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, but WITHOUT |
| 10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 12 | * more details. |
| 13 | * |
| 14 | * You should have received a copy of the GNU General Public License along with |
| 15 | * this program. If not, see <http://www.gnu.org/licenses/>. |
| 16 | */ |
| 17 | |
| 18 | /* For debugging crashes, userspace can: |
| 19 | * |
| 20 | * tail -f /sys/kernel/debug/dri/<minor>/rd > logfile.rd |
| 21 | * |
Rob Clark | 2165e2b | 2017-09-15 09:04:52 -0400 | [diff] [blame] | 22 | * to log the cmdstream in a format that is understood by freedreno/cffdump |
Rob Clark | a7d3c95 | 2014-05-30 14:47:38 -0400 | [diff] [blame] | 23 | * utility. By comparing the last successfully completed fence #, to the |
| 24 | * cmdstream for the next fence, you can narrow down which process and submit |
| 25 | * caused the gpu crash/lockup. |
| 26 | * |
Rob Clark | 2165e2b | 2017-09-15 09:04:52 -0400 | [diff] [blame] | 27 | * Additionally: |
| 28 | * |
| 29 | * tail -f /sys/kernel/debug/dri/<minor>/hangrd > logfile.rd |
| 30 | * |
| 31 | * will capture just the cmdstream from submits which triggered a GPU hang. |
| 32 | * |
Rob Clark | a7d3c95 | 2014-05-30 14:47:38 -0400 | [diff] [blame] | 33 | * This bypasses drm_debugfs_create_files() mainly because we need to use |
| 34 | * our own fops for a bit more control. In particular, we don't want to |
| 35 | * do anything if userspace doesn't have the debugfs file open. |
Rob Clark | 79c2118 | 2016-06-16 11:54:41 -0400 | [diff] [blame] | 36 | * |
| 37 | * The module-param "rd_full", which defaults to false, enables snapshotting |
| 38 | * all (non-written) buffers in the submit, rather than just cmdstream bo's. |
| 39 | * This is useful to capture the contents of (for example) vbo's or textures, |
| 40 | * or shader programs (if not emitted inline in cmdstream). |
Rob Clark | a7d3c95 | 2014-05-30 14:47:38 -0400 | [diff] [blame] | 41 | */ |
| 42 | |
| 43 | #ifdef CONFIG_DEBUG_FS |
| 44 | |
| 45 | #include <linux/kfifo.h> |
| 46 | #include <linux/debugfs.h> |
| 47 | #include <linux/circ_buf.h> |
| 48 | #include <linux/wait.h> |
| 49 | |
| 50 | #include "msm_drv.h" |
| 51 | #include "msm_gpu.h" |
| 52 | #include "msm_gem.h" |
| 53 | |
Rob Clark | 79c2118 | 2016-06-16 11:54:41 -0400 | [diff] [blame] | 54 | static bool rd_full = false; |
| 55 | MODULE_PARM_DESC(rd_full, "If true, $debugfs/.../rd will snapshot all buffer contents"); |
| 56 | module_param_named(rd_full, rd_full, bool, 0600); |
| 57 | |
Rob Clark | a7d3c95 | 2014-05-30 14:47:38 -0400 | [diff] [blame] | 58 | enum rd_sect_type { |
| 59 | RD_NONE, |
| 60 | RD_TEST, /* ascii text */ |
| 61 | RD_CMD, /* ascii text */ |
| 62 | RD_GPUADDR, /* u32 gpuaddr, u32 size */ |
| 63 | RD_CONTEXT, /* raw dump */ |
| 64 | RD_CMDSTREAM, /* raw dump */ |
| 65 | RD_CMDSTREAM_ADDR, /* gpu addr of cmdstream */ |
| 66 | RD_PARAM, /* u32 param_type, u32 param_val, u32 bitlen */ |
| 67 | RD_FLUSH, /* empty, clear previous params */ |
| 68 | RD_PROGRAM, /* shader program, raw dump */ |
| 69 | RD_VERT_SHADER, |
| 70 | RD_FRAG_SHADER, |
| 71 | RD_BUFFER_CONTENTS, |
| 72 | RD_GPU_ID, |
| 73 | }; |
| 74 | |
| 75 | #define BUF_SZ 512 /* should be power of 2 */ |
| 76 | |
| 77 | /* space used: */ |
| 78 | #define circ_count(circ) \ |
| 79 | (CIRC_CNT((circ)->head, (circ)->tail, BUF_SZ)) |
| 80 | #define circ_count_to_end(circ) \ |
| 81 | (CIRC_CNT_TO_END((circ)->head, (circ)->tail, BUF_SZ)) |
| 82 | /* space available: */ |
| 83 | #define circ_space(circ) \ |
| 84 | (CIRC_SPACE((circ)->head, (circ)->tail, BUF_SZ)) |
| 85 | #define circ_space_to_end(circ) \ |
| 86 | (CIRC_SPACE_TO_END((circ)->head, (circ)->tail, BUF_SZ)) |
| 87 | |
| 88 | struct msm_rd_state { |
| 89 | struct drm_device *dev; |
| 90 | |
| 91 | bool open; |
| 92 | |
Rob Clark | a7d3c95 | 2014-05-30 14:47:38 -0400 | [diff] [blame] | 93 | /* current submit to read out: */ |
| 94 | struct msm_gem_submit *submit; |
| 95 | |
| 96 | /* fifo access is synchronized on the producer side by |
| 97 | * struct_mutex held by submit code (otherwise we could |
| 98 | * end up w/ cmds logged in different order than they |
| 99 | * were executed). And read_lock synchronizes the reads |
| 100 | */ |
| 101 | struct mutex read_lock; |
| 102 | |
| 103 | wait_queue_head_t fifo_event; |
| 104 | struct circ_buf fifo; |
| 105 | |
| 106 | char buf[BUF_SZ]; |
| 107 | }; |
| 108 | |
| 109 | static void rd_write(struct msm_rd_state *rd, const void *buf, int sz) |
| 110 | { |
| 111 | struct circ_buf *fifo = &rd->fifo; |
| 112 | const char *ptr = buf; |
| 113 | |
| 114 | while (sz > 0) { |
| 115 | char *fptr = &fifo->buf[fifo->head]; |
| 116 | int n; |
| 117 | |
| 118 | wait_event(rd->fifo_event, circ_space(&rd->fifo) > 0); |
| 119 | |
Rob Clark | f44001e | 2017-10-02 10:28:37 -0400 | [diff] [blame] | 120 | /* Note that smp_load_acquire() is not strictly required |
| 121 | * as CIRC_SPACE_TO_END() does not access the tail more |
| 122 | * than once. |
| 123 | */ |
Rob Clark | a7d3c95 | 2014-05-30 14:47:38 -0400 | [diff] [blame] | 124 | n = min(sz, circ_space_to_end(&rd->fifo)); |
| 125 | memcpy(fptr, ptr, n); |
| 126 | |
Rob Clark | f44001e | 2017-10-02 10:28:37 -0400 | [diff] [blame] | 127 | smp_store_release(&fifo->head, (fifo->head + n) & (BUF_SZ - 1)); |
Rob Clark | a7d3c95 | 2014-05-30 14:47:38 -0400 | [diff] [blame] | 128 | sz -= n; |
| 129 | ptr += n; |
| 130 | |
| 131 | wake_up_all(&rd->fifo_event); |
| 132 | } |
| 133 | } |
| 134 | |
| 135 | static void rd_write_section(struct msm_rd_state *rd, |
| 136 | enum rd_sect_type type, const void *buf, int sz) |
| 137 | { |
| 138 | rd_write(rd, &type, 4); |
| 139 | rd_write(rd, &sz, 4); |
| 140 | rd_write(rd, buf, sz); |
| 141 | } |
| 142 | |
| 143 | static ssize_t rd_read(struct file *file, char __user *buf, |
| 144 | size_t sz, loff_t *ppos) |
| 145 | { |
| 146 | struct msm_rd_state *rd = file->private_data; |
| 147 | struct circ_buf *fifo = &rd->fifo; |
| 148 | const char *fptr = &fifo->buf[fifo->tail]; |
| 149 | int n = 0, ret = 0; |
| 150 | |
| 151 | mutex_lock(&rd->read_lock); |
| 152 | |
| 153 | ret = wait_event_interruptible(rd->fifo_event, |
| 154 | circ_count(&rd->fifo) > 0); |
| 155 | if (ret) |
| 156 | goto out; |
| 157 | |
Rob Clark | f44001e | 2017-10-02 10:28:37 -0400 | [diff] [blame] | 158 | /* Note that smp_load_acquire() is not strictly required |
| 159 | * as CIRC_CNT_TO_END() does not access the head more than |
| 160 | * once. |
| 161 | */ |
Rob Clark | a7d3c95 | 2014-05-30 14:47:38 -0400 | [diff] [blame] | 162 | n = min_t(int, sz, circ_count_to_end(&rd->fifo)); |
Dan Carpenter | 5745d21 | 2016-07-13 13:35:29 +0300 | [diff] [blame] | 163 | if (copy_to_user(buf, fptr, n)) { |
| 164 | ret = -EFAULT; |
Rob Clark | a7d3c95 | 2014-05-30 14:47:38 -0400 | [diff] [blame] | 165 | goto out; |
Dan Carpenter | 5745d21 | 2016-07-13 13:35:29 +0300 | [diff] [blame] | 166 | } |
Rob Clark | a7d3c95 | 2014-05-30 14:47:38 -0400 | [diff] [blame] | 167 | |
Rob Clark | f44001e | 2017-10-02 10:28:37 -0400 | [diff] [blame] | 168 | smp_store_release(&fifo->tail, (fifo->tail + n) & (BUF_SZ - 1)); |
Rob Clark | a7d3c95 | 2014-05-30 14:47:38 -0400 | [diff] [blame] | 169 | *ppos += n; |
| 170 | |
| 171 | wake_up_all(&rd->fifo_event); |
| 172 | |
| 173 | out: |
| 174 | mutex_unlock(&rd->read_lock); |
| 175 | if (ret) |
| 176 | return ret; |
| 177 | return n; |
| 178 | } |
| 179 | |
| 180 | static int rd_open(struct inode *inode, struct file *file) |
| 181 | { |
| 182 | struct msm_rd_state *rd = inode->i_private; |
| 183 | struct drm_device *dev = rd->dev; |
| 184 | struct msm_drm_private *priv = dev->dev_private; |
| 185 | struct msm_gpu *gpu = priv->gpu; |
| 186 | uint64_t val; |
| 187 | uint32_t gpu_id; |
| 188 | int ret = 0; |
| 189 | |
| 190 | mutex_lock(&dev->struct_mutex); |
| 191 | |
| 192 | if (rd->open || !gpu) { |
| 193 | ret = -EBUSY; |
| 194 | goto out; |
| 195 | } |
| 196 | |
| 197 | file->private_data = rd; |
| 198 | rd->open = true; |
| 199 | |
| 200 | /* the parsing tools need to know gpu-id to know which |
| 201 | * register database to load. |
| 202 | */ |
| 203 | gpu->funcs->get_param(gpu, MSM_PARAM_GPU_ID, &val); |
| 204 | gpu_id = val; |
| 205 | |
| 206 | rd_write_section(rd, RD_GPU_ID, &gpu_id, sizeof(gpu_id)); |
| 207 | |
| 208 | out: |
| 209 | mutex_unlock(&dev->struct_mutex); |
| 210 | return ret; |
| 211 | } |
| 212 | |
| 213 | static int rd_release(struct inode *inode, struct file *file) |
| 214 | { |
| 215 | struct msm_rd_state *rd = inode->i_private; |
| 216 | rd->open = false; |
| 217 | return 0; |
| 218 | } |
| 219 | |
| 220 | |
| 221 | static const struct file_operations rd_debugfs_fops = { |
| 222 | .owner = THIS_MODULE, |
| 223 | .open = rd_open, |
| 224 | .read = rd_read, |
| 225 | .llseek = no_llseek, |
| 226 | .release = rd_release, |
| 227 | }; |
| 228 | |
Rob Clark | 2165e2b | 2017-09-15 09:04:52 -0400 | [diff] [blame] | 229 | |
| 230 | static void rd_cleanup(struct msm_rd_state *rd) |
Rob Clark | a7d3c95 | 2014-05-30 14:47:38 -0400 | [diff] [blame] | 231 | { |
Rob Clark | 2165e2b | 2017-09-15 09:04:52 -0400 | [diff] [blame] | 232 | if (!rd) |
| 233 | return; |
| 234 | |
| 235 | mutex_destroy(&rd->read_lock); |
| 236 | kfree(rd); |
| 237 | } |
| 238 | |
| 239 | static struct msm_rd_state *rd_init(struct drm_minor *minor, const char *name) |
| 240 | { |
Rob Clark | a7d3c95 | 2014-05-30 14:47:38 -0400 | [diff] [blame] | 241 | struct msm_rd_state *rd; |
Noralf Trønnes | 81895b5 | 2017-01-26 23:56:11 +0100 | [diff] [blame] | 242 | struct dentry *ent; |
Rob Clark | 2165e2b | 2017-09-15 09:04:52 -0400 | [diff] [blame] | 243 | int ret = 0; |
Rob Clark | a7d3c95 | 2014-05-30 14:47:38 -0400 | [diff] [blame] | 244 | |
| 245 | rd = kzalloc(sizeof(*rd), GFP_KERNEL); |
| 246 | if (!rd) |
Rob Clark | 2165e2b | 2017-09-15 09:04:52 -0400 | [diff] [blame] | 247 | return ERR_PTR(-ENOMEM); |
Rob Clark | a7d3c95 | 2014-05-30 14:47:38 -0400 | [diff] [blame] | 248 | |
| 249 | rd->dev = minor->dev; |
| 250 | rd->fifo.buf = rd->buf; |
| 251 | |
| 252 | mutex_init(&rd->read_lock); |
Rob Clark | a7d3c95 | 2014-05-30 14:47:38 -0400 | [diff] [blame] | 253 | |
| 254 | init_waitqueue_head(&rd->fifo_event); |
| 255 | |
Rob Clark | 2165e2b | 2017-09-15 09:04:52 -0400 | [diff] [blame] | 256 | ent = debugfs_create_file(name, S_IFREG | S_IRUGO, |
Rob Clark | a7d3c95 | 2014-05-30 14:47:38 -0400 | [diff] [blame] | 257 | minor->debugfs_root, rd, &rd_debugfs_fops); |
Noralf Trønnes | 81895b5 | 2017-01-26 23:56:11 +0100 | [diff] [blame] | 258 | if (!ent) { |
Rob Clark | 2165e2b | 2017-09-15 09:04:52 -0400 | [diff] [blame] | 259 | DRM_ERROR("Cannot create /sys/kernel/debug/dri/%pd/%s\n", |
| 260 | minor->debugfs_root, name); |
| 261 | ret = -ENOMEM; |
Rob Clark | a7d3c95 | 2014-05-30 14:47:38 -0400 | [diff] [blame] | 262 | goto fail; |
| 263 | } |
| 264 | |
Rob Clark | 2165e2b | 2017-09-15 09:04:52 -0400 | [diff] [blame] | 265 | return rd; |
| 266 | |
| 267 | fail: |
| 268 | rd_cleanup(rd); |
| 269 | return ERR_PTR(ret); |
| 270 | } |
| 271 | |
| 272 | int msm_rd_debugfs_init(struct drm_minor *minor) |
| 273 | { |
| 274 | struct msm_drm_private *priv = minor->dev->dev_private; |
| 275 | struct msm_rd_state *rd; |
| 276 | int ret; |
| 277 | |
| 278 | /* only create on first minor: */ |
| 279 | if (priv->rd) |
| 280 | return 0; |
| 281 | |
| 282 | rd = rd_init(minor, "rd"); |
| 283 | if (IS_ERR(rd)) { |
| 284 | ret = PTR_ERR(rd); |
| 285 | goto fail; |
| 286 | } |
| 287 | |
| 288 | priv->rd = rd; |
| 289 | |
| 290 | rd = rd_init(minor, "hangrd"); |
| 291 | if (IS_ERR(rd)) { |
| 292 | ret = PTR_ERR(rd); |
| 293 | goto fail; |
| 294 | } |
| 295 | |
| 296 | priv->hangrd = rd; |
| 297 | |
Rob Clark | a7d3c95 | 2014-05-30 14:47:38 -0400 | [diff] [blame] | 298 | return 0; |
| 299 | |
| 300 | fail: |
Noralf Trønnes | 85eac47 | 2017-03-07 21:49:22 +0100 | [diff] [blame] | 301 | msm_rd_debugfs_cleanup(priv); |
Rob Clark | 2165e2b | 2017-09-15 09:04:52 -0400 | [diff] [blame] | 302 | return ret; |
Rob Clark | a7d3c95 | 2014-05-30 14:47:38 -0400 | [diff] [blame] | 303 | } |
| 304 | |
Noralf Trønnes | 85eac47 | 2017-03-07 21:49:22 +0100 | [diff] [blame] | 305 | void msm_rd_debugfs_cleanup(struct msm_drm_private *priv) |
Rob Clark | a7d3c95 | 2014-05-30 14:47:38 -0400 | [diff] [blame] | 306 | { |
Rob Clark | 2165e2b | 2017-09-15 09:04:52 -0400 | [diff] [blame] | 307 | rd_cleanup(priv->rd); |
Rob Clark | a7d3c95 | 2014-05-30 14:47:38 -0400 | [diff] [blame] | 308 | priv->rd = NULL; |
Rob Clark | 2165e2b | 2017-09-15 09:04:52 -0400 | [diff] [blame] | 309 | |
| 310 | rd_cleanup(priv->hangrd); |
| 311 | priv->hangrd = NULL; |
Rob Clark | a7d3c95 | 2014-05-30 14:47:38 -0400 | [diff] [blame] | 312 | } |
| 313 | |
Rob Clark | 6507e79 | 2016-06-16 11:49:09 -0400 | [diff] [blame] | 314 | static void snapshot_buf(struct msm_rd_state *rd, |
| 315 | struct msm_gem_submit *submit, int idx, |
Rob Clark | d0651fe | 2016-11-11 11:08:45 -0500 | [diff] [blame] | 316 | uint64_t iova, uint32_t size) |
Rob Clark | 6507e79 | 2016-06-16 11:49:09 -0400 | [diff] [blame] | 317 | { |
| 318 | struct msm_gem_object *obj = submit->bos[idx].obj; |
| 319 | const char *buf; |
| 320 | |
Rob Clark | 79c2118 | 2016-06-16 11:54:41 -0400 | [diff] [blame] | 321 | if (iova) { |
| 322 | buf += iova - submit->bos[idx].iova; |
| 323 | } else { |
| 324 | iova = submit->bos[idx].iova; |
| 325 | size = obj->base.size; |
| 326 | } |
Rob Clark | 6507e79 | 2016-06-16 11:49:09 -0400 | [diff] [blame] | 327 | |
Jordan Crouse | 78b8e5b | 2017-10-20 11:07:03 -0600 | [diff] [blame] | 328 | /* |
| 329 | * Always write the GPUADDR header so can get a complete list of all the |
| 330 | * buffers in the cmd |
| 331 | */ |
Rob Clark | 6507e79 | 2016-06-16 11:49:09 -0400 | [diff] [blame] | 332 | rd_write_section(rd, RD_GPUADDR, |
Rob Clark | d0651fe | 2016-11-11 11:08:45 -0500 | [diff] [blame] | 333 | (uint32_t[3]){ iova, size, iova >> 32 }, 12); |
Jordan Crouse | 78b8e5b | 2017-10-20 11:07:03 -0600 | [diff] [blame] | 334 | |
| 335 | /* But only dump the contents of buffers marked READ */ |
| 336 | if (!(submit->bos[idx].flags & MSM_SUBMIT_BO_READ)) |
| 337 | return; |
| 338 | |
Rob Clark | fad33f4 | 2017-09-15 08:38:20 -0400 | [diff] [blame] | 339 | buf = msm_gem_get_vaddr_active(&obj->base); |
Jordan Crouse | 78b8e5b | 2017-10-20 11:07:03 -0600 | [diff] [blame] | 340 | if (IS_ERR(buf)) |
| 341 | return; |
| 342 | |
Rob Clark | 6507e79 | 2016-06-16 11:49:09 -0400 | [diff] [blame] | 343 | rd_write_section(rd, RD_BUFFER_CONTENTS, buf, size); |
| 344 | |
Sushmita Susheelendra | 0e08270 | 2017-06-13 16:52:54 -0600 | [diff] [blame] | 345 | msm_gem_put_vaddr(&obj->base); |
Rob Clark | 6507e79 | 2016-06-16 11:49:09 -0400 | [diff] [blame] | 346 | } |
| 347 | |
Rob Clark | a7d3c95 | 2014-05-30 14:47:38 -0400 | [diff] [blame] | 348 | /* called under struct_mutex */ |
Rob Clark | 998b9a5 | 2017-09-15 10:46:45 -0400 | [diff] [blame] | 349 | void msm_rd_dump_submit(struct msm_rd_state *rd, struct msm_gem_submit *submit, |
| 350 | const char *fmt, ...) |
Rob Clark | a7d3c95 | 2014-05-30 14:47:38 -0400 | [diff] [blame] | 351 | { |
| 352 | struct drm_device *dev = submit->dev; |
Rob Clark | 2165e2b | 2017-09-15 09:04:52 -0400 | [diff] [blame] | 353 | struct task_struct *task; |
Rob Clark | 998b9a5 | 2017-09-15 10:46:45 -0400 | [diff] [blame] | 354 | char msg[256]; |
Rob Clark | a7d3c95 | 2014-05-30 14:47:38 -0400 | [diff] [blame] | 355 | int i, n; |
| 356 | |
| 357 | if (!rd->open) |
| 358 | return; |
| 359 | |
| 360 | /* writing into fifo is serialized by caller, and |
| 361 | * rd->read_lock is used to serialize the reads |
| 362 | */ |
| 363 | WARN_ON(!mutex_is_locked(&dev->struct_mutex)); |
| 364 | |
Rob Clark | 998b9a5 | 2017-09-15 10:46:45 -0400 | [diff] [blame] | 365 | if (fmt) { |
| 366 | va_list args; |
| 367 | |
| 368 | va_start(args, fmt); |
Rob Clark | b689a83 | 2018-09-25 13:54:00 -0400 | [diff] [blame] | 369 | n = vscnprintf(msg, sizeof(msg), fmt, args); |
Rob Clark | 998b9a5 | 2017-09-15 10:46:45 -0400 | [diff] [blame] | 370 | va_end(args); |
| 371 | |
| 372 | rd_write_section(rd, RD_CMD, msg, ALIGN(n, 4)); |
| 373 | } |
| 374 | |
Rob Clark | 2165e2b | 2017-09-15 09:04:52 -0400 | [diff] [blame] | 375 | rcu_read_lock(); |
| 376 | task = pid_task(submit->pid, PIDTYPE_PID); |
| 377 | if (task) { |
Rob Clark | b689a83 | 2018-09-25 13:54:00 -0400 | [diff] [blame] | 378 | n = scnprintf(msg, sizeof(msg), "%.*s/%d: fence=%u", |
Rob Clark | 2165e2b | 2017-09-15 09:04:52 -0400 | [diff] [blame] | 379 | TASK_COMM_LEN, task->comm, |
| 380 | pid_nr(submit->pid), submit->seqno); |
| 381 | } else { |
Rob Clark | b689a83 | 2018-09-25 13:54:00 -0400 | [diff] [blame] | 382 | n = scnprintf(msg, sizeof(msg), "???/%d: fence=%u", |
Rob Clark | 2165e2b | 2017-09-15 09:04:52 -0400 | [diff] [blame] | 383 | pid_nr(submit->pid), submit->seqno); |
| 384 | } |
| 385 | rcu_read_unlock(); |
Rob Clark | a7d3c95 | 2014-05-30 14:47:38 -0400 | [diff] [blame] | 386 | |
| 387 | rd_write_section(rd, RD_CMD, msg, ALIGN(n, 4)); |
| 388 | |
Jordan Crouse | 78b8e5b | 2017-10-20 11:07:03 -0600 | [diff] [blame] | 389 | for (i = 0; rd_full && i < submit->nr_bos; i++) |
| 390 | snapshot_buf(rd, submit, i, 0, 0); |
Rob Clark | a7d3c95 | 2014-05-30 14:47:38 -0400 | [diff] [blame] | 391 | |
| 392 | for (i = 0; i < submit->nr_cmds; i++) { |
Jordan Crouse | 22dd5c1 | 2017-03-07 09:50:30 -0700 | [diff] [blame] | 393 | uint64_t iova = submit->cmd[i].iova; |
Rob Clark | a7d3c95 | 2014-05-30 14:47:38 -0400 | [diff] [blame] | 394 | uint32_t szd = submit->cmd[i].size; /* in dwords */ |
Rob Clark | a7d3c95 | 2014-05-30 14:47:38 -0400 | [diff] [blame] | 395 | |
Rob Clark | 79c2118 | 2016-06-16 11:54:41 -0400 | [diff] [blame] | 396 | /* snapshot cmdstream bo's (if we haven't already): */ |
| 397 | if (!rd_full) { |
| 398 | snapshot_buf(rd, submit, submit->cmd[i].idx, |
| 399 | submit->cmd[i].iova, szd * 4); |
| 400 | } |
Rob Clark | a7d3c95 | 2014-05-30 14:47:38 -0400 | [diff] [blame] | 401 | |
| 402 | switch (submit->cmd[i].type) { |
| 403 | case MSM_SUBMIT_CMD_IB_TARGET_BUF: |
| 404 | /* ignore IB-targets, we've logged the buffer, the |
| 405 | * parser tool will follow the IB based on the logged |
| 406 | * buffer/gpuaddr, so nothing more to do. |
| 407 | */ |
| 408 | break; |
| 409 | case MSM_SUBMIT_CMD_CTX_RESTORE_BUF: |
| 410 | case MSM_SUBMIT_CMD_BUF: |
| 411 | rd_write_section(rd, RD_CMDSTREAM_ADDR, |
Jordan Crouse | 22dd5c1 | 2017-03-07 09:50:30 -0700 | [diff] [blame] | 412 | (uint32_t[3]){ iova, szd, iova >> 32 }, 12); |
Rob Clark | a7d3c95 | 2014-05-30 14:47:38 -0400 | [diff] [blame] | 413 | break; |
| 414 | } |
Rob Clark | a7d3c95 | 2014-05-30 14:47:38 -0400 | [diff] [blame] | 415 | } |
| 416 | } |
| 417 | #endif |