blob: 9a14553265d8141e397144942756bf6e7b603ee4 [file] [log] [blame]
Rob Clarkcd5351f2011-11-12 12:09:40 -06001/*
Rob Clark8bb0daf2013-02-11 12:43:09 -05002 * drivers/gpu/drm/omapdrm/omap_drv.c
Rob Clarkcd5351f2011-11-12 12:09:40 -06003 *
4 * Copyright (C) 2011 Texas Instruments
5 * Author: Rob Clark <rob@ti.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
Laurent Pinchart6e471fa2017-05-06 02:57:12 +030020#include <linux/sys_soc.h>
21
Laurent Pinchart748471a52015-03-05 23:42:39 +020022#include <drm/drm_atomic.h>
Laurent Pinchartcef77d42015-03-05 21:50:00 +020023#include <drm/drm_atomic_helper.h>
Laurent Pinchart2d278f52015-03-05 21:31:37 +020024#include <drm/drm_crtc_helper.h>
25#include <drm/drm_fb_helper.h>
Rob Clarkcd5351f2011-11-12 12:09:40 -060026
Andy Gross5c137792012-03-05 10:48:39 -060027#include "omap_dmm_tiler.h"
Laurent Pinchart2d278f52015-03-05 21:31:37 +020028#include "omap_drv.h"
Rob Clarkcd5351f2011-11-12 12:09:40 -060029
30#define DRIVER_NAME MODULE_NAME
31#define DRIVER_DESC "OMAP DRM"
32#define DRIVER_DATE "20110917"
33#define DRIVER_MAJOR 1
34#define DRIVER_MINOR 0
35#define DRIVER_PATCHLEVEL 0
36
Rob Clarkcd5351f2011-11-12 12:09:40 -060037/*
38 * mode config funcs
39 */
40
41/* Notes about mapping DSS and DRM entities:
42 * CRTC: overlay
43 * encoder: manager.. with some extension to allow one primary CRTC
44 * and zero or more video CRTC's to be mapped to one encoder?
45 * connector: dssdev.. manager can be attached/detached from different
46 * devices
47 */
48
49static void omap_fb_output_poll_changed(struct drm_device *dev)
50{
51 struct omap_drm_private *priv = dev->dev_private;
52 DBG("dev=%p", dev);
YAMANE Toshiakic7f904b2012-11-14 19:30:38 +090053 if (priv->fbdev)
Rob Clarkcd5351f2011-11-12 12:09:40 -060054 drm_fb_helper_hotplug_event(priv->fbdev);
Rob Clarkcd5351f2011-11-12 12:09:40 -060055}
56
Tomi Valkeinen5f741b32015-05-29 16:01:18 +030057static void omap_atomic_wait_for_completion(struct drm_device *dev,
58 struct drm_atomic_state *old_state)
59{
Maarten Lankhorst34d88232017-07-19 16:39:17 +020060 struct drm_crtc_state *new_crtc_state;
Tomi Valkeinen5f741b32015-05-29 16:01:18 +030061 struct drm_crtc *crtc;
62 unsigned int i;
63 int ret;
64
Maarten Lankhorst34d88232017-07-19 16:39:17 +020065 for_each_new_crtc_in_state(old_state, crtc, new_crtc_state, i) {
66 if (!new_crtc_state->active)
Tomi Valkeinen5f741b32015-05-29 16:01:18 +030067 continue;
68
69 ret = omap_crtc_wait_pending(crtc);
70
71 if (!ret)
72 dev_warn(dev->dev,
73 "atomic complete timeout (pipe %u)!\n", i);
74 }
75}
76
Laurent Pincharta9e6f9f2017-05-09 01:27:10 +030077static void omap_atomic_commit_tail(struct drm_atomic_state *old_state)
Laurent Pinchart748471a52015-03-05 23:42:39 +020078{
Laurent Pincharta9e6f9f2017-05-09 01:27:10 +030079 struct drm_device *dev = old_state->dev;
Laurent Pinchart748471a52015-03-05 23:42:39 +020080 struct omap_drm_private *priv = dev->dev_private;
Laurent Pinchart748471a52015-03-05 23:42:39 +020081
Tomi Valkeinen9f759222015-11-05 18:39:52 +020082 priv->dispc_ops->runtime_get();
Laurent Pinchart69fb7c82015-05-28 02:09:56 +030083
Laurent Pincharta9e6f9f2017-05-09 01:27:10 +030084 /* Apply the atomic update. */
Laurent Pinchart748471a52015-03-05 23:42:39 +020085 drm_atomic_helper_commit_modeset_disables(dev, old_state);
Jyri Sarha897145d2017-01-27 12:04:55 +020086
87 /* With the current dss dispc implementation we have to enable
88 * the new modeset before we can commit planes. The dispc ovl
89 * configuration relies on the video mode configuration been
90 * written into the HW when the ovl configuration is
91 * calculated.
92 *
93 * This approach is not ideal because after a mode change the
94 * plane update is executed only after the first vblank
95 * interrupt. The dispc implementation should be fixed so that
96 * it is able use uncommitted drm state information.
97 */
Laurent Pinchart748471a52015-03-05 23:42:39 +020098 drm_atomic_helper_commit_modeset_enables(dev, old_state);
Jyri Sarha897145d2017-01-27 12:04:55 +020099 omap_atomic_wait_for_completion(dev, old_state);
100
101 drm_atomic_helper_commit_planes(dev, old_state, 0);
Laurent Pinchart748471a52015-03-05 23:42:39 +0200102
Laurent Pincharta9e6f9f2017-05-09 01:27:10 +0300103 drm_atomic_helper_commit_hw_done(old_state);
104
105 /*
106 * Wait for completion of the page flips to ensure that old buffers
107 * can't be touched by the hardware anymore before cleaning up planes.
108 */
Tomi Valkeinen5f741b32015-05-29 16:01:18 +0300109 omap_atomic_wait_for_completion(dev, old_state);
Laurent Pinchart748471a52015-03-05 23:42:39 +0200110
111 drm_atomic_helper_cleanup_planes(dev, old_state);
112
Tomi Valkeinen9f759222015-11-05 18:39:52 +0200113 priv->dispc_ops->runtime_put();
Laurent Pinchart748471a52015-03-05 23:42:39 +0200114}
115
Laurent Pincharta9e6f9f2017-05-09 01:27:10 +0300116static const struct drm_mode_config_helper_funcs omap_mode_config_helper_funcs = {
117 .atomic_commit_tail = omap_atomic_commit_tail,
118};
Laurent Pinchart748471a52015-03-05 23:42:39 +0200119
Laurent Pincharte6ecefa2012-05-17 13:27:23 +0200120static const struct drm_mode_config_funcs omap_mode_config_funcs = {
Rob Clarkcd5351f2011-11-12 12:09:40 -0600121 .fb_create = omap_framebuffer_create,
122 .output_poll_changed = omap_fb_output_poll_changed,
Laurent Pinchartcef77d42015-03-05 21:50:00 +0200123 .atomic_check = drm_atomic_helper_check,
Laurent Pincharta9e6f9f2017-05-09 01:27:10 +0300124 .atomic_commit = drm_atomic_helper_commit,
Rob Clarkcd5351f2011-11-12 12:09:40 -0600125};
126
127static int get_connector_type(struct omap_dss_device *dssdev)
128{
129 switch (dssdev->type) {
130 case OMAP_DISPLAY_TYPE_HDMI:
131 return DRM_MODE_CONNECTOR_HDMIA;
Tomi Valkeinen4635c172013-05-14 14:14:15 +0300132 case OMAP_DISPLAY_TYPE_DVI:
133 return DRM_MODE_CONNECTOR_DVID;
Sebastian Reichel4a64b902016-03-08 17:39:36 +0100134 case OMAP_DISPLAY_TYPE_DSI:
135 return DRM_MODE_CONNECTOR_DSI;
Tomi Valkeinen564f88c2017-04-27 13:02:28 +0300136 case OMAP_DISPLAY_TYPE_DPI:
137 case OMAP_DISPLAY_TYPE_DBI:
138 return DRM_MODE_CONNECTOR_DPI;
139 case OMAP_DISPLAY_TYPE_VENC:
140 /* TODO: This could also be composite */
141 return DRM_MODE_CONNECTOR_SVIDEO;
142 case OMAP_DISPLAY_TYPE_SDI:
143 return DRM_MODE_CONNECTOR_LVDS;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600144 default:
145 return DRM_MODE_CONNECTOR_Unknown;
146 }
147}
148
Archit Tanejacc823bd2014-01-02 14:49:52 +0530149static void omap_disconnect_dssdevs(void)
150{
151 struct omap_dss_device *dssdev = NULL;
152
153 for_each_dss_dev(dssdev)
154 dssdev->driver->disconnect(dssdev);
155}
Archit Taneja0d8f3712013-03-26 19:15:19 +0530156
Archit Taneja3a01ab22014-01-02 14:49:51 +0530157static int omap_connect_dssdevs(void)
158{
159 int r;
160 struct omap_dss_device *dssdev = NULL;
Peter Ujfalusia09d2bc2016-05-03 22:08:01 +0300161
162 if (!omapdss_stack_is_ready())
163 return -EPROBE_DEFER;
Archit Taneja3a01ab22014-01-02 14:49:51 +0530164
165 for_each_dss_dev(dssdev) {
166 r = dssdev->driver->connect(dssdev);
167 if (r == -EPROBE_DEFER) {
168 omap_dss_put_device(dssdev);
169 goto cleanup;
170 } else if (r) {
171 dev_warn(dssdev->dev, "could not connect display: %s\n",
172 dssdev->name);
Archit Taneja3a01ab22014-01-02 14:49:51 +0530173 }
174 }
175
Archit Taneja3a01ab22014-01-02 14:49:51 +0530176 return 0;
177
178cleanup:
179 /*
180 * if we are deferring probe, we disconnect the devices we previously
181 * connected
182 */
Archit Tanejacc823bd2014-01-02 14:49:52 +0530183 omap_disconnect_dssdevs();
Archit Taneja3a01ab22014-01-02 14:49:51 +0530184
185 return r;
186}
Rob Clarkcd5351f2011-11-12 12:09:40 -0600187
Laurent Pincharte2cd09b2015-03-06 17:16:43 +0200188static int omap_modeset_init_properties(struct drm_device *dev)
189{
190 struct omap_drm_private *priv = dev->dev_private;
Laurent Pinchartdff6c242017-05-09 01:27:14 +0300191 unsigned int num_planes = priv->dispc_ops->get_num_ovls();
Laurent Pincharte2cd09b2015-03-06 17:16:43 +0200192
Laurent Pinchartdff6c242017-05-09 01:27:14 +0300193 priv->zorder_prop = drm_property_create_range(dev, 0, "zorder", 0,
194 num_planes - 1);
Laurent Pincharte2cd09b2015-03-06 17:16:43 +0200195 if (!priv->zorder_prop)
196 return -ENOMEM;
197
198 return 0;
199}
200
Rob Clarkcd5351f2011-11-12 12:09:40 -0600201static int omap_modeset_init(struct drm_device *dev)
202{
Rob Clarkcd5351f2011-11-12 12:09:40 -0600203 struct omap_drm_private *priv = dev->dev_private;
204 struct omap_dss_device *dssdev = NULL;
Tomi Valkeinen9f759222015-11-05 18:39:52 +0200205 int num_ovls = priv->dispc_ops->get_num_ovls();
206 int num_mgrs = priv->dispc_ops->get_num_mgrs();
Jyri Sarhae8e13b12017-03-24 16:47:55 +0200207 int num_crtcs, crtc_idx, plane_idx;
Laurent Pinchartfb9a35f2015-01-11 16:30:44 +0200208 int ret;
Jyri Sarhae8e13b12017-03-24 16:47:55 +0200209 u32 plane_crtc_mask;
Tomi Valkeinen04b1fc02013-05-14 10:55:19 +0300210
Rob Clarkcd5351f2011-11-12 12:09:40 -0600211 drm_mode_config_init(dev);
212
Laurent Pincharte2cd09b2015-03-06 17:16:43 +0200213 ret = omap_modeset_init_properties(dev);
214 if (ret < 0)
215 return ret;
216
Rob Clarkf5f94542012-12-04 13:59:12 -0600217 /*
Jyri Sarhae8e13b12017-03-24 16:47:55 +0200218 * This function creates exactly one connector, encoder, crtc,
219 * and primary plane per each connected dss-device. Each
220 * connector->encoder->crtc chain is expected to be separate
221 * and each crtc is connect to a single dss-channel. If the
222 * configuration does not match the expectations or exceeds
223 * the available resources, the configuration is rejected.
Rob Clarkf5f94542012-12-04 13:59:12 -0600224 */
Jyri Sarhae8e13b12017-03-24 16:47:55 +0200225 num_crtcs = 0;
Jyri Sarhaf1118b82017-03-24 16:47:51 +0200226 for_each_dss_dev(dssdev)
227 if (omapdss_device_is_connected(dssdev))
228 num_crtcs++;
229
Jyri Sarhae8e13b12017-03-24 16:47:55 +0200230 if (num_crtcs > num_mgrs || num_crtcs > num_ovls ||
231 num_crtcs > ARRAY_SIZE(priv->crtcs) ||
232 num_crtcs > ARRAY_SIZE(priv->planes) ||
233 num_crtcs > ARRAY_SIZE(priv->encoders) ||
234 num_crtcs > ARRAY_SIZE(priv->connectors)) {
235 dev_err(dev->dev, "%s(): Too many connected displays\n",
236 __func__);
237 return -EINVAL;
238 }
239
240 /* All planes can be put to any CRTC */
241 plane_crtc_mask = (1 << num_crtcs) - 1;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600242
Archit Taneja0d8f3712013-03-26 19:15:19 +0530243 dssdev = NULL;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600244
Jyri Sarhae8e13b12017-03-24 16:47:55 +0200245 crtc_idx = 0;
246 plane_idx = 0;
Rob Clarkf5f94542012-12-04 13:59:12 -0600247 for_each_dss_dev(dssdev) {
248 struct drm_connector *connector;
249 struct drm_encoder *encoder;
Jyri Sarhae8e13b12017-03-24 16:47:55 +0200250 struct drm_plane *plane;
251 struct drm_crtc *crtc;
Rob Clarkf5f94542012-12-04 13:59:12 -0600252
Archit Taneja3a01ab22014-01-02 14:49:51 +0530253 if (!omapdss_device_is_connected(dssdev))
Archit Taneja581382e2013-03-26 19:15:18 +0530254 continue;
Tomi Valkeinena7e71e72013-05-08 16:23:32 +0300255
Rob Clarkf5f94542012-12-04 13:59:12 -0600256 encoder = omap_encoder_init(dev, dssdev);
Jyri Sarhae8e13b12017-03-24 16:47:55 +0200257 if (!encoder)
Rob Clarkf5f94542012-12-04 13:59:12 -0600258 return -ENOMEM;
Rob Clarkf5f94542012-12-04 13:59:12 -0600259
260 connector = omap_connector_init(dev,
261 get_connector_type(dssdev), dssdev, encoder);
Jyri Sarhae8e13b12017-03-24 16:47:55 +0200262 if (!connector)
Rob Clarkf5f94542012-12-04 13:59:12 -0600263 return -ENOMEM;
Rob Clarkf5f94542012-12-04 13:59:12 -0600264
Jyri Sarhae8e13b12017-03-24 16:47:55 +0200265 plane = omap_plane_init(dev, plane_idx, DRM_PLANE_TYPE_PRIMARY,
266 plane_crtc_mask);
267 if (IS_ERR(plane))
268 return PTR_ERR(plane);
Rob Clarkf5f94542012-12-04 13:59:12 -0600269
Jyri Sarhae8e13b12017-03-24 16:47:55 +0200270 crtc = omap_crtc_init(dev, plane, dssdev);
271 if (IS_ERR(crtc))
272 return PTR_ERR(crtc);
273
274 drm_mode_connector_attach_encoder(connector, encoder);
275 encoder->possible_crtcs = (1 << crtc_idx);
276
277 priv->crtcs[priv->num_crtcs++] = crtc;
278 priv->planes[priv->num_planes++] = plane;
Rob Clarkf5f94542012-12-04 13:59:12 -0600279 priv->encoders[priv->num_encoders++] = encoder;
280 priv->connectors[priv->num_connectors++] = connector;
281
Jyri Sarhae8e13b12017-03-24 16:47:55 +0200282 plane_idx++;
283 crtc_idx++;
Archit Taneja0d8f3712013-03-26 19:15:19 +0530284 }
285
286 /*
Archit Taneja0d8f3712013-03-26 19:15:19 +0530287 * Create normal planes for the remaining overlays:
288 */
Jyri Sarhae8e13b12017-03-24 16:47:55 +0200289 for (; plane_idx < num_ovls; plane_idx++) {
Laurent Pinchartfb9a35f2015-01-11 16:30:44 +0200290 struct drm_plane *plane;
291
Jyri Sarhae8e13b12017-03-24 16:47:55 +0200292 if (WARN_ON(priv->num_planes >= ARRAY_SIZE(priv->planes)))
293 return -EINVAL;
294
295 plane = omap_plane_init(dev, plane_idx, DRM_PLANE_TYPE_OVERLAY,
296 plane_crtc_mask);
Laurent Pinchartfb9a35f2015-01-11 16:30:44 +0200297 if (IS_ERR(plane))
298 return PTR_ERR(plane);
Archit Taneja0d8f3712013-03-26 19:15:19 +0530299
Archit Taneja0d8f3712013-03-26 19:15:19 +0530300 priv->planes[priv->num_planes++] = plane;
301 }
302
Archit Taneja0d8f3712013-03-26 19:15:19 +0530303 DBG("registered %d planes, %d crtcs, %d encoders and %d connectors\n",
304 priv->num_planes, priv->num_crtcs, priv->num_encoders,
305 priv->num_connectors);
306
Tomi Valkeinen1e907112016-08-23 12:35:39 +0300307 dev->mode_config.min_width = 8;
308 dev->mode_config.min_height = 2;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600309
310 /* note: eventually will need some cpu_is_omapXYZ() type stuff here
311 * to fill in these limits properly on different OMAP generations..
312 */
313 dev->mode_config.max_width = 2048;
314 dev->mode_config.max_height = 2048;
315
316 dev->mode_config.funcs = &omap_mode_config_funcs;
Laurent Pincharta9e6f9f2017-05-09 01:27:10 +0300317 dev->mode_config.helper_private = &omap_mode_config_helper_funcs;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600318
Laurent Pinchart69a12262015-03-05 21:38:16 +0200319 drm_mode_config_reset(dev);
320
Laurent Pinchart728ae8d2015-05-28 00:21:29 +0300321 omap_drm_irq_install(dev);
322
Rob Clarkcd5351f2011-11-12 12:09:40 -0600323 return 0;
324}
325
Rob Clarkcd5351f2011-11-12 12:09:40 -0600326/*
Peter Ujfalusi3c596802017-06-02 15:26:35 +0300327 * Enable the HPD in external components if supported
328 */
329static void omap_modeset_enable_external_hpd(void)
330{
331 struct omap_dss_device *dssdev = NULL;
332
333 for_each_dss_dev(dssdev) {
334 if (dssdev->driver->enable_hpd)
335 dssdev->driver->enable_hpd(dssdev);
336 }
337}
338
339/*
340 * Disable the HPD in external components if supported
341 */
342static void omap_modeset_disable_external_hpd(void)
343{
344 struct omap_dss_device *dssdev = NULL;
345
346 for_each_dss_dev(dssdev) {
347 if (dssdev->driver->disable_hpd)
348 dssdev->driver->disable_hpd(dssdev);
349 }
350}
351
352/*
Rob Clarkcd5351f2011-11-12 12:09:40 -0600353 * drm ioctl funcs
354 */
355
356
357static int ioctl_get_param(struct drm_device *dev, void *data,
358 struct drm_file *file_priv)
359{
Rob Clark5e3b0872012-10-29 09:31:12 +0100360 struct omap_drm_private *priv = dev->dev_private;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600361 struct drm_omap_param *args = data;
362
363 DBG("%p: param=%llu", dev, args->param);
364
365 switch (args->param) {
366 case OMAP_PARAM_CHIPSET_ID:
Rob Clark5e3b0872012-10-29 09:31:12 +0100367 args->value = priv->omaprev;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600368 break;
369 default:
370 DBG("unknown parameter %lld", args->param);
371 return -EINVAL;
372 }
373
374 return 0;
375}
376
377static int ioctl_set_param(struct drm_device *dev, void *data,
378 struct drm_file *file_priv)
379{
380 struct drm_omap_param *args = data;
381
382 switch (args->param) {
383 default:
384 DBG("unknown parameter %lld", args->param);
385 return -EINVAL;
386 }
387
388 return 0;
389}
390
Laurent Pinchartef3f4e92015-12-14 22:39:36 +0200391#define OMAP_BO_USER_MASK 0x00ffffff /* flags settable by userspace */
392
Rob Clarkcd5351f2011-11-12 12:09:40 -0600393static int ioctl_gem_new(struct drm_device *dev, void *data,
394 struct drm_file *file_priv)
395{
396 struct drm_omap_gem_new *args = data;
Laurent Pinchartef3f4e92015-12-14 22:39:36 +0200397 u32 flags = args->flags & OMAP_BO_USER_MASK;
398
Rob Clarkf5f94542012-12-04 13:59:12 -0600399 VERB("%p:%p: size=0x%08x, flags=%08x", dev, file_priv,
Laurent Pinchartef3f4e92015-12-14 22:39:36 +0200400 args->size.bytes, flags);
401
402 return omap_gem_new_handle(dev, file_priv, args->size, flags,
403 &args->handle);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600404}
405
Rob Clarkcd5351f2011-11-12 12:09:40 -0600406static int ioctl_gem_info(struct drm_device *dev, void *data,
407 struct drm_file *file_priv)
408{
409 struct drm_omap_gem_info *args = data;
410 struct drm_gem_object *obj;
411 int ret = 0;
412
Rob Clarkf5f94542012-12-04 13:59:12 -0600413 VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600414
Chris Wilsona8ad0bd2016-05-09 11:04:54 +0100415 obj = drm_gem_object_lookup(file_priv, args->handle);
YAMANE Toshiakic7f904b2012-11-14 19:30:38 +0900416 if (!obj)
Rob Clarkcd5351f2011-11-12 12:09:40 -0600417 return -ENOENT;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600418
Rob Clarkf7f9f452011-12-05 19:19:22 -0600419 args->size = omap_gem_mmap_size(obj);
Rob Clarkcd5351f2011-11-12 12:09:40 -0600420 args->offset = omap_gem_mmap_offset(obj);
421
422 drm_gem_object_unreference_unlocked(obj);
423
424 return ret;
425}
426
Rob Clarkbaa70942013-08-02 13:27:49 -0400427static const struct drm_ioctl_desc ioctls[DRM_COMMAND_END - DRM_COMMAND_BASE] = {
Hemant Hariyani5f6ab8c2016-06-07 13:23:19 -0500428 DRM_IOCTL_DEF_DRV(OMAP_GET_PARAM, ioctl_get_param,
429 DRM_AUTH | DRM_RENDER_ALLOW),
430 DRM_IOCTL_DEF_DRV(OMAP_SET_PARAM, ioctl_set_param,
431 DRM_AUTH | DRM_MASTER | DRM_ROOT_ONLY),
432 DRM_IOCTL_DEF_DRV(OMAP_GEM_NEW, ioctl_gem_new,
433 DRM_AUTH | DRM_RENDER_ALLOW),
Laurent Pinchartd6f544f2017-05-09 01:27:11 +0300434 /* Deprecated, to be removed. */
435 DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_PREP, drm_noop,
Hemant Hariyani5f6ab8c2016-06-07 13:23:19 -0500436 DRM_AUTH | DRM_RENDER_ALLOW),
Laurent Pinchartd6f544f2017-05-09 01:27:11 +0300437 /* Deprecated, to be removed. */
438 DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_FINI, drm_noop,
Hemant Hariyani5f6ab8c2016-06-07 13:23:19 -0500439 DRM_AUTH | DRM_RENDER_ALLOW),
440 DRM_IOCTL_DEF_DRV(OMAP_GEM_INFO, ioctl_gem_info,
441 DRM_AUTH | DRM_RENDER_ALLOW),
Rob Clarkcd5351f2011-11-12 12:09:40 -0600442};
443
444/*
445 * drm driver funcs
446 */
447
Rob Clarkcd5351f2011-11-12 12:09:40 -0600448static int dev_open(struct drm_device *dev, struct drm_file *file)
449{
450 file->driver_priv = NULL;
451
452 DBG("open: dev=%p, file=%p", dev, file);
453
454 return 0;
455}
456
Rob Clarkcd5351f2011-11-12 12:09:40 -0600457/**
458 * lastclose - clean up after all DRM clients have exited
459 * @dev: DRM device
460 *
461 * Take care of cleaning up after all DRM clients have exited. In the
462 * mode setting case, we want to restore the kernel's initial mode (just
463 * in case the last client left us in a bad state).
464 */
465static void dev_lastclose(struct drm_device *dev)
466{
Rob Clark3c810c62012-08-15 15:18:01 -0500467 int i;
468
Lukas Wunnerf15a66e2015-09-05 11:22:39 +0200469 /* we don't support vga_switcheroo.. so just make sure the fbdev
Rob Clarkcd5351f2011-11-12 12:09:40 -0600470 * mode is active
471 */
472 struct omap_drm_private *priv = dev->dev_private;
473 int ret;
474
475 DBG("lastclose: dev=%p", dev);
476
Ville Syrjälä0da88db2016-09-26 19:30:52 +0300477 /* need to restore default rotation state.. not sure
478 * if there is a cleaner way to restore properties to
479 * default state? Maybe a flag that properties should
480 * automatically be restored to default state on
481 * lastclose?
482 */
483 for (i = 0; i < priv->num_crtcs; i++) {
484 struct drm_crtc *crtc = priv->crtcs[i];
Rob Clark3c810c62012-08-15 15:18:01 -0500485
Ville Syrjälä0da88db2016-09-26 19:30:52 +0300486 if (!crtc->primary->rotation_property)
487 continue;
488
489 drm_object_property_set_value(&crtc->base,
490 crtc->primary->rotation_property,
Robert Fossc2c446a2017-05-19 16:50:17 -0400491 DRM_MODE_ROTATE_0);
Ville Syrjälä0da88db2016-09-26 19:30:52 +0300492 }
493
494 for (i = 0; i < priv->num_planes; i++) {
495 struct drm_plane *plane = priv->planes[i];
496
497 if (!plane->rotation_property)
498 continue;
499
500 drm_object_property_set_value(&plane->base,
501 plane->rotation_property,
Robert Fossc2c446a2017-05-19 16:50:17 -0400502 DRM_MODE_ROTATE_0);
Rob Clark3c810c62012-08-15 15:18:01 -0500503 }
504
Tomi Valkeinenc7c1aec2014-09-25 19:24:26 +0000505 if (priv->fbdev) {
506 ret = drm_fb_helper_restore_fbdev_mode_unlocked(priv->fbdev);
507 if (ret)
508 DBG("failed to restore crtc mode");
509 }
Rob Clarkcd5351f2011-11-12 12:09:40 -0600510}
511
Laurent Pinchart78b68552012-05-17 13:27:22 +0200512static const struct vm_operations_struct omap_gem_vm_ops = {
Rob Clarkcd5351f2011-11-12 12:09:40 -0600513 .fault = omap_gem_fault,
514 .open = drm_gem_vm_open,
515 .close = drm_gem_vm_close,
516};
517
Rob Clarkff4f3872012-01-16 12:51:14 -0600518static const struct file_operations omapdriver_fops = {
Laurent Pinchart222025e2015-01-11 00:02:07 +0200519 .owner = THIS_MODULE,
520 .open = drm_open,
521 .unlocked_ioctl = drm_ioctl,
Tomi Valkeinen9d24159a2017-02-24 13:24:50 +0200522 .compat_ioctl = drm_compat_ioctl,
Laurent Pinchart222025e2015-01-11 00:02:07 +0200523 .release = drm_release,
524 .mmap = omap_gem_mmap,
525 .poll = drm_poll,
526 .read = drm_read,
527 .llseek = noop_llseek,
Rob Clarkff4f3872012-01-16 12:51:14 -0600528};
529
Rob Clarkcd5351f2011-11-12 12:09:40 -0600530static struct drm_driver omap_drm_driver = {
Tomi Valkeinen728fea72015-10-02 11:10:41 +0300531 .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME |
Hemant Hariyani5f6ab8c2016-06-07 13:23:19 -0500532 DRIVER_ATOMIC | DRIVER_RENDER,
Laurent Pinchart222025e2015-01-11 00:02:07 +0200533 .open = dev_open,
534 .lastclose = dev_lastclose,
Andy Gross6169a1482011-12-15 21:05:17 -0600535#ifdef CONFIG_DEBUG_FS
Laurent Pinchart222025e2015-01-11 00:02:07 +0200536 .debugfs_init = omap_debugfs_init,
Andy Gross6169a1482011-12-15 21:05:17 -0600537#endif
Laurent Pinchart222025e2015-01-11 00:02:07 +0200538 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
539 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
540 .gem_prime_export = omap_gem_prime_export,
541 .gem_prime_import = omap_gem_prime_import,
542 .gem_free_object = omap_gem_free_object,
543 .gem_vm_ops = &omap_gem_vm_ops,
544 .dumb_create = omap_gem_dumb_create,
545 .dumb_map_offset = omap_gem_dumb_map_offset,
Laurent Pinchart222025e2015-01-11 00:02:07 +0200546 .ioctls = ioctls,
547 .num_ioctls = DRM_OMAP_NUM_IOCTLS,
548 .fops = &omapdriver_fops,
549 .name = DRIVER_NAME,
550 .desc = DRIVER_DESC,
551 .date = DRIVER_DATE,
552 .major = DRIVER_MAJOR,
553 .minor = DRIVER_MINOR,
554 .patchlevel = DRIVER_PATCHLEVEL,
Rob Clarkcd5351f2011-11-12 12:09:40 -0600555};
556
Laurent Pinchart6e471fa2017-05-06 02:57:12 +0300557static const struct soc_device_attribute omapdrm_soc_devices[] = {
558 { .family = "OMAP3", .data = (void *)0x3430 },
559 { .family = "OMAP4", .data = (void *)0x4430 },
560 { .family = "OMAP5", .data = (void *)0x5430 },
561 { .family = "DRA7", .data = (void *)0x0752 },
562 { /* sentinel */ }
563};
564
Laurent Pinchart2f95bc62016-12-12 11:28:47 +0200565static int pdev_probe(struct platform_device *pdev)
Rob Clarkcd5351f2011-11-12 12:09:40 -0600566{
Laurent Pinchart6e471fa2017-05-06 02:57:12 +0300567 const struct soc_device_attribute *soc;
Laurent Pinchart2f95bc62016-12-12 11:28:47 +0200568 struct omap_drm_private *priv;
569 struct drm_device *ddev;
570 unsigned int i;
571 int ret;
572
573 DBG("%s", pdev->name);
Archit Taneja3a01ab22014-01-02 14:49:51 +0530574
Tomi Valkeinen591a0ac2013-05-23 12:07:50 +0300575 if (omapdss_is_initialized() == false)
576 return -EPROBE_DEFER;
577
Laurent Pinchart510c74c2017-08-11 16:49:08 +0300578 ret = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
579 if (ret) {
580 dev_err(&pdev->dev, "Failed to set the DMA mask\n");
581 return ret;
582 }
583
Archit Taneja3a01ab22014-01-02 14:49:51 +0530584 omap_crtc_pre_init();
585
Laurent Pinchart2f95bc62016-12-12 11:28:47 +0200586 ret = omap_connect_dssdevs();
587 if (ret)
588 goto err_crtc_uninit;
589
590 /* Allocate and initialize the driver private structure. */
591 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
592 if (!priv) {
593 ret = -ENOMEM;
594 goto err_disconnect_dssdevs;
Archit Taneja3a01ab22014-01-02 14:49:51 +0530595 }
596
Tomi Valkeinen9f759222015-11-05 18:39:52 +0200597 priv->dispc_ops = dispc_get_ops();
598
Laurent Pinchart6e471fa2017-05-06 02:57:12 +0300599 soc = soc_device_match(omapdrm_soc_devices);
600 priv->omaprev = soc ? (unsigned int)soc->data : 0;
Laurent Pinchart2f95bc62016-12-12 11:28:47 +0200601 priv->wq = alloc_ordered_workqueue("omapdrm", 0);
602
Laurent Pinchart2f95bc62016-12-12 11:28:47 +0200603 spin_lock_init(&priv->list_lock);
604 INIT_LIST_HEAD(&priv->obj_list);
605
606 /* Allocate and initialize the DRM device. */
607 ddev = drm_dev_alloc(&omap_drm_driver, &pdev->dev);
608 if (IS_ERR(ddev)) {
609 ret = PTR_ERR(ddev);
610 goto err_free_priv;
611 }
612
613 ddev->dev_private = priv;
614 platform_set_drvdata(pdev, ddev);
615
616 omap_gem_init(ddev);
617
618 ret = omap_modeset_init(ddev);
619 if (ret) {
620 dev_err(&pdev->dev, "omap_modeset_init failed: ret=%d\n", ret);
621 goto err_free_drm_dev;
622 }
623
624 /* Initialize vblank handling, start with all CRTCs disabled. */
625 ret = drm_vblank_init(ddev, priv->num_crtcs);
626 if (ret) {
627 dev_err(&pdev->dev, "could not init vblank\n");
628 goto err_cleanup_modeset;
629 }
630
631 for (i = 0; i < priv->num_crtcs; i++)
632 drm_crtc_vblank_off(priv->crtcs[i]);
633
634 priv->fbdev = omap_fbdev_init(ddev);
635
636 drm_kms_helper_poll_init(ddev);
Peter Ujfalusi3c596802017-06-02 15:26:35 +0300637 omap_modeset_enable_external_hpd();
Laurent Pinchart2f95bc62016-12-12 11:28:47 +0200638
639 /*
640 * Register the DRM device with the core and the connectors with
641 * sysfs.
642 */
643 ret = drm_dev_register(ddev, 0);
644 if (ret)
645 goto err_cleanup_helpers;
646
647 return 0;
648
649err_cleanup_helpers:
Peter Ujfalusi3c596802017-06-02 15:26:35 +0300650 omap_modeset_disable_external_hpd();
Laurent Pinchart2f95bc62016-12-12 11:28:47 +0200651 drm_kms_helper_poll_fini(ddev);
652 if (priv->fbdev)
653 omap_fbdev_free(ddev);
654err_cleanup_modeset:
655 drm_mode_config_cleanup(ddev);
656 omap_drm_irq_uninstall(ddev);
657err_free_drm_dev:
658 omap_gem_deinit(ddev);
659 drm_dev_unref(ddev);
660err_free_priv:
661 destroy_workqueue(priv->wq);
662 kfree(priv);
663err_disconnect_dssdevs:
664 omap_disconnect_dssdevs();
665err_crtc_uninit:
666 omap_crtc_pre_uninit();
667 return ret;
Rob Clarkcd5351f2011-11-12 12:09:40 -0600668}
669
Laurent Pinchart2f95bc62016-12-12 11:28:47 +0200670static int pdev_remove(struct platform_device *pdev)
Rob Clarkcd5351f2011-11-12 12:09:40 -0600671{
Laurent Pinchart2f95bc62016-12-12 11:28:47 +0200672 struct drm_device *ddev = platform_get_drvdata(pdev);
673 struct omap_drm_private *priv = ddev->dev_private;
674
Rob Clarkcd5351f2011-11-12 12:09:40 -0600675 DBG("");
Andy Gross5c137792012-03-05 10:48:39 -0600676
Laurent Pinchart2f95bc62016-12-12 11:28:47 +0200677 drm_dev_unregister(ddev);
678
Peter Ujfalusi3c596802017-06-02 15:26:35 +0300679 omap_modeset_disable_external_hpd();
Laurent Pinchart2f95bc62016-12-12 11:28:47 +0200680 drm_kms_helper_poll_fini(ddev);
681
682 if (priv->fbdev)
683 omap_fbdev_free(ddev);
684
Tomi Valkeinen8a54aa92017-03-27 10:02:22 +0300685 drm_atomic_helper_shutdown(ddev);
686
Laurent Pinchart2f95bc62016-12-12 11:28:47 +0200687 drm_mode_config_cleanup(ddev);
688
689 omap_drm_irq_uninstall(ddev);
690 omap_gem_deinit(ddev);
691
692 drm_dev_unref(ddev);
693
694 destroy_workqueue(priv->wq);
695 kfree(priv);
Tomi Valkeinen707cf582014-04-02 13:47:43 +0300696
Archit Tanejacc823bd2014-01-02 14:49:52 +0530697 omap_disconnect_dssdevs();
698 omap_crtc_pre_uninit();
Daniel Vetterfd3c0252013-12-11 11:34:26 +0100699
Rob Clarkcd5351f2011-11-12 12:09:40 -0600700 return 0;
701}
702
Grygorii Strashko8450c8d2015-02-26 15:57:17 +0200703#ifdef CONFIG_PM_SLEEP
Tomi Valkeinen92bf0f92015-10-02 11:10:42 +0300704static int omap_drm_suspend_all_displays(void)
705{
706 struct omap_dss_device *dssdev = NULL;
707
708 for_each_dss_dev(dssdev) {
709 if (!dssdev->driver)
710 continue;
711
712 if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE) {
713 dssdev->driver->disable(dssdev);
714 dssdev->activate_after_resume = true;
715 } else {
716 dssdev->activate_after_resume = false;
717 }
718 }
719
720 return 0;
721}
722
723static int omap_drm_resume_all_displays(void)
724{
725 struct omap_dss_device *dssdev = NULL;
726
727 for_each_dss_dev(dssdev) {
728 if (!dssdev->driver)
729 continue;
730
731 if (dssdev->activate_after_resume) {
732 dssdev->driver->enable(dssdev);
733 dssdev->activate_after_resume = false;
734 }
735 }
736
737 return 0;
738}
739
Tomi Valkeinenccd7b5e2014-11-14 15:18:28 +0200740static int omap_drm_suspend(struct device *dev)
741{
742 struct drm_device *drm_dev = dev_get_drvdata(dev);
743
744 drm_kms_helper_poll_disable(drm_dev);
745
Tomi Valkeinen92bf0f92015-10-02 11:10:42 +0300746 drm_modeset_lock_all(drm_dev);
747 omap_drm_suspend_all_displays();
748 drm_modeset_unlock_all(drm_dev);
749
Tomi Valkeinenccd7b5e2014-11-14 15:18:28 +0200750 return 0;
751}
752
753static int omap_drm_resume(struct device *dev)
754{
755 struct drm_device *drm_dev = dev_get_drvdata(dev);
756
Tomi Valkeinen92bf0f92015-10-02 11:10:42 +0300757 drm_modeset_lock_all(drm_dev);
758 omap_drm_resume_all_displays();
759 drm_modeset_unlock_all(drm_dev);
760
Tomi Valkeinenccd7b5e2014-11-14 15:18:28 +0200761 drm_kms_helper_poll_enable(drm_dev);
762
763 return omap_gem_resume(dev);
764}
Andy Grosse78edba2012-12-19 14:53:37 -0600765#endif
766
Grygorii Strashko8450c8d2015-02-26 15:57:17 +0200767static SIMPLE_DEV_PM_OPS(omapdrm_pm_ops, omap_drm_suspend, omap_drm_resume);
768
Tomi Valkeinen6717cd22013-04-10 10:44:00 +0300769static struct platform_driver pdev = {
Laurent Pinchart222025e2015-01-11 00:02:07 +0200770 .driver = {
Tomi Valkeinenf64eafa2017-08-16 12:43:55 +0300771 .name = "omapdrm",
Laurent Pinchart222025e2015-01-11 00:02:07 +0200772 .pm = &omapdrm_pm_ops,
Laurent Pinchart222025e2015-01-11 00:02:07 +0200773 },
774 .probe = pdev_probe,
775 .remove = pdev_remove,
Rob Clarkcd5351f2011-11-12 12:09:40 -0600776};
777
Thierry Redinge1c49bd2015-12-02 17:23:31 +0100778static struct platform_driver * const drivers[] = {
779 &omap_dmm_driver,
780 &pdev,
781};
782
Rob Clarkcd5351f2011-11-12 12:09:40 -0600783static int __init omap_drm_init(void)
784{
785 DBG("init");
Tomi Valkeinenea7e3a62014-04-02 14:31:50 +0300786
Thierry Redinge1c49bd2015-12-02 17:23:31 +0100787 return platform_register_drivers(drivers, ARRAY_SIZE(drivers));
Rob Clarkcd5351f2011-11-12 12:09:40 -0600788}
789
790static void __exit omap_drm_fini(void)
791{
792 DBG("fini");
Tomi Valkeinenea7e3a62014-04-02 14:31:50 +0300793
Thierry Redinge1c49bd2015-12-02 17:23:31 +0100794 platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
Rob Clarkcd5351f2011-11-12 12:09:40 -0600795}
796
797/* need late_initcall() so we load after dss_driver's are loaded */
798late_initcall(omap_drm_init);
799module_exit(omap_drm_fini);
800
801MODULE_AUTHOR("Rob Clark <rob@ti.com>");
802MODULE_DESCRIPTION("OMAP DRM Display Driver");
803MODULE_ALIAS("platform:" DRIVER_NAME);
804MODULE_LICENSE("GPL v2");