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Kishon Vijay Abraham I26a84b32012-08-22 14:10:02 +05301#
2# Bus Devices
3#
4
5menu "Bus devices"
6
Geert Uytterhoeven13fbf3c2015-02-05 11:11:24 +01007config ARM_CCI
Olof Johansson47f36e42015-04-03 13:38:43 -07008 bool
9
Suzuki K. Poulosef4d58932015-05-26 10:53:14 +010010config ARM_CCI_PMU
11 bool
12 select ARM_CCI
13
Olof Johansson47f36e42015-04-03 13:38:43 -070014config ARM_CCI400_COMMON
15 bool
16 select ARM_CCI
17
18config ARM_CCI400_PMU
19 bool "ARM CCI400 PMU support"
Suzuki K. Poulose85bbba72015-05-26 10:53:10 +010020 depends on (ARM && CPU_V7) || ARM64
21 depends on PERF_EVENTS
Olof Johansson47f36e42015-04-03 13:38:43 -070022 select ARM_CCI400_COMMON
Suzuki K. Poulosef4d58932015-05-26 10:53:14 +010023 select ARM_CCI_PMU
Geert Uytterhoeven13fbf3c2015-02-05 11:11:24 +010024 help
Suzuki K. Poulose85bbba72015-05-26 10:53:10 +010025 Support for PMU events monitoring on the ARM CCI-400 (cache coherent
26 interconnect). CCI-400 supports counting events related to the
27 connected slave/master interfaces.
Olof Johansson47f36e42015-04-03 13:38:43 -070028
29config ARM_CCI400_PORT_CTRL
30 bool
31 depends on ARM && OF && CPU_V7
32 select ARM_CCI400_COMMON
33 help
34 Low level power management driver for CCI400 cache coherent
35 interconnect for ARM platforms.
Geert Uytterhoeven13fbf3c2015-02-05 11:11:24 +010036
37config ARM_CCN
38 bool "ARM CCN driver support"
39 depends on ARM || ARM64
40 depends on PERF_EVENTS
41 help
42 PMU (perf) driver supporting the ARM CCN (Cache Coherent Network)
43 interconnect.
44
Florian Fainelli44127b72014-05-19 13:05:59 -070045config BRCMSTB_GISB_ARB
46 bool "Broadcom STB GISB bus arbiter"
Kevin Cernekeedd1d78a2014-11-25 16:49:49 -080047 depends on ARM || MIPS
Florian Fainelli44127b72014-05-19 13:05:59 -070048 help
49 Driver for the Broadcom Set Top Box System-on-a-chip internal bus
50 arbiter. This driver provides timeout and target abort error handling
51 and internal bus master decoding.
52
Huang Shijie85bf6d42013-05-28 14:20:07 +080053config IMX_WEIM
54 bool "Freescale EIM DRIVER"
55 depends on ARCH_MXC
56 help
Alexander Shiyan3f98b6b2013-06-29 08:27:54 +040057 Driver for i.MX WEIM controller.
Huang Shijie85bf6d42013-05-28 14:20:07 +080058 The WEIM(Wireless External Interface Module) works like a bus.
59 You can attach many different devices on it, such as NOR, onenand.
Huang Shijie85bf6d42013-05-28 14:20:07 +080060
James Hogan8286ae02015-03-25 15:39:50 +000061config MIPS_CDMM
62 bool "MIPS Common Device Memory Map (CDMM) Driver"
63 depends on CPU_MIPSR2
64 help
65 Driver needed for the MIPS Common Device Memory Map bus in MIPS
66 cores. This bus is for per-CPU tightly coupled devices such as the
67 Fast Debug Channel (FDC).
68
69 For this to work, either your bootloader needs to enable the CDMM
70 region at an unused physical address on the boot CPU, or else your
71 platform code needs to implement mips_cdmm_phys_base() (see
72 asm/cdmm.h).
73
Thomas Petazzonifddddb52013-03-21 17:59:14 +010074config MVEBU_MBUS
75 bool
76 depends on PLAT_ORION
77 help
78 Driver needed for the MBus configuration on Marvell EBU SoCs
79 (Kirkwood, Dove, Orion5x, MV78XX0 and Armada 370/XP).
80
Geert Uytterhoeven13fbf3c2015-02-05 11:11:24 +010081config OMAP_INTERCONNECT
82 tristate "OMAP INTERCONNECT DRIVER"
83 depends on ARCH_OMAP2PLUS
84
85 help
86 Driver to enable OMAP interconnect error handling driver.
87
Kishon Vijay Abraham I26a84b32012-08-22 14:10:02 +053088config OMAP_OCP2SCP
89 tristate "OMAP OCP2SCP DRIVER"
Tony Lindgren770b6cb2012-12-16 12:28:46 -080090 depends on ARCH_OMAP2PLUS
Kishon Vijay Abraham I26a84b32012-08-22 14:10:02 +053091 help
92 Driver to enable ocp2scp module which transforms ocp interface
93 protocol to scp protocol. In OMAP4, USB PHY is connected via
94 OCP2SCP and in OMAP5, both USB PHY and SATA PHY is connected via
95 OCP2SCP.
96
Geert Uytterhoeven89d463e2015-02-05 11:11:28 +010097config SIMPLE_PM_BUS
98 bool "Simple Power-Managed Bus Driver"
99 depends on OF && PM
100 depends on ARCH_SHMOBILE || COMPILE_TEST
Santosh Shilimkar0ee72612012-09-14 14:50:34 +0530101 help
Geert Uytterhoeven89d463e2015-02-05 11:11:28 +0100102 Driver for transparent busses that don't need a real driver, but
103 where the bus controller is part of a PM domain, or under the control
104 of a functional clock, and thus relies on runtime PM for managing
105 this PM domain and/or clock.
106 An example of such a bus controller is the Renesas Bus State
107 Controller (BSC, sometimes called "LBSC within Bus Bridge", or
108 "External Bus Interface") as found on several Renesas ARM SoCs.
Pawel Molla33b0da2014-07-22 18:32:59 +0100109
Pawel Moll3b9334a2014-04-30 16:46:29 +0100110config VEXPRESS_CONFIG
111 bool "Versatile Express configuration bus"
112 default y if ARCH_VEXPRESS
113 depends on ARM || ARM64
Arnd Bergmannb33cdd22014-05-26 17:25:22 +0200114 depends on OF
Pawel Moll3b9334a2014-04-30 16:46:29 +0100115 select REGMAP
116 help
117 Platform configuration infrastructure for the ARM Ltd.
118 Versatile Express.
Kishon Vijay Abraham I26a84b32012-08-22 14:10:02 +0530119endmenu