Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * linux/arch/arm/mach-pxa/pxa27x.c |
| 3 | * |
| 4 | * Author: Nicolas Pitre |
| 5 | * Created: Nov 05, 2002 |
| 6 | * Copyright: MontaVista Software Inc. |
| 7 | * |
| 8 | * Code specific to PXA27x aka Bulverde. |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify |
| 11 | * it under the terms of the GNU General Public License version 2 as |
| 12 | * published by the Free Software Foundation. |
| 13 | */ |
Russell King | 2f8163b | 2011-07-26 10:53:52 +0100 | [diff] [blame] | 14 | #include <linux/gpio.h> |
Haojian Zhuang | 157d264 | 2011-10-17 20:37:52 +0800 | [diff] [blame] | 15 | #include <linux/gpio-pxa.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 16 | #include <linux/module.h> |
| 17 | #include <linux/kernel.h> |
| 18 | #include <linux/init.h> |
Rafael J. Wysocki | 95d9ffb | 2007-10-18 03:04:39 -0700 | [diff] [blame] | 19 | #include <linux/suspend.h> |
Russell King | d052d1b | 2005-10-29 19:07:23 +0100 | [diff] [blame] | 20 | #include <linux/platform_device.h> |
Rafael J. Wysocki | 2eaa03b | 2011-04-22 22:03:11 +0200 | [diff] [blame] | 21 | #include <linux/syscore_ops.h> |
Marek Vasut | ad68bb9 | 2010-11-03 16:29:35 +0100 | [diff] [blame] | 22 | #include <linux/io.h> |
Lennert Buytenhek | a3f4c92 | 2010-11-29 11:18:26 +0100 | [diff] [blame] | 23 | #include <linux/irq.h> |
Sebastian Andrzej Siewior | b459396 | 2011-02-23 12:38:16 +0100 | [diff] [blame] | 24 | #include <linux/i2c/pxa-i2c.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 25 | |
Marek Vasut | 851982c | 2010-10-11 02:20:19 +0200 | [diff] [blame] | 26 | #include <asm/mach/map.h> |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 27 | #include <mach/hardware.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 28 | #include <asm/irq.h> |
Russell King | 2c74a0c | 2011-06-22 17:41:48 +0100 | [diff] [blame] | 29 | #include <asm/suspend.h> |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 30 | #include <mach/irqs.h> |
Eric Miao | 51c6298 | 2009-01-02 23:17:22 +0800 | [diff] [blame] | 31 | #include <mach/pxa27x.h> |
Russell King | afd2fc0 | 2008-08-07 11:05:25 +0100 | [diff] [blame] | 32 | #include <mach/reset.h> |
Arnd Bergmann | 293b2da | 2012-08-24 15:16:48 +0200 | [diff] [blame] | 33 | #include <linux/platform_data/usb-ohci-pxa27x.h> |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 34 | #include <mach/pm.h> |
| 35 | #include <mach/dma.h> |
Marek Vasut | ad68bb9 | 2010-11-03 16:29:35 +0100 | [diff] [blame] | 36 | #include <mach/smemc.h> |
| 37 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 38 | #include "generic.h" |
Russell King | 46c41e6 | 2007-05-15 15:39:36 +0100 | [diff] [blame] | 39 | #include "devices.h" |
Russell King | a6dba20 | 2007-08-20 10:18:02 +0100 | [diff] [blame] | 40 | #include "clock.h" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 41 | |
Eric Miao | 0cb0b0d | 2008-10-04 12:45:39 +0800 | [diff] [blame] | 42 | void pxa27x_clear_otgph(void) |
| 43 | { |
| 44 | if (cpu_is_pxa27x() && (PSSR & PSSR_OTGPH)) |
| 45 | PSSR |= PSSR_OTGPH; |
| 46 | } |
| 47 | EXPORT_SYMBOL(pxa27x_clear_otgph); |
| 48 | |
Eric Miao | fb1bf8c | 2010-01-04 16:30:58 +0800 | [diff] [blame] | 49 | static unsigned long ac97_reset_config[] = { |
Mike Dunn | 3b4bc7b | 2013-01-07 13:55:13 -0800 | [diff] [blame] | 50 | GPIO113_AC97_nRESET_GPIO_HIGH, |
Eric Miao | 5e16e3c | 2010-07-13 09:41:28 +0800 | [diff] [blame] | 51 | GPIO113_AC97_nRESET, |
Mike Dunn | 3b4bc7b | 2013-01-07 13:55:13 -0800 | [diff] [blame] | 52 | GPIO95_AC97_nRESET_GPIO_HIGH, |
Eric Miao | 5e16e3c | 2010-07-13 09:41:28 +0800 | [diff] [blame] | 53 | GPIO95_AC97_nRESET, |
Eric Miao | fb1bf8c | 2010-01-04 16:30:58 +0800 | [diff] [blame] | 54 | }; |
| 55 | |
Mike Dunn | 053fe0f | 2013-01-07 13:55:14 -0800 | [diff] [blame] | 56 | void pxa27x_configure_ac97reset(int reset_gpio, bool to_gpio) |
Eric Miao | fb1bf8c | 2010-01-04 16:30:58 +0800 | [diff] [blame] | 57 | { |
Mike Dunn | 053fe0f | 2013-01-07 13:55:14 -0800 | [diff] [blame] | 58 | /* |
| 59 | * This helper function is used to work around a bug in the pxa27x's |
| 60 | * ac97 controller during a warm reset. The configuration of the |
| 61 | * reset_gpio is changed as follows: |
| 62 | * to_gpio == true: configured to generic output gpio and driven high |
| 63 | * to_gpio == false: configured to ac97 controller alt fn AC97_nRESET |
| 64 | */ |
| 65 | |
Eric Miao | fb1bf8c | 2010-01-04 16:30:58 +0800 | [diff] [blame] | 66 | if (reset_gpio == 113) |
Mike Dunn | 053fe0f | 2013-01-07 13:55:14 -0800 | [diff] [blame] | 67 | pxa2xx_mfp_config(to_gpio ? &ac97_reset_config[0] : |
| 68 | &ac97_reset_config[1], 1); |
Eric Miao | fb1bf8c | 2010-01-04 16:30:58 +0800 | [diff] [blame] | 69 | |
| 70 | if (reset_gpio == 95) |
Mike Dunn | 053fe0f | 2013-01-07 13:55:14 -0800 | [diff] [blame] | 71 | pxa2xx_mfp_config(to_gpio ? &ac97_reset_config[2] : |
| 72 | &ac97_reset_config[3], 1); |
Eric Miao | fb1bf8c | 2010-01-04 16:30:58 +0800 | [diff] [blame] | 73 | } |
Mike Dunn | 053fe0f | 2013-01-07 13:55:14 -0800 | [diff] [blame] | 74 | EXPORT_SYMBOL_GPL(pxa27x_configure_ac97reset); |
Eric Miao | fb1bf8c | 2010-01-04 16:30:58 +0800 | [diff] [blame] | 75 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 76 | /* Crystal clock: 13MHz */ |
| 77 | #define BASE_CLK 13000000 |
| 78 | |
| 79 | /* |
| 80 | * Get the clock frequency as reflected by CCSR and the turbo flag. |
| 81 | * We assume these values have been applied via a fcs. |
| 82 | * If info is not 0 we also display the current settings. |
| 83 | */ |
Russell King | 15a4033 | 2007-08-20 10:07:44 +0100 | [diff] [blame] | 84 | unsigned int pxa27x_get_clk_frequency_khz(int info) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 85 | { |
| 86 | unsigned long ccsr, clkcfg; |
| 87 | unsigned int l, L, m, M, n2, N, S; |
| 88 | int cccr_a, t, ht, b; |
| 89 | |
| 90 | ccsr = CCSR; |
| 91 | cccr_a = CCCR & (1 << 25); |
| 92 | |
| 93 | /* Read clkcfg register: it has turbo, b, half-turbo (and f) */ |
| 94 | asm( "mrc\tp14, 0, %0, c6, c0, 0" : "=r" (clkcfg) ); |
Richard Purdie | afe5df2 | 2006-02-01 19:25:59 +0000 | [diff] [blame] | 95 | t = clkcfg & (1 << 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 96 | ht = clkcfg & (1 << 2); |
| 97 | b = clkcfg & (1 << 3); |
| 98 | |
| 99 | l = ccsr & 0x1f; |
| 100 | n2 = (ccsr>>7) & 0xf; |
| 101 | m = (l <= 10) ? 1 : (l <= 20) ? 2 : 4; |
| 102 | |
| 103 | L = l * BASE_CLK; |
| 104 | N = (L * n2) / 2; |
| 105 | M = (!cccr_a) ? (L/m) : ((b) ? L : (L/2)); |
| 106 | S = (b) ? L : (L/2); |
| 107 | |
| 108 | if (info) { |
| 109 | printk( KERN_INFO "Run Mode clock: %d.%02dMHz (*%d)\n", |
| 110 | L / 1000000, (L % 1000000) / 10000, l ); |
| 111 | printk( KERN_INFO "Turbo Mode clock: %d.%02dMHz (*%d.%d, %sactive)\n", |
| 112 | N / 1000000, (N % 1000000)/10000, n2 / 2, (n2 % 2)*5, |
| 113 | (t) ? "" : "in" ); |
| 114 | printk( KERN_INFO "Memory clock: %d.%02dMHz (/%d)\n", |
| 115 | M / 1000000, (M % 1000000) / 10000, m ); |
| 116 | printk( KERN_INFO "System bus clock: %d.%02dMHz \n", |
| 117 | S / 1000000, (S % 1000000) / 10000 ); |
| 118 | } |
| 119 | |
| 120 | return (t) ? (N/1000) : (L/1000); |
| 121 | } |
| 122 | |
| 123 | /* |
Eric Miao | 2a125dd | 2010-11-22 22:48:49 +0800 | [diff] [blame] | 124 | * Return the current mem clock frequency as reflected by CCCR[A], B, and L |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 125 | */ |
Eric Miao | 2a125dd | 2010-11-22 22:48:49 +0800 | [diff] [blame] | 126 | static unsigned long clk_pxa27x_mem_getrate(struct clk *clk) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 127 | { |
| 128 | unsigned long ccsr, clkcfg; |
| 129 | unsigned int l, L, m, M; |
| 130 | int cccr_a, b; |
| 131 | |
| 132 | ccsr = CCSR; |
| 133 | cccr_a = CCCR & (1 << 25); |
| 134 | |
| 135 | /* Read clkcfg register: it has turbo, b, half-turbo (and f) */ |
| 136 | asm( "mrc\tp14, 0, %0, c6, c0, 0" : "=r" (clkcfg) ); |
| 137 | b = clkcfg & (1 << 3); |
| 138 | |
| 139 | l = ccsr & 0x1f; |
| 140 | m = (l <= 10) ? 1 : (l <= 20) ? 2 : 4; |
| 141 | |
| 142 | L = l * BASE_CLK; |
| 143 | M = (!cccr_a) ? (L/m) : ((b) ? L : (L/2)); |
| 144 | |
Eric Miao | 2a125dd | 2010-11-22 22:48:49 +0800 | [diff] [blame] | 145 | return M; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 146 | } |
| 147 | |
Eric Miao | 2a125dd | 2010-11-22 22:48:49 +0800 | [diff] [blame] | 148 | static const struct clkops clk_pxa27x_mem_ops = { |
| 149 | .enable = clk_dummy_enable, |
| 150 | .disable = clk_dummy_disable, |
| 151 | .getrate = clk_pxa27x_mem_getrate, |
| 152 | }; |
| 153 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 154 | /* |
| 155 | * Return the current LCD clock frequency in units of 10kHz as |
| 156 | */ |
Russell King | a88a447 | 2007-08-20 10:34:37 +0100 | [diff] [blame] | 157 | static unsigned int pxa27x_get_lcdclk_frequency_10khz(void) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 158 | { |
| 159 | unsigned long ccsr; |
| 160 | unsigned int l, L, k, K; |
| 161 | |
| 162 | ccsr = CCSR; |
| 163 | |
| 164 | l = ccsr & 0x1f; |
| 165 | k = (l <= 7) ? 1 : (l <= 16) ? 2 : 4; |
| 166 | |
| 167 | L = l * BASE_CLK; |
| 168 | K = L / k; |
| 169 | |
| 170 | return (K / 10000); |
| 171 | } |
| 172 | |
Russell King | a6dba20 | 2007-08-20 10:18:02 +0100 | [diff] [blame] | 173 | static unsigned long clk_pxa27x_lcd_getrate(struct clk *clk) |
| 174 | { |
| 175 | return pxa27x_get_lcdclk_frequency_10khz() * 10000; |
| 176 | } |
| 177 | |
| 178 | static const struct clkops clk_pxa27x_lcd_ops = { |
Eric Miao | 4029813 | 2010-11-22 10:49:55 +0800 | [diff] [blame] | 179 | .enable = clk_pxa2xx_cken_enable, |
| 180 | .disable = clk_pxa2xx_cken_disable, |
Russell King | a6dba20 | 2007-08-20 10:18:02 +0100 | [diff] [blame] | 181 | .getrate = clk_pxa27x_lcd_getrate, |
| 182 | }; |
| 183 | |
Eric Miao | 4029813 | 2010-11-22 10:49:55 +0800 | [diff] [blame] | 184 | static DEFINE_PXA2_CKEN(pxa27x_ffuart, FFUART, 14857000, 1); |
| 185 | static DEFINE_PXA2_CKEN(pxa27x_btuart, BTUART, 14857000, 1); |
| 186 | static DEFINE_PXA2_CKEN(pxa27x_stuart, STUART, 14857000, 1); |
| 187 | static DEFINE_PXA2_CKEN(pxa27x_i2s, I2S, 14682000, 0); |
| 188 | static DEFINE_PXA2_CKEN(pxa27x_i2c, I2C, 32842000, 0); |
| 189 | static DEFINE_PXA2_CKEN(pxa27x_usb, USB, 48000000, 5); |
| 190 | static DEFINE_PXA2_CKEN(pxa27x_mmc, MMC, 19500000, 0); |
| 191 | static DEFINE_PXA2_CKEN(pxa27x_ficp, FICP, 48000000, 0); |
| 192 | static DEFINE_PXA2_CKEN(pxa27x_usbhost, USBHOST, 48000000, 0); |
| 193 | static DEFINE_PXA2_CKEN(pxa27x_pwri2c, PWRI2C, 13000000, 0); |
| 194 | static DEFINE_PXA2_CKEN(pxa27x_keypad, KEYPAD, 32768, 0); |
| 195 | static DEFINE_PXA2_CKEN(pxa27x_ssp1, SSP1, 13000000, 0); |
| 196 | static DEFINE_PXA2_CKEN(pxa27x_ssp2, SSP2, 13000000, 0); |
| 197 | static DEFINE_PXA2_CKEN(pxa27x_ssp3, SSP3, 13000000, 0); |
| 198 | static DEFINE_PXA2_CKEN(pxa27x_pwm0, PWM0, 13000000, 0); |
| 199 | static DEFINE_PXA2_CKEN(pxa27x_pwm1, PWM1, 13000000, 0); |
| 200 | static DEFINE_PXA2_CKEN(pxa27x_ac97, AC97, 24576000, 0); |
| 201 | static DEFINE_PXA2_CKEN(pxa27x_ac97conf, AC97CONF, 24576000, 0); |
| 202 | static DEFINE_PXA2_CKEN(pxa27x_msl, MSL, 48000000, 0); |
| 203 | static DEFINE_PXA2_CKEN(pxa27x_usim, USIM, 48000000, 0); |
| 204 | static DEFINE_PXA2_CKEN(pxa27x_memstk, MEMSTK, 19500000, 0); |
| 205 | static DEFINE_PXA2_CKEN(pxa27x_im, IM, 0, 0); |
| 206 | static DEFINE_PXA2_CKEN(pxa27x_memc, MEMC, 0, 0); |
| 207 | |
Russell King | 8c3abc7 | 2008-11-08 20:25:21 +0000 | [diff] [blame] | 208 | static DEFINE_CK(pxa27x_lcd, LCD, &clk_pxa27x_lcd_ops); |
| 209 | static DEFINE_CK(pxa27x_camera, CAMERA, &clk_pxa27x_lcd_ops); |
Eric Miao | 2a125dd | 2010-11-22 22:48:49 +0800 | [diff] [blame] | 210 | static DEFINE_CLK(pxa27x_mem, &clk_pxa27x_mem_ops, 0, 0); |
Russell King | a6dba20 | 2007-08-20 10:18:02 +0100 | [diff] [blame] | 211 | |
Russell King | 8c3abc7 | 2008-11-08 20:25:21 +0000 | [diff] [blame] | 212 | static struct clk_lookup pxa27x_clkregs[] = { |
| 213 | INIT_CLKREG(&clk_pxa27x_lcd, "pxa2xx-fb", NULL), |
| 214 | INIT_CLKREG(&clk_pxa27x_camera, "pxa27x-camera.0", NULL), |
| 215 | INIT_CLKREG(&clk_pxa27x_ffuart, "pxa2xx-uart.0", NULL), |
| 216 | INIT_CLKREG(&clk_pxa27x_btuart, "pxa2xx-uart.1", NULL), |
| 217 | INIT_CLKREG(&clk_pxa27x_stuart, "pxa2xx-uart.2", NULL), |
| 218 | INIT_CLKREG(&clk_pxa27x_i2s, "pxa2xx-i2s", NULL), |
| 219 | INIT_CLKREG(&clk_pxa27x_i2c, "pxa2xx-i2c.0", NULL), |
| 220 | INIT_CLKREG(&clk_pxa27x_usb, "pxa27x-udc", NULL), |
| 221 | INIT_CLKREG(&clk_pxa27x_mmc, "pxa2xx-mci.0", NULL), |
| 222 | INIT_CLKREG(&clk_pxa27x_stuart, "pxa2xx-ir", "UARTCLK"), |
| 223 | INIT_CLKREG(&clk_pxa27x_ficp, "pxa2xx-ir", "FICPCLK"), |
| 224 | INIT_CLKREG(&clk_pxa27x_usbhost, "pxa27x-ohci", NULL), |
| 225 | INIT_CLKREG(&clk_pxa27x_pwri2c, "pxa2xx-i2c.1", NULL), |
| 226 | INIT_CLKREG(&clk_pxa27x_keypad, "pxa27x-keypad", NULL), |
| 227 | INIT_CLKREG(&clk_pxa27x_ssp1, "pxa27x-ssp.0", NULL), |
| 228 | INIT_CLKREG(&clk_pxa27x_ssp2, "pxa27x-ssp.1", NULL), |
| 229 | INIT_CLKREG(&clk_pxa27x_ssp3, "pxa27x-ssp.2", NULL), |
| 230 | INIT_CLKREG(&clk_pxa27x_pwm0, "pxa27x-pwm.0", NULL), |
| 231 | INIT_CLKREG(&clk_pxa27x_pwm1, "pxa27x-pwm.1", NULL), |
| 232 | INIT_CLKREG(&clk_pxa27x_ac97, NULL, "AC97CLK"), |
| 233 | INIT_CLKREG(&clk_pxa27x_ac97conf, NULL, "AC97CONFCLK"), |
| 234 | INIT_CLKREG(&clk_pxa27x_msl, NULL, "MSLCLK"), |
| 235 | INIT_CLKREG(&clk_pxa27x_usim, NULL, "USIMCLK"), |
| 236 | INIT_CLKREG(&clk_pxa27x_memstk, NULL, "MSTKCLK"), |
| 237 | INIT_CLKREG(&clk_pxa27x_im, NULL, "IMCLK"), |
| 238 | INIT_CLKREG(&clk_pxa27x_memc, NULL, "MEMCLK"), |
Eric Miao | 2a125dd | 2010-11-22 22:48:49 +0800 | [diff] [blame] | 239 | INIT_CLKREG(&clk_pxa27x_mem, "pxa2xx-pcmcia", NULL), |
Haojian Zhuang | 2cab029 | 2013-04-07 16:44:33 +0800 | [diff] [blame] | 240 | INIT_CLKREG(&clk_dummy, "pxa27x-gpio", NULL), |
Andrea Adami | 495b21d | 2012-11-24 00:12:08 +0100 | [diff] [blame] | 241 | INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL), |
Russell King | a6dba20 | 2007-08-20 10:18:02 +0100 | [diff] [blame] | 242 | }; |
| 243 | |
Nicolas Pitre | a8fa3f0 | 2005-06-13 22:35:41 +0100 | [diff] [blame] | 244 | #ifdef CONFIG_PM |
| 245 | |
Eric Miao | 711be5c | 2007-07-18 11:38:45 +0100 | [diff] [blame] | 246 | #define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x |
| 247 | #define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x] |
| 248 | |
Eric Miao | 711be5c | 2007-07-18 11:38:45 +0100 | [diff] [blame] | 249 | /* |
Mike Rapoport | d082d36 | 2009-05-26 09:10:18 +0300 | [diff] [blame] | 250 | * allow platforms to override default PWRMODE setting used for PM_SUSPEND_MEM |
| 251 | */ |
| 252 | static unsigned int pwrmode = PWRMODE_SLEEP; |
| 253 | |
| 254 | int __init pxa27x_set_pwrmode(unsigned int mode) |
| 255 | { |
| 256 | switch (mode) { |
| 257 | case PWRMODE_SLEEP: |
| 258 | case PWRMODE_DEEPSLEEP: |
| 259 | pwrmode = mode; |
| 260 | return 0; |
| 261 | } |
| 262 | |
| 263 | return -EINVAL; |
| 264 | } |
| 265 | |
| 266 | /* |
Eric Miao | 711be5c | 2007-07-18 11:38:45 +0100 | [diff] [blame] | 267 | * List of global PXA peripheral registers to preserve. |
| 268 | * More ones like CP and general purpose register values are preserved |
| 269 | * with the stack pointer in sleep.S. |
| 270 | */ |
Eric Miao | 5a3d965 | 2008-09-03 18:06:34 +0800 | [diff] [blame] | 271 | enum { |
Eric Miao | 711be5c | 2007-07-18 11:38:45 +0100 | [diff] [blame] | 272 | SLEEP_SAVE_PSTR, |
Eric Miao | 711be5c | 2007-07-18 11:38:45 +0100 | [diff] [blame] | 273 | SLEEP_SAVE_MDREFR, |
Eric Miao | 5a3d965 | 2008-09-03 18:06:34 +0800 | [diff] [blame] | 274 | SLEEP_SAVE_PCFR, |
Robert Jarzmik | 649de51 | 2008-05-02 21:17:06 +0100 | [diff] [blame] | 275 | SLEEP_SAVE_COUNT |
Eric Miao | 711be5c | 2007-07-18 11:38:45 +0100 | [diff] [blame] | 276 | }; |
| 277 | |
| 278 | void pxa27x_cpu_pm_save(unsigned long *sleep_save) |
| 279 | { |
Marek Vasut | ad68bb9 | 2010-11-03 16:29:35 +0100 | [diff] [blame] | 280 | sleep_save[SLEEP_SAVE_MDREFR] = __raw_readl(MDREFR); |
Eric Miao | 5a3d965 | 2008-09-03 18:06:34 +0800 | [diff] [blame] | 281 | SAVE(PCFR); |
Eric Miao | 711be5c | 2007-07-18 11:38:45 +0100 | [diff] [blame] | 282 | |
Eric Miao | 711be5c | 2007-07-18 11:38:45 +0100 | [diff] [blame] | 283 | SAVE(PSTR); |
Eric Miao | 711be5c | 2007-07-18 11:38:45 +0100 | [diff] [blame] | 284 | } |
| 285 | |
| 286 | void pxa27x_cpu_pm_restore(unsigned long *sleep_save) |
| 287 | { |
Marek Vasut | ad68bb9 | 2010-11-03 16:29:35 +0100 | [diff] [blame] | 288 | __raw_writel(sleep_save[SLEEP_SAVE_MDREFR], MDREFR); |
Eric Miao | 5a3d965 | 2008-09-03 18:06:34 +0800 | [diff] [blame] | 289 | RESTORE(PCFR); |
Eric Miao | 711be5c | 2007-07-18 11:38:45 +0100 | [diff] [blame] | 290 | |
| 291 | PSSR = PSSR_RDH | PSSR_PH; |
| 292 | |
Eric Miao | 711be5c | 2007-07-18 11:38:45 +0100 | [diff] [blame] | 293 | RESTORE(PSTR); |
| 294 | } |
| 295 | |
| 296 | void pxa27x_cpu_pm_enter(suspend_state_t state) |
Todd Poynor | 8775420 | 2005-06-03 20:52:27 +0100 | [diff] [blame] | 297 | { |
| 298 | extern void pxa_cpu_standby(void); |
Russell King | a9503d2 | 2011-06-21 16:29:30 +0100 | [diff] [blame] | 299 | #ifndef CONFIG_IWMMXT |
| 300 | u64 acc0; |
| 301 | |
| 302 | asm volatile("mra %Q0, %R0, acc0" : "=r" (acc0)); |
| 303 | #endif |
Todd Poynor | 8775420 | 2005-06-03 20:52:27 +0100 | [diff] [blame] | 304 | |
Todd Poynor | 8775420 | 2005-06-03 20:52:27 +0100 | [diff] [blame] | 305 | /* ensure voltage-change sequencer not initiated, which hangs */ |
| 306 | PCFR &= ~PCFR_FVC; |
| 307 | |
| 308 | /* Clear edge-detect status register. */ |
| 309 | PEDR = 0xDF12FE1B; |
| 310 | |
Russell King | dc38e2a | 2008-05-08 16:50:39 +0100 | [diff] [blame] | 311 | /* Clear reset status */ |
| 312 | RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR; |
| 313 | |
Todd Poynor | 8775420 | 2005-06-03 20:52:27 +0100 | [diff] [blame] | 314 | switch (state) { |
Todd Poynor | 26705ca | 2005-07-01 11:27:05 +0100 | [diff] [blame] | 315 | case PM_SUSPEND_STANDBY: |
| 316 | pxa_cpu_standby(); |
| 317 | break; |
Todd Poynor | 8775420 | 2005-06-03 20:52:27 +0100 | [diff] [blame] | 318 | case PM_SUSPEND_MEM: |
Russell King | 2c74a0c | 2011-06-22 17:41:48 +0100 | [diff] [blame] | 319 | cpu_suspend(pwrmode, pxa27x_finish_suspend); |
Russell King | a9503d2 | 2011-06-21 16:29:30 +0100 | [diff] [blame] | 320 | #ifndef CONFIG_IWMMXT |
| 321 | asm volatile("mar acc0, %Q0, %R0" : "=r" (acc0)); |
| 322 | #endif |
Todd Poynor | 8775420 | 2005-06-03 20:52:27 +0100 | [diff] [blame] | 323 | break; |
| 324 | } |
| 325 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 326 | |
Eric Miao | 711be5c | 2007-07-18 11:38:45 +0100 | [diff] [blame] | 327 | static int pxa27x_cpu_pm_valid(suspend_state_t state) |
Russell King | 88dfe98 | 2007-05-15 11:22:48 +0100 | [diff] [blame] | 328 | { |
| 329 | return state == PM_SUSPEND_MEM || state == PM_SUSPEND_STANDBY; |
| 330 | } |
| 331 | |
Russell King | 4104980 | 2008-08-27 12:55:04 +0100 | [diff] [blame] | 332 | static int pxa27x_cpu_pm_prepare(void) |
| 333 | { |
| 334 | /* set resume return address */ |
Russell King | 4f5ad99 | 2011-02-06 17:41:26 +0000 | [diff] [blame] | 335 | PSPR = virt_to_phys(cpu_resume); |
Russell King | 4104980 | 2008-08-27 12:55:04 +0100 | [diff] [blame] | 336 | return 0; |
| 337 | } |
| 338 | |
| 339 | static void pxa27x_cpu_pm_finish(void) |
| 340 | { |
| 341 | /* ensure not to come back here if it wasn't intended */ |
| 342 | PSPR = 0; |
| 343 | } |
| 344 | |
Eric Miao | 711be5c | 2007-07-18 11:38:45 +0100 | [diff] [blame] | 345 | static struct pxa_cpu_pm_fns pxa27x_cpu_pm_fns = { |
Robert Jarzmik | 649de51 | 2008-05-02 21:17:06 +0100 | [diff] [blame] | 346 | .save_count = SLEEP_SAVE_COUNT, |
Eric Miao | 711be5c | 2007-07-18 11:38:45 +0100 | [diff] [blame] | 347 | .save = pxa27x_cpu_pm_save, |
| 348 | .restore = pxa27x_cpu_pm_restore, |
| 349 | .valid = pxa27x_cpu_pm_valid, |
| 350 | .enter = pxa27x_cpu_pm_enter, |
Russell King | 4104980 | 2008-08-27 12:55:04 +0100 | [diff] [blame] | 351 | .prepare = pxa27x_cpu_pm_prepare, |
| 352 | .finish = pxa27x_cpu_pm_finish, |
Russell King | e176bb0 | 2007-05-15 11:16:10 +0100 | [diff] [blame] | 353 | }; |
Eric Miao | 711be5c | 2007-07-18 11:38:45 +0100 | [diff] [blame] | 354 | |
| 355 | static void __init pxa27x_init_pm(void) |
| 356 | { |
| 357 | pxa_cpu_pm_fns = &pxa27x_cpu_pm_fns; |
| 358 | } |
eric miao | f79299c | 2008-01-02 08:24:49 +0800 | [diff] [blame] | 359 | #else |
| 360 | static inline void pxa27x_init_pm(void) {} |
Nicolas Pitre | a8fa3f0 | 2005-06-13 22:35:41 +0100 | [diff] [blame] | 361 | #endif |
| 362 | |
eric miao | c95530c | 2007-08-29 10:22:17 +0100 | [diff] [blame] | 363 | /* PXA27x: Various gpios can issue wakeup events. This logic only |
| 364 | * handles the simple cases, not the WEMUX2 and WEMUX3 options |
| 365 | */ |
Lennert Buytenhek | a3f4c92 | 2010-11-29 11:18:26 +0100 | [diff] [blame] | 366 | static int pxa27x_set_wake(struct irq_data *d, unsigned int on) |
eric miao | c95530c | 2007-08-29 10:22:17 +0100 | [diff] [blame] | 367 | { |
Haojian Zhuang | 4929f5a | 2011-10-10 16:03:51 +0800 | [diff] [blame] | 368 | int gpio = pxa_irq_to_gpio(d->irq); |
eric miao | c95530c | 2007-08-29 10:22:17 +0100 | [diff] [blame] | 369 | uint32_t mask; |
| 370 | |
eric miao | c0a596d | 2008-03-11 09:46:28 +0800 | [diff] [blame] | 371 | if (gpio >= 0 && gpio < 128) |
| 372 | return gpio_set_wake(gpio, on); |
eric miao | c95530c | 2007-08-29 10:22:17 +0100 | [diff] [blame] | 373 | |
Lennert Buytenhek | a3f4c92 | 2010-11-29 11:18:26 +0100 | [diff] [blame] | 374 | if (d->irq == IRQ_KEYPAD) |
eric miao | c0a596d | 2008-03-11 09:46:28 +0800 | [diff] [blame] | 375 | return keypad_set_wake(on); |
eric miao | c95530c | 2007-08-29 10:22:17 +0100 | [diff] [blame] | 376 | |
Lennert Buytenhek | a3f4c92 | 2010-11-29 11:18:26 +0100 | [diff] [blame] | 377 | switch (d->irq) { |
eric miao | c95530c | 2007-08-29 10:22:17 +0100 | [diff] [blame] | 378 | case IRQ_RTCAlrm: |
| 379 | mask = PWER_RTC; |
| 380 | break; |
| 381 | case IRQ_USB: |
| 382 | mask = 1u << 26; |
| 383 | break; |
| 384 | default: |
| 385 | return -EINVAL; |
| 386 | } |
| 387 | |
eric miao | c95530c | 2007-08-29 10:22:17 +0100 | [diff] [blame] | 388 | if (on) |
| 389 | PWER |= mask; |
| 390 | else |
| 391 | PWER &=~mask; |
| 392 | |
| 393 | return 0; |
| 394 | } |
| 395 | |
| 396 | void __init pxa27x_init_irq(void) |
| 397 | { |
eric miao | b9e25ac | 2008-03-04 14:19:58 +0800 | [diff] [blame] | 398 | pxa_init_irq(34, pxa27x_set_wake); |
eric miao | c95530c | 2007-08-29 10:22:17 +0100 | [diff] [blame] | 399 | } |
| 400 | |
Marek Vasut | 851982c | 2010-10-11 02:20:19 +0200 | [diff] [blame] | 401 | static struct map_desc pxa27x_io_desc[] __initdata = { |
| 402 | { /* Mem Ctl */ |
Arnd Bergmann | 97b09da | 2011-10-01 22:03:45 +0200 | [diff] [blame] | 403 | .virtual = (unsigned long)SMEMC_VIRT, |
Marek Vasut | ad68bb9 | 2010-11-03 16:29:35 +0100 | [diff] [blame] | 404 | .pfn = __phys_to_pfn(PXA2XX_SMEMC_BASE), |
Marek Vasut | 851982c | 2010-10-11 02:20:19 +0200 | [diff] [blame] | 405 | .length = 0x00200000, |
| 406 | .type = MT_DEVICE |
| 407 | }, { /* IMem ctl */ |
| 408 | .virtual = 0xfe000000, |
| 409 | .pfn = __phys_to_pfn(0x58000000), |
| 410 | .length = 0x00100000, |
| 411 | .type = MT_DEVICE |
| 412 | }, |
| 413 | }; |
| 414 | |
| 415 | void __init pxa27x_map_io(void) |
| 416 | { |
| 417 | pxa_map_io(); |
| 418 | iotable_init(ARRAY_AND_SIZE(pxa27x_io_desc)); |
| 419 | pxa27x_get_clk_frequency_khz(1); |
| 420 | } |
| 421 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 422 | /* |
| 423 | * device registration specific to PXA27x. |
| 424 | */ |
Mike Rapoport | 9ba63c4 | 2008-08-17 06:23:05 +0100 | [diff] [blame] | 425 | void __init pxa27x_set_i2c_power_info(struct i2c_pxa_platform_data *info) |
Mike Rapoport | b7a3670 | 2008-01-27 18:14:50 +0100 | [diff] [blame] | 426 | { |
Philipp Zabel | bc3a595 | 2008-06-02 18:49:27 +0100 | [diff] [blame] | 427 | local_irq_disable(); |
| 428 | PCFR |= PCFR_PI2CEN; |
| 429 | local_irq_enable(); |
Eric Miao | 1475822 | 2008-11-28 15:24:12 +0800 | [diff] [blame] | 430 | pxa_register_device(&pxa27x_device_i2c_power, info); |
Mike Rapoport | b7a3670 | 2008-01-27 18:14:50 +0100 | [diff] [blame] | 431 | } |
| 432 | |
Robert Jarzmik | b95ace5 | 2012-04-22 13:37:24 +0200 | [diff] [blame] | 433 | static struct pxa_gpio_platform_data pxa27x_gpio_info __initdata = { |
Haojian Zhuang | b8f649f | 2013-04-09 18:12:04 +0800 | [diff] [blame] | 434 | .irq_base = PXA_GPIO_TO_IRQ(0), |
| 435 | .gpio_set_wake = gpio_set_wake, |
Robert Jarzmik | b95ace5 | 2012-04-22 13:37:24 +0200 | [diff] [blame] | 436 | }; |
| 437 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 438 | static struct platform_device *devices[] __initdata = { |
Philipp Zabel | 7a85762 | 2008-06-22 23:36:39 +0100 | [diff] [blame] | 439 | &pxa27x_device_udc, |
Eric Miao | 09a5358 | 2010-06-14 00:43:00 +0800 | [diff] [blame] | 440 | &pxa_device_pmu, |
Eric Miao | e09d02e | 2007-07-17 10:45:58 +0100 | [diff] [blame] | 441 | &pxa_device_i2s, |
Liam Girdwood | f0fba2a | 2010-03-17 20:15:21 +0000 | [diff] [blame] | 442 | &pxa_device_asoc_ssp1, |
| 443 | &pxa_device_asoc_ssp2, |
| 444 | &pxa_device_asoc_ssp3, |
| 445 | &pxa_device_asoc_platform, |
Robert Jarzmik | 7249314 | 2008-11-13 23:50:56 +0100 | [diff] [blame] | 446 | &sa1100_device_rtc, |
Eric Miao | e09d02e | 2007-07-17 10:45:58 +0100 | [diff] [blame] | 447 | &pxa_device_rtc, |
eric miao | d8e0db1 | 2007-12-10 17:54:36 +0800 | [diff] [blame] | 448 | &pxa27x_device_ssp1, |
| 449 | &pxa27x_device_ssp2, |
| 450 | &pxa27x_device_ssp3, |
eric miao | 75540c1 | 2008-04-13 21:44:04 +0100 | [diff] [blame] | 451 | &pxa27x_device_pwm0, |
| 452 | &pxa27x_device_pwm1, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 453 | }; |
| 454 | |
| 455 | static int __init pxa27x_init(void) |
| 456 | { |
Rafael J. Wysocki | 2eaa03b | 2011-04-22 22:03:11 +0200 | [diff] [blame] | 457 | int ret = 0; |
eric miao | c0165504 | 2008-01-28 23:00:02 +0000 | [diff] [blame] | 458 | |
Russell King | e176bb0 | 2007-05-15 11:16:10 +0100 | [diff] [blame] | 459 | if (cpu_is_pxa27x()) { |
Eric Miao | 04fef22 | 2008-07-29 14:26:00 +0800 | [diff] [blame] | 460 | |
| 461 | reset_status = RCSR; |
| 462 | |
Russell King | 0a0300d | 2010-01-12 12:28:00 +0000 | [diff] [blame] | 463 | clkdev_add_table(pxa27x_clkregs, ARRAY_SIZE(pxa27x_clkregs)); |
Russell King | a6dba20 | 2007-08-20 10:18:02 +0100 | [diff] [blame] | 464 | |
Eric Miao | fef1f99 | 2009-01-02 16:26:33 +0800 | [diff] [blame] | 465 | if ((ret = pxa_init_dma(IRQ_DMA, 32))) |
Eric Miao | f53f066 | 2007-06-22 05:40:17 +0100 | [diff] [blame] | 466 | return ret; |
eric miao | f79299c | 2008-01-02 08:24:49 +0800 | [diff] [blame] | 467 | |
Eric Miao | 711be5c | 2007-07-18 11:38:45 +0100 | [diff] [blame] | 468 | pxa27x_init_pm(); |
eric miao | f79299c | 2008-01-02 08:24:49 +0800 | [diff] [blame] | 469 | |
Rafael J. Wysocki | 2eaa03b | 2011-04-22 22:03:11 +0200 | [diff] [blame] | 470 | register_syscore_ops(&pxa_irq_syscore_ops); |
| 471 | register_syscore_ops(&pxa2xx_mfp_syscore_ops); |
Rafael J. Wysocki | 2eaa03b | 2011-04-22 22:03:11 +0200 | [diff] [blame] | 472 | register_syscore_ops(&pxa2xx_clock_syscore_ops); |
eric miao | c0165504 | 2008-01-28 23:00:02 +0000 | [diff] [blame] | 473 | |
Haojian Zhuang | 2cab029 | 2013-04-07 16:44:33 +0800 | [diff] [blame] | 474 | pxa_register_device(&pxa27x_device_gpio, &pxa27x_gpio_info); |
Russell King | e176bb0 | 2007-05-15 11:16:10 +0100 | [diff] [blame] | 475 | ret = platform_add_devices(devices, ARRAY_SIZE(devices)); |
| 476 | } |
eric miao | c0165504 | 2008-01-28 23:00:02 +0000 | [diff] [blame] | 477 | |
Russell King | e176bb0 | 2007-05-15 11:16:10 +0100 | [diff] [blame] | 478 | return ret; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 479 | } |
| 480 | |
Russell King | 1c104e0 | 2008-04-19 10:59:24 +0100 | [diff] [blame] | 481 | postcore_initcall(pxa27x_init); |