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Greg Kroah-Hartmanb2441312017-11-01 15:07:57 +01001# SPDX-License-Identifier: GPL-2.0
Jonas Bonnf8c4a272011-06-04 21:52:05 +03002#
3# For a description of the syntax of this configuration file,
Paul Bolle395cf962011-08-15 02:02:26 +02004# see Documentation/kbuild/kconfig-language.txt.
Jonas Bonnf8c4a272011-06-04 21:52:05 +03005#
6
7config OPENRISC
8 def_bool y
9 select OF
10 select OF_EARLY_FLATTREE
Jonas Bonnb4c4c6e2012-04-06 12:52:54 +020011 select IRQ_DOMAIN
Marc Zyngierd1f6f282014-08-26 11:03:19 +010012 select HANDLE_DOMAIN_IRQ
Jonas Bonnf8c4a272011-06-04 21:52:05 +030013 select HAVE_MEMBLOCK
Linus Walleij8636f342016-04-19 13:15:43 +020014 select GPIOLIB
Jonas Bonnf8c4a272011-06-04 21:52:05 +030015 select HAVE_ARCH_TRACEHOOK
Jonas Bonnc0fcaf52012-05-09 23:19:44 +020016 select SPARSE_IRQ
Jonas Bonnf8c4a272011-06-04 21:52:05 +030017 select GENERIC_IRQ_CHIP
18 select GENERIC_IRQ_PROBE
19 select GENERIC_IRQ_SHOW
20 select GENERIC_IOMAP
Ben Hutchings9f13a1f2012-01-10 03:04:32 +000021 select GENERIC_CPU_DEVICES
Andrew Morton04ea1e92015-07-17 16:23:28 -070022 select HAVE_UID16
Richard Weinberger0662d332012-03-02 01:55:11 +010023 select GENERIC_ATOMIC64
Anna-Maria Gleixner5bf8f6b2012-05-18 16:45:51 +000024 select GENERIC_CLOCKEVENTS
Jonas Bonn603d6632012-05-25 08:24:49 +020025 select GENERIC_STRNCPY_FROM_USER
Jonas Bonnb48b2c32012-05-27 10:25:47 +020026 select GENERIC_STRNLEN_USER
David Howells786d35d2012-09-28 14:31:03 +093027 select MODULES_USE_ELF_RELA
Dave Hansend1a1dc02013-07-01 13:04:42 -070028 select HAVE_DEBUG_STACKOVERFLOW
Stefan Kristiansson4db8e6d2014-05-26 23:31:42 +030029 select OR1K_PIC
Zhaoxiu Zengfff7fb02016-05-20 17:03:57 -070030 select CPU_NO_EFFICIENT_FFS if !OPENRISC_HAVE_INST_FF1
Stafford Horne266c7fa2016-04-03 19:14:49 +090031 select NO_BOOTMEM
Jonas Bonnf8c4a272011-06-04 21:52:05 +030032
Babu Moger4c97a0c2017-09-08 16:14:22 -070033config CPU_BIG_ENDIAN
34 def_bool y
35
Jonas Bonnf8c4a272011-06-04 21:52:05 +030036config MMU
37 def_bool y
38
Jonas Bonnf8c4a272011-06-04 21:52:05 +030039config RWSEM_GENERIC_SPINLOCK
40 def_bool y
41
42config RWSEM_XCHGADD_ALGORITHM
43 def_bool n
44
45config GENERIC_HWEIGHT
46 def_bool y
47
Uwe Kleine-Königce816fa2014-04-07 15:39:19 -070048config NO_IOPORT_MAP
Jonas Bonnf8c4a272011-06-04 21:52:05 +030049 def_bool y
50
Jonas Bonnf8c4a272011-06-04 21:52:05 +030051config TRACE_IRQFLAGS_SUPPORT
52 def_bool y
53
54# For now, use generic checksum functions
55#These can be reimplemented in assembly later if so inclined
56config GENERIC_CSUM
57 def_bool y
58
Jonas Bonnf8c4a272011-06-04 21:52:05 +030059source "init/Kconfig"
60
Chen Gang57a1a192013-08-13 16:01:02 -070061source "kernel/Kconfig.freezer"
Jonas Bonnf8c4a272011-06-04 21:52:05 +030062
63menu "Processor type and features"
64
65choice
66 prompt "Subarchitecture"
67 default OR1K_1200
68
69config OR1K_1200
70 bool "OR1200"
71 help
72 Generic OpenRISC 1200 architecture
73
74endchoice
75
76config OPENRISC_BUILTIN_DTB
77 string "Builtin DTB"
78 default ""
79
80menu "Class II Instructions"
81
82config OPENRISC_HAVE_INST_FF1
83 bool "Have instruction l.ff1"
84 default y
85 help
86 Select this if your implementation has the Class II instruction l.ff1
87
88config OPENRISC_HAVE_INST_FL1
89 bool "Have instruction l.fl1"
90 default y
91 help
92 Select this if your implementation has the Class II instruction l.fl1
93
94config OPENRISC_HAVE_INST_MUL
95 bool "Have instruction l.mul for hardware multiply"
96 default y
97 help
98 Select this if your implementation has a hardware multiply instruction
99
100config OPENRISC_HAVE_INST_DIV
101 bool "Have instruction l.div for hardware divide"
102 default y
103 help
104 Select this if your implementation has a hardware divide instruction
105endmenu
106
Stafford Horne34bbdcd2016-09-24 22:20:42 +0900107config NR_CPUS
108 int
109 default "1"
Jonas Bonnf8c4a272011-06-04 21:52:05 +0300110
Jonas Bonnf8c4a272011-06-04 21:52:05 +0300111source kernel/Kconfig.hz
112source kernel/Kconfig.preempt
113source "mm/Kconfig"
114
115config OPENRISC_NO_SPR_SR_DSX
116 bool "use SPR_SR_DSX software emulation" if OR1K_1200
117 default y
118 help
119 SPR_SR_DSX bit is status register bit indicating whether
120 the last exception has happened in delay slot.
121
122 OpenRISC architecture makes it optional to have it implemented
123 in hardware and the OR1200 does not have it.
124
125 Say N here if you know that your OpenRISC processor has
126 SPR_SR_DSX bit implemented. Say Y if you are unsure.
127
128config CMDLINE
129 string "Default kernel command string"
130 default ""
131 help
132 On some architectures there is currently no way for the boot loader
133 to pass arguments to the kernel. For these architectures, you should
134 supply some command-line options at build time by entering them
135 here.
136
137menu "Debugging options"
138
Jonas Bonnf8c4a272011-06-04 21:52:05 +0300139config JUMP_UPON_UNHANDLED_EXCEPTION
140 bool "Try to die gracefully"
141 default y
142 help
143 Now this puts kernel into infinite loop after first oops. Till
144 your kernel crashes this doesn't have any influence.
145
146 Say Y if you are unsure.
147
Jonas Bonnf8c4a272011-06-04 21:52:05 +0300148config OPENRISC_ESR_EXCEPTION_BUG_CHECK
149 bool "Check for possible ESR exception bug"
150 default n
151 help
152 This option enables some checks that might expose some problems
153 in kernel.
154
155 Say N if you are unsure.
156
157endmenu
158
159endmenu
160
161menu "Executable file formats"
162
163source "fs/Kconfig.binfmt"
164
165endmenu
166
167source "net/Kconfig"
168
169source "drivers/Kconfig"
170
171source "fs/Kconfig"
172
173source "security/Kconfig"
174
175source "crypto/Kconfig"
176
177source "lib/Kconfig"
178
179menu "Kernel hacking"
180
181source "lib/Kconfig.debug"
182
183endmenu