arch/arm/boot/dts/sh73a0.dtsi

/*
 * Device Tree Source for the SH73A0 SoC
 *
 * Copyright (C) 2012 Renesas Solutions Corp.
 *
 * This file is licensed under the terms of the GNU General Public License
 * version 2.  This program is licensed "as is" without any warranty of any
 * kind, whether express or implied.
 */

/include/ "skeleton.dtsi"

#include <dt-bindings/interrupt-controller/irq.h>

/ {
	compatible = "renesas,sh73a0";

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a9";
			reg = <0>;
		};
		cpu@1 {
			device_type = "cpu";
			compatible = "arm,cortex-a9";
			reg = <1>;
		};
	};

	gic: interrupt-controller@f0001000 {
		compatible = "arm,cortex-a9-gic";
		#interrupt-cells = <3>;
		#address-cells = <1>;
		interrupt-controller;
		reg = <0xf0001000 0x1000>,
		      <0xf0000100 0x100>;
	};

	pmu {
		compatible = "arm,cortex-a9-pmu";
		interrupts = <0 55 IRQ_TYPE_LEVEL_HIGH>,
			     <0 56 IRQ_TYPE_LEVEL_HIGH>;
	};

	irqpin0: irqpin@e6900000 {
		compatible = "renesas,intc-irqpin";
		#interrupt-cells = <2>;
		interrupt-controller;
		reg = <0xe6900000 4>,
			<0xe6900010 4>,
			<0xe6900020 1>,
			<0xe6900040 1>,
			<0xe6900060 1>;
		interrupt-parent = <&gic>;
		interrupts = <0 1 IRQ_TYPE_LEVEL_HIGH
			      0 2 IRQ_TYPE_LEVEL_HIGH
			      0 3 IRQ_TYPE_LEVEL_HIGH
			      0 4 IRQ_TYPE_LEVEL_HIGH
			      0 5 IRQ_TYPE_LEVEL_HIGH
			      0 6 IRQ_TYPE_LEVEL_HIGH
			      0 7 IRQ_TYPE_LEVEL_HIGH
			      0 8 IRQ_TYPE_LEVEL_HIGH>;
	};

	irqpin1: irqpin@e6900004 {
		compatible = "renesas,intc-irqpin";
		#interrupt-cells = <2>;
		interrupt-controller;
		reg = <0xe6900004 4>,
			<0xe6900014 4>,
			<0xe6900024 1>,
			<0xe6900044 1>,
			<0xe6900064 1>;
		interrupt-parent = <&gic>;
		interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH
			      0 10 IRQ_TYPE_LEVEL_HIGH
			      0 11 IRQ_TYPE_LEVEL_HIGH
			      0 12 IRQ_TYPE_LEVEL_HIGH
			      0 13 IRQ_TYPE_LEVEL_HIGH
			      0 14 IRQ_TYPE_LEVEL_HIGH
			      0 15 IRQ_TYPE_LEVEL_HIGH
			      0 16 IRQ_TYPE_LEVEL_HIGH>;
		control-parent;
	};

	irqpin2: irqpin@e6900008 {
		compatible = "renesas,intc-irqpin";
		#interrupt-cells = <2>;
		interrupt-controller;
		reg = <0xe6900008 4>,
			<0xe6900018 4>,
			<0xe6900028 1>,
			<0xe6900048 1>,
			<0xe6900068 1>;
		interrupt-parent = <&gic>;
		interrupts = <0 17 IRQ_TYPE_LEVEL_HIGH
			      0 18 IRQ_TYPE_LEVEL_HIGH
			      0 19 IRQ_TYPE_LEVEL_HIGH
			      0 20 IRQ_TYPE_LEVEL_HIGH
			      0 21 IRQ_TYPE_LEVEL_HIGH
			      0 22 IRQ_TYPE_LEVEL_HIGH
			      0 23 IRQ_TYPE_LEVEL_HIGH
			      0 24 IRQ_TYPE_LEVEL_HIGH>;
	};

	irqpin3: irqpin@e690000c {
		compatible = "renesas,intc-irqpin";
		#interrupt-cells = <2>;
		interrupt-controller;
		reg = <0xe690000c 4>,
			<0xe690001c 4>,
			<0xe690002c 1>,
			<0xe690004c 1>,
			<0xe690006c 1>;
		interrupt-parent = <&gic>;
		interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH
			      0 26 IRQ_TYPE_LEVEL_HIGH
			      0 27 IRQ_TYPE_LEVEL_HIGH
			      0 28 IRQ_TYPE_LEVEL_HIGH
			      0 29 IRQ_TYPE_LEVEL_HIGH
			      0 30 IRQ_TYPE_LEVEL_HIGH
			      0 31 IRQ_TYPE_LEVEL_HIGH
			      0 32 IRQ_TYPE_LEVEL_HIGH>;
	};

	i2c0: i2c@e6820000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "renesas,rmobile-iic";
		reg = <0xe6820000 0x425>;
		interrupt-parent = <&gic>;
		interrupts = <0 167 IRQ_TYPE_LEVEL_HIGH
			      0 168 IRQ_TYPE_LEVEL_HIGH
			      0 169 IRQ_TYPE_LEVEL_HIGH
			      0 170 IRQ_TYPE_LEVEL_HIGH>;
		status = "disabled";
	};

	i2c1: i2c@e6822000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "renesas,rmobile-iic";
		reg = <0xe6822000 0x425>;
		interrupt-parent = <&gic>;
		interrupts = <0 51 IRQ_TYPE_LEVEL_HIGH
			      0 52 IRQ_TYPE_LEVEL_HIGH
			      0 53 IRQ_TYPE_LEVEL_HIGH
			      0 54 IRQ_TYPE_LEVEL_HIGH>;
		status = "disabled";
	};

	i2c2: i2c@e6824000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "renesas,rmobile-iic";
		reg = <0xe6824000 0x425>;
		interrupt-parent = <&gic>;
		interrupts = <0 171 IRQ_TYPE_LEVEL_HIGH
			      0 172 IRQ_TYPE_LEVEL_HIGH
			      0 173 IRQ_TYPE_LEVEL_HIGH
			      0 174 IRQ_TYPE_LEVEL_HIGH>;
		status = "disabled";
	};

	i2c3: i2c@e6826000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "renesas,rmobile-iic";
		reg = <0xe6826000 0x425>;
		interrupt-parent = <&gic>;
		interrupts = <0 183 IRQ_TYPE_LEVEL_HIGH
			      0 184 IRQ_TYPE_LEVEL_HIGH
			      0 185 IRQ_TYPE_LEVEL_HIGH
			      0 186 IRQ_TYPE_LEVEL_HIGH>;
		status = "disabled";
	};

	i2c4: i2c@e6828000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "renesas,rmobile-iic";
		reg = <0xe6828000 0x425>;
		interrupt-parent = <&gic>;
		interrupts = <0 187 IRQ_TYPE_LEVEL_HIGH
			      0 188 IRQ_TYPE_LEVEL_HIGH
			      0 189 IRQ_TYPE_LEVEL_HIGH
			      0 190 IRQ_TYPE_LEVEL_HIGH>;
		status = "disabled";
	};

	mmcif: mmc@e6bd0000 {
		compatible = "renesas,sh-mmcif";
		reg = <0xe6bd0000 0x100>;
		interrupt-parent = <&gic>;
		interrupts = <0 140 IRQ_TYPE_LEVEL_HIGH
			      0 141 IRQ_TYPE_LEVEL_HIGH>;
		reg-io-width = <4>;
		status = "disabled";
	};

	sdhi0: sd@ee100000 {
		compatible = "renesas,sdhi-sh73a0";
		reg = <0xee100000 0x100>;
		interrupt-parent = <&gic>;
		interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH
			      0 84 IRQ_TYPE_LEVEL_HIGH
			      0 85 IRQ_TYPE_LEVEL_HIGH>;
		cap-sd-highspeed;
		status = "disabled";
	};

	/* SDHI1 and SDHI2 have no CD pins, no need for CD IRQ */
	sdhi1: sd@ee120000 {
		compatible = "renesas,sdhi-sh73a0";
		reg = <0xee120000 0x100>;
		interrupt-parent = <&gic>;
		interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH
			      0 89 IRQ_TYPE_LEVEL_HIGH>;
		toshiba,mmc-wrprotect-disable;
		cap-sd-highspeed;
		status = "disabled";
	};

	sdhi2: sd@ee140000 {
		compatible = "renesas,sdhi-sh73a0";
		reg = <0xee140000 0x100>;
		interrupt-parent = <&gic>;
		interrupts = <0 104 IRQ_TYPE_LEVEL_HIGH
			      0 105 IRQ_TYPE_LEVEL_HIGH>;
		toshiba,mmc-wrprotect-disable;
		cap-sd-highspeed;
		status = "disabled";
	};

	pfc: pfc@e6050000 {
		compatible = "renesas,pfc-sh73a0";
		reg = <0xe6050000 0x8000>,
		      <0xe605801c 0x1c>;
		gpio-controller;
		#gpio-cells = <2>;
	};
};