blob: 0e7ac2b49990f1f108277fdfff9b2591aa7a0186 [file] [log] [blame]
Thomas Gleixnerc942fdd2019-05-27 08:55:06 +02001// SPDX-License-Identifier: GPL-2.0-or-later
Patrick Boettcher4de27302006-04-17 13:22:15 -03002/*
3 * Driver for Microtune MT2060 "Single chip dual conversion broadband tuner"
4 *
5 * Copyright (c) 2006 Olivier DANET <odanet@caramail.com>
Patrick Boettcher4de27302006-04-17 13:22:15 -03006 */
7
Patrick Boettcher4de27302006-04-17 13:22:15 -03008/* In that file, frequencies are expressed in kiloHertz to avoid 32 bits overflows */
9
10#include <linux/module.h>
Patrick Boettcher4de27302006-04-17 13:22:15 -030011#include <linux/delay.h>
12#include <linux/dvb/frontend.h>
Olivier DANET46f73f92006-08-08 15:48:10 -030013#include <linux/i2c.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090014#include <linux/slab.h>
Olivier DANET46f73f92006-08-08 15:48:10 -030015
Mauro Carvalho Chehabfada1932017-12-28 13:03:51 -050016#include <media/dvb_frontend.h>
Olivier DANET46f73f92006-08-08 15:48:10 -030017
Patrick Boettcher4de27302006-04-17 13:22:15 -030018#include "mt2060.h"
19#include "mt2060_priv.h"
20
Patrick Boettcherb7571f82006-08-08 15:48:10 -030021static int debug;
Patrick Boettcher4de27302006-04-17 13:22:15 -030022module_param(debug, int, 0644);
23MODULE_PARM_DESC(debug, "Turn on/off debugging (default:off).");
24
Olivier DANET46f73f92006-08-08 15:48:10 -030025#define dprintk(args...) do { if (debug) {printk(KERN_DEBUG "MT2060: " args); printk("\n"); }} while (0)
Patrick Boettcher4de27302006-04-17 13:22:15 -030026
27// Reads a single register
Olivier DANET46f73f92006-08-08 15:48:10 -030028static int mt2060_readreg(struct mt2060_priv *priv, u8 reg, u8 *val)
Patrick Boettcher4de27302006-04-17 13:22:15 -030029{
30 struct i2c_msg msg[2] = {
Sean Youngb4756702017-09-02 07:42:42 -040031 { .addr = priv->cfg->i2c_address, .flags = 0, .len = 1 },
32 { .addr = priv->cfg->i2c_address, .flags = I2C_M_RD, .len = 1 },
Patrick Boettcher4de27302006-04-17 13:22:15 -030033 };
Sean Youngb4756702017-09-02 07:42:42 -040034 int rc = 0;
35 u8 *b;
36
37 b = kmalloc(2, GFP_KERNEL);
38 if (!b)
39 return -ENOMEM;
40
41 b[0] = reg;
42 b[1] = 0;
43
44 msg[0].buf = b;
45 msg[1].buf = b + 1;
Patrick Boettcher4de27302006-04-17 13:22:15 -030046
Olivier DANET46f73f92006-08-08 15:48:10 -030047 if (i2c_transfer(priv->i2c, msg, 2) != 2) {
Patrick Boettcher4de27302006-04-17 13:22:15 -030048 printk(KERN_WARNING "mt2060 I2C read failed\n");
Sean Youngb4756702017-09-02 07:42:42 -040049 rc = -EREMOTEIO;
Patrick Boettcher4de27302006-04-17 13:22:15 -030050 }
Sean Youngb4756702017-09-02 07:42:42 -040051 *val = b[1];
52 kfree(b);
53
54 return rc;
Patrick Boettcher4de27302006-04-17 13:22:15 -030055}
56
57// Writes a single register
Olivier DANET46f73f92006-08-08 15:48:10 -030058static int mt2060_writereg(struct mt2060_priv *priv, u8 reg, u8 val)
Patrick Boettcher4de27302006-04-17 13:22:15 -030059{
Patrick Boettcher4de27302006-04-17 13:22:15 -030060 struct i2c_msg msg = {
Sean Youngb4756702017-09-02 07:42:42 -040061 .addr = priv->cfg->i2c_address, .flags = 0, .len = 2
Patrick Boettcher4de27302006-04-17 13:22:15 -030062 };
Sean Youngb4756702017-09-02 07:42:42 -040063 u8 *buf;
64 int rc = 0;
65
66 buf = kmalloc(2, GFP_KERNEL);
67 if (!buf)
68 return -ENOMEM;
69
70 buf[0] = reg;
71 buf[1] = val;
72
73 msg.buf = buf;
Patrick Boettcher4de27302006-04-17 13:22:15 -030074
Olivier DANET46f73f92006-08-08 15:48:10 -030075 if (i2c_transfer(priv->i2c, &msg, 1) != 1) {
Patrick Boettcher4de27302006-04-17 13:22:15 -030076 printk(KERN_WARNING "mt2060 I2C write failed\n");
Sean Youngb4756702017-09-02 07:42:42 -040077 rc = -EREMOTEIO;
Patrick Boettcher4de27302006-04-17 13:22:15 -030078 }
Sean Youngb4756702017-09-02 07:42:42 -040079 kfree(buf);
80 return rc;
Patrick Boettcher4de27302006-04-17 13:22:15 -030081}
82
83// Writes a set of consecutive registers
Olivier DANET46f73f92006-08-08 15:48:10 -030084static int mt2060_writeregs(struct mt2060_priv *priv,u8 *buf, u8 len)
Patrick Boettcher4de27302006-04-17 13:22:15 -030085{
Antti Palosaari433c4862015-07-26 17:30:07 -030086 int rem, val_len;
Sean Youngb4756702017-09-02 07:42:42 -040087 u8 *xfer_buf;
88 int rc = 0;
Patrick Boettcher4de27302006-04-17 13:22:15 -030089 struct i2c_msg msg = {
Sean Youngb4756702017-09-02 07:42:42 -040090 .addr = priv->cfg->i2c_address, .flags = 0
Patrick Boettcher4de27302006-04-17 13:22:15 -030091 };
Antti Palosaari433c4862015-07-26 17:30:07 -030092
Sean Youngb4756702017-09-02 07:42:42 -040093 xfer_buf = kmalloc(16, GFP_KERNEL);
94 if (!xfer_buf)
95 return -ENOMEM;
96
97 msg.buf = xfer_buf;
98
Antti Palosaari433c4862015-07-26 17:30:07 -030099 for (rem = len - 1; rem > 0; rem -= priv->i2c_max_regs) {
100 val_len = min_t(int, rem, priv->i2c_max_regs);
101 msg.len = 1 + val_len;
102 xfer_buf[0] = buf[0] + len - 1 - rem;
103 memcpy(&xfer_buf[1], &buf[1 + len - 1 - rem], val_len);
104
105 if (i2c_transfer(priv->i2c, &msg, 1) != 1) {
106 printk(KERN_WARNING "mt2060 I2C write failed (len=%i)\n", val_len);
Sean Youngb4756702017-09-02 07:42:42 -0400107 rc = -EREMOTEIO;
108 break;
Antti Palosaari433c4862015-07-26 17:30:07 -0300109 }
Patrick Boettcher4de27302006-04-17 13:22:15 -0300110 }
Antti Palosaari433c4862015-07-26 17:30:07 -0300111
Sean Youngb4756702017-09-02 07:42:42 -0400112 kfree(xfer_buf);
113 return rc;
Patrick Boettcher4de27302006-04-17 13:22:15 -0300114}
115
116// Initialisation sequences
117// LNABAND=3, NUM1=0x3C, DIV1=0x74, NUM2=0x1080, DIV2=0x49
118static u8 mt2060_config1[] = {
119 REG_LO1C1,
120 0x3F, 0x74, 0x00, 0x08, 0x93
121};
122
123// FMCG=2, GP2=0, GP1=0
124static u8 mt2060_config2[] = {
125 REG_MISC_CTRL,
126 0x20, 0x1E, 0x30, 0xff, 0x80, 0xff, 0x00, 0x2c, 0x42
127};
128
129// VGAG=3, V1CSE=1
Patrick Boettcher4de27302006-04-17 13:22:15 -0300130
131#ifdef MT2060_SPURCHECK
132/* The function below calculates the frequency offset between the output frequency if2
133 and the closer cross modulation subcarrier between lo1 and lo2 up to the tenth harmonic */
134static int mt2060_spurcalc(u32 lo1,u32 lo2,u32 if2)
135{
136 int I,J;
137 int dia,diamin,diff;
138 diamin=1000000;
139 for (I = 1; I < 10; I++) {
140 J = ((2*I*lo1)/lo2+1)/2;
141 diff = I*(int)lo1-J*(int)lo2;
142 if (diff < 0) diff=-diff;
143 dia = (diff-(int)if2);
144 if (dia < 0) dia=-dia;
145 if (diamin > dia) diamin=dia;
146 }
147 return diamin;
148}
149
150#define BANDWIDTH 4000 // kHz
151
152/* Calculates the frequency offset to add to avoid spurs. Returns 0 if no offset is needed */
153static int mt2060_spurcheck(u32 lo1,u32 lo2,u32 if2)
154{
155 u32 Spur,Sp1,Sp2;
156 int I,J;
157 I=0;
158 J=1000;
159
160 Spur=mt2060_spurcalc(lo1,lo2,if2);
161 if (Spur < BANDWIDTH) {
162 /* Potential spurs detected */
163 dprintk("Spurs before : f_lo1: %d f_lo2: %d (kHz)",
164 (int)lo1,(int)lo2);
165 I=1000;
166 Sp1 = mt2060_spurcalc(lo1+I,lo2+I,if2);
167 Sp2 = mt2060_spurcalc(lo1-I,lo2-I,if2);
168
169 if (Sp1 < Sp2) {
170 J=-J; I=-I; Spur=Sp2;
171 } else
172 Spur=Sp1;
173
174 while (Spur < BANDWIDTH) {
175 I += J;
176 Spur = mt2060_spurcalc(lo1+I,lo2+I,if2);
177 }
178 dprintk("Spurs after : f_lo1: %d f_lo2: %d (kHz)",
179 (int)(lo1+I),(int)(lo2+I));
180 }
181 return I;
182}
183#endif
184
185#define IF2 36150 // IF2 frequency = 36.150 MHz
186#define FREF 16000 // Quartz oscillator 16 MHz
187
Mauro Carvalho Chehab14d24d12011-12-24 12:24:33 -0300188static int mt2060_set_params(struct dvb_frontend *fe)
Patrick Boettcher4de27302006-04-17 13:22:15 -0300189{
Mauro Carvalho Chehab2676c252011-12-20 17:09:15 -0300190 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
Olivier DANET46f73f92006-08-08 15:48:10 -0300191 struct mt2060_priv *priv;
Patrick Boettcher4de27302006-04-17 13:22:15 -0300192 int i=0;
193 u32 freq;
194 u8 lnaband;
195 u32 f_lo1,f_lo2;
196 u32 div1,num1,div2,num2;
197 u8 b[8];
198 u32 if1;
199
Olivier DANET46f73f92006-08-08 15:48:10 -0300200 priv = fe->tuner_priv;
201
202 if1 = priv->if1_freq;
Patrick Boettcher4de27302006-04-17 13:22:15 -0300203 b[0] = REG_LO1B1;
204 b[1] = 0xFF;
Patrick Boettcher4de27302006-04-17 13:22:15 -0300205
Antti Palosaari6e623432008-09-15 14:34:31 -0300206 if (fe->ops.i2c_gate_ctrl)
207 fe->ops.i2c_gate_ctrl(fe, 1); /* open i2c_gate */
208
Olivier DANET46f73f92006-08-08 15:48:10 -0300209 mt2060_writeregs(priv,b,2);
Patrick Boettcher4de27302006-04-17 13:22:15 -0300210
Mauro Carvalho Chehab2676c252011-12-20 17:09:15 -0300211 freq = c->frequency / 1000; /* Hz -> kHz */
Olivier DANET46f73f92006-08-08 15:48:10 -0300212
213 f_lo1 = freq + if1 * 1000;
214 f_lo1 = (f_lo1 / 250) * 250;
215 f_lo2 = f_lo1 - freq - IF2;
216 // From the Comtech datasheet, the step used is 50kHz. The tuner chip could be more precise
217 f_lo2 = ((f_lo2 + 25) / 50) * 50;
218 priv->frequency = (f_lo1 - f_lo2 - IF2) * 1000,
Patrick Boettcher4de27302006-04-17 13:22:15 -0300219
220#ifdef MT2060_SPURCHECK
221 // LO-related spurs detection and correction
222 num1 = mt2060_spurcheck(f_lo1,f_lo2,IF2);
223 f_lo1 += num1;
224 f_lo2 += num1;
225#endif
226 //Frequency LO1 = 16MHz * (DIV1 + NUM1/64 )
Olivier DANET46f73f92006-08-08 15:48:10 -0300227 num1 = f_lo1 / (FREF / 64);
228 div1 = num1 / 64;
229 num1 &= 0x3f;
Patrick Boettcher4de27302006-04-17 13:22:15 -0300230
231 // Frequency LO2 = 16MHz * (DIV2 + NUM2/8192 )
Olivier DANET46f73f92006-08-08 15:48:10 -0300232 num2 = f_lo2 * 64 / (FREF / 128);
233 div2 = num2 / 8192;
234 num2 &= 0x1fff;
Patrick Boettcher4de27302006-04-17 13:22:15 -0300235
236 if (freq <= 95000) lnaband = 0xB0; else
237 if (freq <= 180000) lnaband = 0xA0; else
238 if (freq <= 260000) lnaband = 0x90; else
239 if (freq <= 335000) lnaband = 0x80; else
240 if (freq <= 425000) lnaband = 0x70; else
241 if (freq <= 480000) lnaband = 0x60; else
242 if (freq <= 570000) lnaband = 0x50; else
243 if (freq <= 645000) lnaband = 0x40; else
244 if (freq <= 730000) lnaband = 0x30; else
245 if (freq <= 810000) lnaband = 0x20; else lnaband = 0x10;
246
247 b[0] = REG_LO1C1;
248 b[1] = lnaband | ((num1 >>2) & 0x0F);
249 b[2] = div1;
250 b[3] = (num2 & 0x0F) | ((num1 & 3) << 4);
251 b[4] = num2 >> 4;
252 b[5] = ((num2 >>12) & 1) | (div2 << 1);
253
254 dprintk("IF1: %dMHz",(int)if1);
Olivier DANET46f73f92006-08-08 15:48:10 -0300255 dprintk("PLL freq=%dkHz f_lo1=%dkHz f_lo2=%dkHz",(int)freq,(int)f_lo1,(int)f_lo2);
256 dprintk("PLL div1=%d num1=%d div2=%d num2=%d",(int)div1,(int)num1,(int)div2,(int)num2);
Patrick Boettcher4de27302006-04-17 13:22:15 -0300257 dprintk("PLL [1..5]: %2x %2x %2x %2x %2x",(int)b[1],(int)b[2],(int)b[3],(int)b[4],(int)b[5]);
258
Olivier DANET46f73f92006-08-08 15:48:10 -0300259 mt2060_writeregs(priv,b,6);
Patrick Boettcher4de27302006-04-17 13:22:15 -0300260
261 //Waits for pll lock or timeout
Olivier DANET46f73f92006-08-08 15:48:10 -0300262 i = 0;
Patrick Boettcher4de27302006-04-17 13:22:15 -0300263 do {
Olivier DANET46f73f92006-08-08 15:48:10 -0300264 mt2060_readreg(priv,REG_LO_STATUS,b);
265 if ((b[0] & 0x88)==0x88)
266 break;
Patrick Boettcher4de27302006-04-17 13:22:15 -0300267 msleep(4);
268 i++;
269 } while (i<10);
270
Antti Palosaari6e623432008-09-15 14:34:31 -0300271 if (fe->ops.i2c_gate_ctrl)
272 fe->ops.i2c_gate_ctrl(fe, 0); /* close i2c_gate */
273
Mauro Carvalho Chehab4539fc52014-09-03 16:06:55 -0300274 return 0;
Patrick Boettcher4de27302006-04-17 13:22:15 -0300275}
Patrick Boettcher4de27302006-04-17 13:22:15 -0300276
Olivier DANET46f73f92006-08-08 15:48:10 -0300277static void mt2060_calibrate(struct mt2060_priv *priv)
Patrick Boettcher4de27302006-04-17 13:22:15 -0300278{
279 u8 b = 0;
280 int i = 0;
281
Olivier DANET46f73f92006-08-08 15:48:10 -0300282 if (mt2060_writeregs(priv,mt2060_config1,sizeof(mt2060_config1)))
Patrick Boettcher4de27302006-04-17 13:22:15 -0300283 return;
Olivier DANET46f73f92006-08-08 15:48:10 -0300284 if (mt2060_writeregs(priv,mt2060_config2,sizeof(mt2060_config2)))
Patrick Boettcher4de27302006-04-17 13:22:15 -0300285 return;
286
Patrick Boettcher136cafb2006-09-19 12:51:33 -0300287 /* initialize the clock output */
288 mt2060_writereg(priv, REG_VGAG, (priv->cfg->clock_out << 6) | 0x30);
289
Patrick Boettcher4de27302006-04-17 13:22:15 -0300290 do {
291 b |= (1 << 6); // FM1SS;
Olivier DANET46f73f92006-08-08 15:48:10 -0300292 mt2060_writereg(priv, REG_LO2C1,b);
Patrick Boettcher4de27302006-04-17 13:22:15 -0300293 msleep(20);
294
295 if (i == 0) {
296 b |= (1 << 7); // FM1CA;
Olivier DANET46f73f92006-08-08 15:48:10 -0300297 mt2060_writereg(priv, REG_LO2C1,b);
Patrick Boettcher4de27302006-04-17 13:22:15 -0300298 b &= ~(1 << 7); // FM1CA;
299 msleep(20);
300 }
301
302 b &= ~(1 << 6); // FM1SS
Olivier DANET46f73f92006-08-08 15:48:10 -0300303 mt2060_writereg(priv, REG_LO2C1,b);
Patrick Boettcher4de27302006-04-17 13:22:15 -0300304
305 msleep(20);
306 i++;
307 } while (i < 9);
308
309 i = 0;
Olivier DANET46f73f92006-08-08 15:48:10 -0300310 while (i++ < 10 && mt2060_readreg(priv, REG_MISC_STAT, &b) == 0 && (b & (1 << 6)) == 0)
Patrick Boettcher4de27302006-04-17 13:22:15 -0300311 msleep(20);
312
Roel Kluin7d979a82009-02-11 06:34:11 -0300313 if (i <= 10) {
Olivier DANET46f73f92006-08-08 15:48:10 -0300314 mt2060_readreg(priv, REG_FM_FREQ, &priv->fmfreq); // now find out, what is fmreq used for :)
315 dprintk("calibration was successful: %d", (int)priv->fmfreq);
Patrick Boettcher4de27302006-04-17 13:22:15 -0300316 } else
317 dprintk("FMCAL timed out");
318}
319
Olivier DANET46f73f92006-08-08 15:48:10 -0300320static int mt2060_get_frequency(struct dvb_frontend *fe, u32 *frequency)
321{
322 struct mt2060_priv *priv = fe->tuner_priv;
323 *frequency = priv->frequency;
324 return 0;
325}
326
Antti Palosaari055327c2011-11-13 00:44:57 -0300327static int mt2060_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
328{
329 *frequency = IF2 * 1000;
330 return 0;
331}
332
matthieu castet294d83d2006-08-03 06:36:17 -0300333static int mt2060_init(struct dvb_frontend *fe)
334{
335 struct mt2060_priv *priv = fe->tuner_priv;
Antti Palosaari6e623432008-09-15 14:34:31 -0300336 int ret;
337
338 if (fe->ops.i2c_gate_ctrl)
339 fe->ops.i2c_gate_ctrl(fe, 1); /* open i2c_gate */
340
Antti Palosaarie11415c2016-12-09 15:11:09 -0200341 if (priv->sleep) {
342 ret = mt2060_writereg(priv, REG_MISC_CTRL, 0x20);
343 if (ret)
344 goto err_i2c_gate_ctrl;
345 }
346
Antti Palosaari6e623432008-09-15 14:34:31 -0300347 ret = mt2060_writereg(priv, REG_VGAG,
348 (priv->cfg->clock_out << 6) | 0x33);
349
Antti Palosaarie11415c2016-12-09 15:11:09 -0200350err_i2c_gate_ctrl:
Antti Palosaari6e623432008-09-15 14:34:31 -0300351 if (fe->ops.i2c_gate_ctrl)
352 fe->ops.i2c_gate_ctrl(fe, 0); /* close i2c_gate */
353
354 return ret;
matthieu castet294d83d2006-08-03 06:36:17 -0300355}
356
Olivier DANET46f73f92006-08-08 15:48:10 -0300357static int mt2060_sleep(struct dvb_frontend *fe)
358{
359 struct mt2060_priv *priv = fe->tuner_priv;
Antti Palosaari6e623432008-09-15 14:34:31 -0300360 int ret;
361
362 if (fe->ops.i2c_gate_ctrl)
363 fe->ops.i2c_gate_ctrl(fe, 1); /* open i2c_gate */
364
365 ret = mt2060_writereg(priv, REG_VGAG,
366 (priv->cfg->clock_out << 6) | 0x30);
Antti Palosaarie11415c2016-12-09 15:11:09 -0200367 if (ret)
368 goto err_i2c_gate_ctrl;
Antti Palosaari6e623432008-09-15 14:34:31 -0300369
Antti Palosaarie11415c2016-12-09 15:11:09 -0200370 if (priv->sleep)
371 ret = mt2060_writereg(priv, REG_MISC_CTRL, 0xe8);
372
373err_i2c_gate_ctrl:
Antti Palosaari6e623432008-09-15 14:34:31 -0300374 if (fe->ops.i2c_gate_ctrl)
375 fe->ops.i2c_gate_ctrl(fe, 0); /* close i2c_gate */
376
377 return ret;
Olivier DANET46f73f92006-08-08 15:48:10 -0300378}
379
Mauro Carvalho Chehabf2709c22016-11-18 20:30:51 -0200380static void mt2060_release(struct dvb_frontend *fe)
381{
382 kfree(fe->tuner_priv);
383 fe->tuner_priv = NULL;
384}
385
Olivier DANET46f73f92006-08-08 15:48:10 -0300386static const struct dvb_tuner_ops mt2060_tuner_ops = {
387 .info = {
Mauro Carvalho Chehaba3f90c72018-07-05 18:59:35 -0400388 .name = "Microtune MT2060",
389 .frequency_min_hz = 48 * MHz,
390 .frequency_max_hz = 860 * MHz,
391 .frequency_step_hz = 50 * kHz,
Olivier DANET46f73f92006-08-08 15:48:10 -0300392 },
393
Mauro Carvalho Chehabf2709c22016-11-18 20:30:51 -0200394 .release = mt2060_release,
Olivier DANET46f73f92006-08-08 15:48:10 -0300395
matthieu castet294d83d2006-08-03 06:36:17 -0300396 .init = mt2060_init,
Olivier DANET46f73f92006-08-08 15:48:10 -0300397 .sleep = mt2060_sleep,
398
399 .set_params = mt2060_set_params,
Olivier DANET46f73f92006-08-08 15:48:10 -0300400 .get_frequency = mt2060_get_frequency,
Antti Palosaari055327c2011-11-13 00:44:57 -0300401 .get_if_frequency = mt2060_get_if_frequency,
Olivier DANET46f73f92006-08-08 15:48:10 -0300402};
403
404/* This functions tries to identify a MT2060 tuner by reading the PART/REV register. This is hasty. */
Patrick Boettcher6958eff2006-09-19 12:51:40 -0300405struct dvb_frontend * mt2060_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct mt2060_config *cfg, u16 if1)
Olivier DANET46f73f92006-08-08 15:48:10 -0300406{
407 struct mt2060_priv *priv = NULL;
Patrick Boettcher4de27302006-04-17 13:22:15 -0300408 u8 id = 0;
Patrick Boettcher4de27302006-04-17 13:22:15 -0300409
Olivier DANET46f73f92006-08-08 15:48:10 -0300410 priv = kzalloc(sizeof(struct mt2060_priv), GFP_KERNEL);
411 if (priv == NULL)
Patrick Boettcher6958eff2006-09-19 12:51:40 -0300412 return NULL;
Patrick Boettcher4de27302006-04-17 13:22:15 -0300413
Olivier DANET46f73f92006-08-08 15:48:10 -0300414 priv->cfg = cfg;
415 priv->i2c = i2c;
416 priv->if1_freq = if1;
Antti Palosaari433c4862015-07-26 17:30:07 -0300417 priv->i2c_max_regs = ~0;
Olivier DANET46f73f92006-08-08 15:48:10 -0300418
Antti Palosaari6e623432008-09-15 14:34:31 -0300419 if (fe->ops.i2c_gate_ctrl)
420 fe->ops.i2c_gate_ctrl(fe, 1); /* open i2c_gate */
421
Olivier DANET46f73f92006-08-08 15:48:10 -0300422 if (mt2060_readreg(priv,REG_PART_REV,&id) != 0) {
423 kfree(priv);
Patrick Boettcher6958eff2006-09-19 12:51:40 -0300424 return NULL;
Olivier DANET46f73f92006-08-08 15:48:10 -0300425 }
Patrick Boettcher4de27302006-04-17 13:22:15 -0300426
Olivier DANET46f73f92006-08-08 15:48:10 -0300427 if (id != PART_REV) {
428 kfree(priv);
Patrick Boettcher6958eff2006-09-19 12:51:40 -0300429 return NULL;
Olivier DANET46f73f92006-08-08 15:48:10 -0300430 }
Patrick Boettcherb7571f82006-08-08 15:48:10 -0300431 printk(KERN_INFO "MT2060: successfully identified (IF1 = %d)\n", if1);
Olivier DANET46f73f92006-08-08 15:48:10 -0300432 memcpy(&fe->ops.tuner_ops, &mt2060_tuner_ops, sizeof(struct dvb_tuner_ops));
Patrick Boettcher4de27302006-04-17 13:22:15 -0300433
Olivier DANET46f73f92006-08-08 15:48:10 -0300434 fe->tuner_priv = priv;
435
436 mt2060_calibrate(priv);
Patrick Boettcher4de27302006-04-17 13:22:15 -0300437
Antti Palosaari6e623432008-09-15 14:34:31 -0300438 if (fe->ops.i2c_gate_ctrl)
439 fe->ops.i2c_gate_ctrl(fe, 0); /* close i2c_gate */
440
Patrick Boettcher6958eff2006-09-19 12:51:40 -0300441 return fe;
Patrick Boettcher4de27302006-04-17 13:22:15 -0300442}
443EXPORT_SYMBOL(mt2060_attach);
444
Antti Palosaari59e8b7a2015-07-26 18:45:05 -0300445static int mt2060_probe(struct i2c_client *client,
446 const struct i2c_device_id *id)
447{
448 struct mt2060_platform_data *pdata = client->dev.platform_data;
449 struct dvb_frontend *fe;
450 struct mt2060_priv *dev;
451 int ret;
452 u8 chip_id;
453
454 dev_dbg(&client->dev, "\n");
455
456 if (!pdata) {
457 dev_err(&client->dev, "Cannot proceed without platform data\n");
458 ret = -EINVAL;
459 goto err;
460 }
461
462 dev = devm_kzalloc(&client->dev, sizeof(*dev), GFP_KERNEL);
463 if (!dev) {
464 ret = -ENOMEM;
465 goto err;
466 }
467
468 fe = pdata->dvb_frontend;
469 dev->config.i2c_address = client->addr;
470 dev->config.clock_out = pdata->clock_out;
471 dev->cfg = &dev->config;
472 dev->i2c = client->adapter;
473 dev->if1_freq = pdata->if1 ? pdata->if1 : 1220;
474 dev->client = client;
Antti Palosaari433c4862015-07-26 17:30:07 -0300475 dev->i2c_max_regs = pdata->i2c_write_max ? pdata->i2c_write_max - 1 : ~0;
Antti Palosaarie11415c2016-12-09 15:11:09 -0200476 dev->sleep = true;
Antti Palosaari59e8b7a2015-07-26 18:45:05 -0300477
478 ret = mt2060_readreg(dev, REG_PART_REV, &chip_id);
479 if (ret) {
480 ret = -ENODEV;
481 goto err;
482 }
483
484 dev_dbg(&client->dev, "chip id=%02x\n", chip_id);
485
486 if (chip_id != PART_REV) {
487 ret = -ENODEV;
488 goto err;
489 }
490
Antti Palosaarie11415c2016-12-09 15:11:09 -0200491 /* Power on, calibrate, sleep */
492 ret = mt2060_writereg(dev, REG_MISC_CTRL, 0x20);
493 if (ret)
494 goto err;
495 mt2060_calibrate(dev);
496 ret = mt2060_writereg(dev, REG_MISC_CTRL, 0xe8);
497 if (ret)
498 goto err;
499
Antti Palosaari59e8b7a2015-07-26 18:45:05 -0300500 dev_info(&client->dev, "Microtune MT2060 successfully identified\n");
501 memcpy(&fe->ops.tuner_ops, &mt2060_tuner_ops, sizeof(fe->ops.tuner_ops));
502 fe->ops.tuner_ops.release = NULL;
503 fe->tuner_priv = dev;
504 i2c_set_clientdata(client, dev);
505
Antti Palosaari59e8b7a2015-07-26 18:45:05 -0300506 return 0;
507err:
508 dev_dbg(&client->dev, "failed=%d\n", ret);
509 return ret;
510}
511
512static int mt2060_remove(struct i2c_client *client)
513{
514 dev_dbg(&client->dev, "\n");
515
516 return 0;
517}
518
519static const struct i2c_device_id mt2060_id_table[] = {
520 {"mt2060", 0},
521 {}
522};
523MODULE_DEVICE_TABLE(i2c, mt2060_id_table);
524
525static struct i2c_driver mt2060_driver = {
526 .driver = {
527 .name = "mt2060",
528 .suppress_bind_attrs = true,
529 },
530 .probe = mt2060_probe,
531 .remove = mt2060_remove,
532 .id_table = mt2060_id_table,
533};
534
535module_i2c_driver(mt2060_driver);
536
Patrick Boettcher4de27302006-04-17 13:22:15 -0300537MODULE_AUTHOR("Olivier DANET");
538MODULE_DESCRIPTION("Microtune MT2060 silicon tuner driver");
539MODULE_LICENSE("GPL");