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review.shift-gmbh.com / SHIFTPHONES / kernel / common / e2a0f813e0d53014b78aae76f0359c8a41f05eeb / . / arch / arm / mach-at91 / generic.h
blob: 631fa3b8c16d77be9832f7aa89345e9e7259e94d [file] [log] [blame]
SAN People73a59c12006-01-09 17:05:41 +0000[diff] [blame]1/*
Andrew Victor9d041262007-02-05 11:42:07 +0100[diff] [blame]2 * linux/arch/arm/mach-at91/generic.h
SAN People73a59c12006-01-09 17:05:41 +0000[diff] [blame]3 *
4 * Copyright (C) 2005 David Brownell
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
Jean-Christophe PLAGNIOL-VILLARDbd602992011-02-02 07:27:07 +0100[diff] [blame]11#include <linux/clkdev.h>
Nicolas Ferre8014d6f42012-02-14 18:08:14 +0100[diff] [blame]12#include <linux/of.h>
Robin Holt7b6d8642013-07-08 16:01:40 -0700[diff] [blame]13#include <linux/reboot.h>
Jean-Christophe PLAGNIOL-VILLARDbd602992011-02-02 07:27:07 +0100[diff] [blame]14
Jean-Christophe PLAGNIOL-VILLARD1b021a32011-04-28 20:19:32 +0800[diff] [blame]15 /* Map io */
Jean-Christophe PLAGNIOL-VILLARD21d08b92011-04-23 15:28:34 +0800[diff] [blame]16extern void __init at91_map_io(void);
Jean-Christophe PLAGNIOL-VILLARDf0051d82011-05-10 03:20:09 +0800[diff] [blame]17extern void __init at91_init_sram(int bank, unsigned long base,
18 unsigned int length);
Jean-Christophe PLAGNIOL-VILLARD1b021a32011-04-28 20:19:32 +0800[diff] [blame]19
Andrew Victor2eeaaa22006-09-27 10:50:59 +0100[diff] [blame]20 /* Processors */
Jean-Christophe PLAGNIOL-VILLARDe57556e32011-04-24 11:40:22 +0800[diff] [blame]21extern void __init at91rm9200_set_type(int type);
Jean-Christophe PLAGNIOL-VILLARD21d08b92011-04-23 15:28:34 +0800[diff] [blame]22extern void __init at91_initialize(unsigned long main_clock);
Greg Ungerer9a7e2462007-07-30 02:39:02 +0100[diff] [blame]23extern void __init at91x40_initialize(unsigned long main_clock);
Joachim Eastwood397f8c32012-10-28 18:31:09 +0000[diff] [blame]24extern void __init at91rm9200_dt_initialize(void);
Jean-Christophe PLAGNIOL-VILLARD2b11ea52012-02-28 13:57:51 +0800[diff] [blame]25extern void __init at91_dt_initialize(void);
Andrew Victor2eeaaa22006-09-27 10:50:59 +0100[diff] [blame]26
Andrew Victorba854e12006-07-05 17:22:52 +0100[diff] [blame]27 /* Interrupts */
Jean-Christophe PLAGNIOL-VILLARD92100c12011-04-23 15:28:34 +0800[diff] [blame]28extern void __init at91_init_irq_default(void);
29extern void __init at91_init_interrupts(unsigned int priority[]);
Greg Ungerer9a7e2462007-07-30 02:39:02 +0100[diff] [blame]30extern void __init at91x40_init_interrupts(unsigned int priority[]);
Nicolas Ferre738a0fd2012-10-24 16:09:57 +0200[diff] [blame]31extern void __init at91_aic_init(unsigned int priority[],
32 unsigned int ext_irq_mask);
Nicolas Ferre8014d6f42012-02-14 18:08:14 +0100[diff] [blame]33extern int __init at91_aic_of_init(struct device_node *node,
34 struct device_node *parent);
Ludovic Desrochesc4b68522012-05-30 10:01:09 +0200[diff] [blame]35extern int __init at91_aic5_of_init(struct device_node *node,
36 struct device_node *parent);
Johan Hovold6de714c2013-10-16 11:56:14 +0200[diff] [blame]37extern void __init at91_sysirq_mask_rtc(u32 rtc_base);
Johan Hovold94c4c792013-10-16 11:56:15 +0200[diff] [blame]38extern void __init at91_sysirq_mask_rtt(u32 rtt_base);
Nicolas Ferre8014d6f42012-02-14 18:08:14 +0100[diff] [blame]39
SAN People73a59c12006-01-09 17:05:41 +0000[diff] [blame]40
Andrew Victorba854e12006-07-05 17:22:52 +0100[diff] [blame]41 /* Timer */
Jean-Christophe PLAGNIOL-VILLARD5e9cf5e2012-02-20 11:07:39 +0100[diff] [blame]42extern void at91rm9200_ioremap_st(u32 addr);
Stephen Warren6bb27d72012-11-08 12:40:59 -0700[diff] [blame]43extern void at91rm9200_timer_init(void);
Jean-Christophe PLAGNIOL-VILLARD4ab0c5992011-09-18 22:29:50 +0800[diff] [blame]44extern void at91sam926x_ioremap_pit(u32 addr);
Stephen Warren6bb27d72012-11-08 12:40:59 -0700[diff] [blame]45extern void at91sam926x_pit_init(void);
46extern void at91x40_timer_init(void);
SAN People73a59c12006-01-09 17:05:41 +0000[diff] [blame]47
Andrew Victorba854e12006-07-05 17:22:52 +0100[diff] [blame]48 /* Clocks */
Boris BREZILLONc8a8c632013-10-11 09:37:46 +0200[diff] [blame]49#ifdef CONFIG_OLD_CLK_AT91
Jean-Christophe PLAGNIOL-VILLARD46539372011-04-24 18:20:28 +0800[diff] [blame]50extern int __init at91_clock_init(unsigned long main_clock);
Jean-Christophe PLAGNIOL-VILLARDeb5e76f2012-03-02 20:44:23 +0800[diff] [blame]51extern int __init at91_dt_clock_init(void);
Jean-Christophe PLAGNIOL-VILLARD46539372011-04-24 18:20:28 +0800[diff] [blame]52#else
53static int inline at91_clock_init(unsigned long main_clock) { return 0; }
Boris BREZILLONc8a8c632013-10-11 09:37:46 +0200[diff] [blame]54static int inline at91_dt_clock_init(void) { return 0; }
Jean-Christophe PLAGNIOL-VILLARD46539372011-04-24 18:20:28 +0800[diff] [blame]55#endif
Andrew Victor907d6de2006-06-20 19:30:19 +0100[diff] [blame]56struct device;
Andrew Victor907d6de2006-06-20 19:30:19 +0100[diff] [blame]57
58 /* Power Management */
59extern void at91_irq_suspend(void);
60extern void at91_irq_resume(void);
61
Jean-Christophe PLAGNIOL-VILLARD0d781712012-02-05 20:25:32 +0800[diff] [blame]62/* idle */
63extern void at91sam9_idle(void);
64
Nicolas Ferrebb413db2010-10-14 19:14:00 +0200[diff] [blame]65/* reset */
Jean-Christophe PLAGNIOL-VILLARDe9f68b52011-11-18 01:25:52 +0800[diff] [blame]66extern void at91_ioremap_rstc(u32 base_addr);
Robin Holt7b6d8642013-07-08 16:01:40 -0700[diff] [blame]67extern void at91sam9_alt_restart(enum reboot_mode, const char *);
68extern void at91sam9g45_restart(enum reboot_mode, const char *);
Nicolas Ferrebb413db2010-10-14 19:14:00 +0200[diff] [blame]69
Jean-Christophe PLAGNIOL-VILLARDf22deee2011-11-01 01:23:20 +0800[diff] [blame]70/* shutdown */
71extern void at91_ioremap_shdwc(u32 base_addr);
72
Jean-Christophe PLAGNIOL-VILLARD4342d642011-11-27 23:15:50 +0800[diff] [blame]73/* Matrix */
74extern void at91_ioremap_matrix(u32 base_addr);
75
Jean-Christophe PLAGNIOL-VILLARDf363c402012-02-13 12:58:53 +0800[diff] [blame]76/* Ram Controler */
77extern void at91_ioremap_ramc(int id, u32 addr, u32 size);
78
Andrew Victorf2173832006-09-27 13:23:00 +0100[diff] [blame]79 /* GPIO */
80#define AT91RM9200_PQFP 3 /* AT91RM9200 PQFP package has 3 banks */
81#define AT91RM9200_BGA 4 /* AT91RM9200 BGA package has 4 banks */
82
83struct at91_gpio_bank {
84 unsigned short id; /* peripheral ID */
Jean-Christophe PLAGNIOL-VILLARD80e91cb2011-09-16 23:37:50 +0800[diff] [blame]85 unsigned long regbase; /* offset from system peripheral base */
Andrew Victorf2173832006-09-27 13:23:00 +0100[diff] [blame]86};
87extern void __init at91_gpio_init(struct at91_gpio_bank *, int nr_banks);
88extern void __init at91_gpio_irq_setup(void);
Nicolas Ferre8014d6f42012-02-14 18:08:14 +0100[diff] [blame]89extern int __init at91_gpio_of_irq_setup(struct device_node *node,
90 struct device_node *parent);
Andrew Victor1f4fd0a2006-11-30 10:01:47 +0100[diff] [blame]91
Jean-Christophe PLAGNIOL-VILLARD546c8302013-06-01 16:40:11 +0200[diff] [blame]92extern u32 at91_get_extern_irq(void);