blob: b3be7994a2b1c32a981e431a9b924a78516da83c [file] [log] [blame]
Barry Song156a0992012-08-23 13:41:58 +08001if ARCH_SIRF
2
Barry Songd4fe49e2013-03-18 15:04:38 +08003menu "CSR SiRF atlas6/primaII/Marco/Polo Specific Features"
4
5config ARCH_ATLAS6
6 bool "CSR SiRFSoC ATLAS6 ARM Cortex A9 Platform"
7 default y
8 select CPU_V7
9 select SIRF_IRQ
10 help
11 Support for CSR SiRFSoC ARM Cortex A9 Platform
Barry Song156a0992012-08-23 13:41:58 +080012
13config ARCH_PRIMA2
14 bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform"
15 default y
16 select CPU_V7
Barry Songc1e3c112012-08-23 13:41:59 +080017 select SIRF_IRQ
Russell Kingb1b3f492012-10-06 17:12:25 +010018 select ZONE_DMA
Barry Song156a0992012-08-23 13:41:58 +080019 help
20 Support for CSR SiRFSoC ARM Cortex A9 Platform
21
Barry Song4898de32012-12-20 19:37:32 +080022config ARCH_MARCO
23 bool "CSR SiRFSoC MARCO ARM Cortex A9 Platform"
24 default y
25 select ARM_GIC
26 select CPU_V7
27 select HAVE_SMP
28 select SMP_ON_UP
29 help
30 Support for CSR SiRFSoC ARM Cortex A9 Platform
31
Barry Song156a0992012-08-23 13:41:58 +080032endmenu
33
Barry Songc1e3c112012-08-23 13:41:59 +080034config SIRF_IRQ
35 bool
36
Barry Song156a0992012-08-23 13:41:58 +080037endif