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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * linux/arch/arm/mach-pxa/pxa25x.c
3 *
4 * Author: Nicolas Pitre
5 * Created: Jun 15, 2001
6 * Copyright: MontaVista Software Inc.
7 *
8 * Code specific to PXA21x/25x/26x variants.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 * Since this file should be linked before any other machine specific file,
15 * the __initcall() here will be executed first. This serves as default
16 * initialization stuff for PXA machines which can be overridden later if
17 * need be.
18 */
19#include <linux/module.h>
20#include <linux/kernel.h>
21#include <linux/init.h>
Russell King34f32312007-05-15 10:39:49 +010022#include <linux/platform_device.h>
Rafael J. Wysocki95d9ffb2007-10-18 03:04:39 -070023#include <linux/suspend.h>
eric miaoc01655042008-01-28 23:00:02 +000024#include <linux/sysdev.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070025
26#include <asm/hardware.h>
Eric Miaocd491042007-06-22 04:14:09 +010027#include <asm/arch/irqs.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070028#include <asm/arch/pxa-regs.h>
eric miaoc0a596d2008-03-11 09:46:28 +080029#include <asm/arch/mfp-pxa25x.h>
Russell Kinge176bb02007-05-15 11:16:10 +010030#include <asm/arch/pm.h>
Eric Miaof53f0662007-06-22 05:40:17 +010031#include <asm/arch/dma.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070032
33#include "generic.h"
Russell King46c41e62007-05-15 15:39:36 +010034#include "devices.h"
Russell Kinga6dba202007-08-20 10:18:02 +010035#include "clock.h"
Linus Torvalds1da177e2005-04-16 15:20:36 -070036
37/*
38 * Various clock factors driven by the CCCR register.
39 */
40
41/* Crystal Frequency to Memory Frequency Multiplier (L) */
42static unsigned char L_clk_mult[32] = { 0, 27, 32, 36, 40, 45, 0, };
43
44/* Memory Frequency to Run Mode Frequency Multiplier (M) */
45static unsigned char M_clk_mult[4] = { 0, 1, 2, 4 };
46
47/* Run Mode Frequency to Turbo Mode Frequency Multiplier (N) */
48/* Note: we store the value N * 2 here. */
49static unsigned char N2_clk_mult[8] = { 0, 0, 2, 3, 4, 0, 6, 0 };
50
51/* Crystal clock */
52#define BASE_CLK 3686400
53
54/*
55 * Get the clock frequency as reflected by CCCR and the turbo flag.
56 * We assume these values have been applied via a fcs.
57 * If info is not 0 we also display the current settings.
58 */
Russell King15a40332007-08-20 10:07:44 +010059unsigned int pxa25x_get_clk_frequency_khz(int info)
Linus Torvalds1da177e2005-04-16 15:20:36 -070060{
61 unsigned long cccr, turbo;
62 unsigned int l, L, m, M, n2, N;
63
64 cccr = CCCR;
65 asm( "mrc\tp14, 0, %0, c6, c0, 0" : "=r" (turbo) );
66
67 l = L_clk_mult[(cccr >> 0) & 0x1f];
68 m = M_clk_mult[(cccr >> 5) & 0x03];
69 n2 = N2_clk_mult[(cccr >> 7) & 0x07];
70
71 L = l * BASE_CLK;
72 M = m * L;
73 N = n2 * M / 2;
74
75 if(info)
76 {
77 L += 5000;
78 printk( KERN_INFO "Memory clock: %d.%02dMHz (*%d)\n",
79 L / 1000000, (L % 1000000) / 10000, l );
80 M += 5000;
81 printk( KERN_INFO "Run Mode clock: %d.%02dMHz (*%d)\n",
82 M / 1000000, (M % 1000000) / 10000, m );
83 N += 5000;
84 printk( KERN_INFO "Turbo Mode clock: %d.%02dMHz (*%d.%d, %sactive)\n",
85 N / 1000000, (N % 1000000) / 10000, n2 / 2, (n2 % 2) * 5,
86 (turbo & 1) ? "" : "in" );
87 }
88
89 return (turbo & 1) ? (N/1000) : (M/1000);
90}
91
Linus Torvalds1da177e2005-04-16 15:20:36 -070092/*
93 * Return the current memory clock frequency in units of 10kHz
94 */
Russell King15a40332007-08-20 10:07:44 +010095unsigned int pxa25x_get_memclk_frequency_10khz(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -070096{
97 return L_clk_mult[(CCCR >> 0) & 0x1f] * BASE_CLK / 10000;
98}
99
Russell Kinga6dba202007-08-20 10:18:02 +0100100static unsigned long clk_pxa25x_lcd_getrate(struct clk *clk)
101{
102 return pxa25x_get_memclk_frequency_10khz() * 10000;
103}
104
105static const struct clkops clk_pxa25x_lcd_ops = {
106 .enable = clk_cken_enable,
107 .disable = clk_cken_disable,
108 .getrate = clk_pxa25x_lcd_getrate,
109};
110
111/*
112 * 3.6864MHz -> OST, GPIO, SSP, PWM, PLLs (95.842MHz, 147.456MHz)
113 * 95.842MHz -> MMC 19.169MHz, I2C 31.949MHz, FICP 47.923MHz, USB 47.923MHz
114 * 147.456MHz -> UART 14.7456MHz, AC97 12.288MHz, I2S 5.672MHz (allegedly)
115 */
Dmitry Baryshkove01dbdb2008-01-27 23:11:48 +0100116static struct clk pxa25x_hwuart_clk =
117 INIT_CKEN("UARTCLK", HWUART, 14745600, 1, &pxa_device_hwuart.dev)
118;
119
Russell Kinga6dba202007-08-20 10:18:02 +0100120static struct clk pxa25x_clks[] = {
121 INIT_CK("LCDCLK", LCD, &clk_pxa25x_lcd_ops, &pxa_device_fb.dev),
122 INIT_CKEN("UARTCLK", FFUART, 14745600, 1, &pxa_device_ffuart.dev),
123 INIT_CKEN("UARTCLK", BTUART, 14745600, 1, &pxa_device_btuart.dev),
Russell King435b6e92007-09-02 17:08:42 +0100124 INIT_CKEN("UARTCLK", STUART, 14745600, 1, NULL),
Russell Kinga6dba202007-08-20 10:18:02 +0100125 INIT_CKEN("UDCCLK", USB, 47923000, 5, &pxa_device_udc.dev),
126 INIT_CKEN("MMCCLK", MMC, 19169000, 0, &pxa_device_mci.dev),
127 INIT_CKEN("I2CCLK", I2C, 31949000, 0, &pxa_device_i2c.dev),
eric miaod8e0db12007-12-10 17:54:36 +0800128
129 INIT_CKEN("SSPCLK", SSP, 3686400, 0, &pxa25x_device_ssp.dev),
130 INIT_CKEN("SSPCLK", NSSP, 3686400, 0, &pxa25x_device_nssp.dev),
131 INIT_CKEN("SSPCLK", ASSP, 3686400, 0, &pxa25x_device_assp.dev),
132
Mark Brown27b98a62008-03-04 11:14:22 +0100133 INIT_CKEN("AC97CLK", AC97, 24576000, 0, NULL),
134
Russell Kinga6dba202007-08-20 10:18:02 +0100135 /*
136 INIT_CKEN("PWMCLK", PWM0, 3686400, 0, NULL),
137 INIT_CKEN("PWMCLK", PWM0, 3686400, 0, NULL),
Russell Kinga6dba202007-08-20 10:18:02 +0100138 INIT_CKEN("I2SCLK", I2S, 14745600, 0, NULL),
Russell Kinga6dba202007-08-20 10:18:02 +0100139 */
Russell King435b6e92007-09-02 17:08:42 +0100140 INIT_CKEN("FICPCLK", FICP, 47923000, 0, NULL),
Russell Kinga6dba202007-08-20 10:18:02 +0100141};
142
Nicolas Pitrea8fa3f02005-06-13 22:35:41 +0100143#ifdef CONFIG_PM
Todd Poynor87754202005-06-03 20:52:27 +0100144
Eric Miao711be5c2007-07-18 11:38:45 +0100145#define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x
146#define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x]
147
Eric Miao711be5c2007-07-18 11:38:45 +0100148/*
149 * List of global PXA peripheral registers to preserve.
150 * More ones like CP and general purpose register values are preserved
151 * with the stack pointer in sleep.S.
152 */
Robert Jarzmik649de512008-05-02 21:17:06 +0100153enum { SLEEP_SAVE_PGSR0, SLEEP_SAVE_PGSR1, SLEEP_SAVE_PGSR2,
Eric Miao711be5c2007-07-18 11:38:45 +0100154
155 SLEEP_SAVE_GAFR0_L, SLEEP_SAVE_GAFR0_U,
156 SLEEP_SAVE_GAFR1_L, SLEEP_SAVE_GAFR1_U,
157 SLEEP_SAVE_GAFR2_L, SLEEP_SAVE_GAFR2_U,
158
159 SLEEP_SAVE_PSTR,
160
Eric Miao711be5c2007-07-18 11:38:45 +0100161 SLEEP_SAVE_CKEN,
162
Robert Jarzmik649de512008-05-02 21:17:06 +0100163 SLEEP_SAVE_COUNT
Eric Miao711be5c2007-07-18 11:38:45 +0100164};
165
166
167static void pxa25x_cpu_pm_save(unsigned long *sleep_save)
168{
Eric Miao711be5c2007-07-18 11:38:45 +0100169 SAVE(PGSR0); SAVE(PGSR1); SAVE(PGSR2);
170
171 SAVE(GAFR0_L); SAVE(GAFR0_U);
172 SAVE(GAFR1_L); SAVE(GAFR1_U);
173 SAVE(GAFR2_L); SAVE(GAFR2_U);
174
Eric Miao711be5c2007-07-18 11:38:45 +0100175 SAVE(CKEN);
176 SAVE(PSTR);
Richard Purdie56b11282008-01-02 00:54:49 +0100177
178 /* Clear GPIO transition detect bits */
179 GEDR0 = GEDR0; GEDR1 = GEDR1; GEDR2 = GEDR2;
Eric Miao711be5c2007-07-18 11:38:45 +0100180}
181
182static void pxa25x_cpu_pm_restore(unsigned long *sleep_save)
183{
Richard Purdie56b11282008-01-02 00:54:49 +0100184 /* ensure not to come back here if it wasn't intended */
185 PSPR = 0;
186
Eric Miao711be5c2007-07-18 11:38:45 +0100187 /* restore registers */
Eric Miao711be5c2007-07-18 11:38:45 +0100188 RESTORE(GAFR0_L); RESTORE(GAFR0_U);
189 RESTORE(GAFR1_L); RESTORE(GAFR1_U);
190 RESTORE(GAFR2_L); RESTORE(GAFR2_U);
Eric Miao711be5c2007-07-18 11:38:45 +0100191 RESTORE(PGSR0); RESTORE(PGSR1); RESTORE(PGSR2);
192
Richard Purdie56b11282008-01-02 00:54:49 +0100193 PSSR = PSSR_RDH | PSSR_PH;
194
Eric Miao711be5c2007-07-18 11:38:45 +0100195 RESTORE(CKEN);
Eric Miao711be5c2007-07-18 11:38:45 +0100196 RESTORE(PSTR);
197}
198
199static void pxa25x_cpu_pm_enter(suspend_state_t state)
Todd Poynor87754202005-06-03 20:52:27 +0100200{
Russell Kingdc38e2a2008-05-08 16:50:39 +0100201 /* Clear reset status */
202 RCSR = RCSR_HWR | RCSR_WDR | RCSR_SMR | RCSR_GPR;
203
Todd Poynor87754202005-06-03 20:52:27 +0100204 switch (state) {
205 case PM_SUSPEND_MEM:
206 /* set resume return address */
207 PSPR = virt_to_phys(pxa_cpu_resume);
Eric Miaob750a092007-07-18 11:40:13 +0100208 pxa25x_cpu_suspend(PWRMODE_SLEEP);
Todd Poynor87754202005-06-03 20:52:27 +0100209 break;
210 }
211}
Nicolas Pitrea8fa3f02005-06-13 22:35:41 +0100212
Eric Miao711be5c2007-07-18 11:38:45 +0100213static struct pxa_cpu_pm_fns pxa25x_cpu_pm_fns = {
Robert Jarzmik649de512008-05-02 21:17:06 +0100214 .save_count = SLEEP_SAVE_COUNT,
Rafael J. Wysocki26398a72007-10-18 03:04:40 -0700215 .valid = suspend_valid_only_mem,
Eric Miao711be5c2007-07-18 11:38:45 +0100216 .save = pxa25x_cpu_pm_save,
217 .restore = pxa25x_cpu_pm_restore,
218 .enter = pxa25x_cpu_pm_enter,
Russell Kinge176bb02007-05-15 11:16:10 +0100219};
Eric Miao711be5c2007-07-18 11:38:45 +0100220
221static void __init pxa25x_init_pm(void)
222{
223 pxa_cpu_pm_fns = &pxa25x_cpu_pm_fns;
224}
eric miaof79299c2008-01-02 08:24:49 +0800225#else
226static inline void pxa25x_init_pm(void) {}
Nicolas Pitrea8fa3f02005-06-13 22:35:41 +0100227#endif
Russell Kinge176bb02007-05-15 11:16:10 +0100228
eric miaoc95530c2007-08-29 10:22:17 +0100229/* PXA25x: supports wakeup from GPIO0..GPIO15 and RTC alarm
230 */
231
232static int pxa25x_set_wake(unsigned int irq, unsigned int on)
233{
234 int gpio = IRQ_TO_GPIO(irq);
eric miaoc0a596d2008-03-11 09:46:28 +0800235 uint32_t mask = 0;
eric miaoc95530c2007-08-29 10:22:17 +0100236
eric miaoc0a596d2008-03-11 09:46:28 +0800237 if (gpio >= 0 && gpio < 85)
238 return gpio_set_wake(gpio, on);
eric miaoc95530c2007-08-29 10:22:17 +0100239
240 if (irq == IRQ_RTCAlrm) {
241 mask = PWER_RTC;
242 goto set_pwer;
243 }
244
245 return -EINVAL;
246
247set_pwer:
248 if (on)
249 PWER |= mask;
250 else
251 PWER &=~mask;
252
253 return 0;
254}
255
Eric Miaocd491042007-06-22 04:14:09 +0100256void __init pxa25x_init_irq(void)
257{
eric miaob9e25ac2008-03-04 14:19:58 +0800258 pxa_init_irq(32, pxa25x_set_wake);
259 pxa_init_gpio(85, pxa25x_set_wake);
Eric Miaocd491042007-06-22 04:14:09 +0100260}
261
Russell King34f32312007-05-15 10:39:49 +0100262static struct platform_device *pxa25x_devices[] __initdata = {
Eric Miaoe09d02e2007-07-17 10:45:58 +0100263 &pxa_device_udc,
Eric Miaoe09d02e2007-07-17 10:45:58 +0100264 &pxa_device_ffuart,
265 &pxa_device_btuart,
266 &pxa_device_stuart,
Eric Miaoe09d02e2007-07-17 10:45:58 +0100267 &pxa_device_i2s,
Eric Miaoe09d02e2007-07-17 10:45:58 +0100268 &pxa_device_rtc,
eric miaod8e0db12007-12-10 17:54:36 +0800269 &pxa25x_device_ssp,
270 &pxa25x_device_nssp,
271 &pxa25x_device_assp,
Russell King34f32312007-05-15 10:39:49 +0100272};
273
eric miaoc01655042008-01-28 23:00:02 +0000274static struct sys_device pxa25x_sysdev[] = {
275 {
276 .cls = &pxa_irq_sysclass,
eric miao16dfdbf2008-01-28 23:00:02 +0000277 }, {
278 .cls = &pxa_gpio_sysclass,
eric miaoc01655042008-01-28 23:00:02 +0000279 },
280};
281
Russell Kinge176bb02007-05-15 11:16:10 +0100282static int __init pxa25x_init(void)
283{
eric miaoc01655042008-01-28 23:00:02 +0000284 int i, ret = 0;
Eric Miaof53f0662007-06-22 05:40:17 +0100285
Dmitry Baryshkove01dbdb2008-01-27 23:11:48 +0100286 /* Only add HWUART for PXA255/26x; PXA210/250/27x do not have it. */
287 if (cpu_is_pxa25x())
288 clks_register(&pxa25x_hwuart_clk, 1);
289
Russell Kinge176bb02007-05-15 11:16:10 +0100290 if (cpu_is_pxa21x() || cpu_is_pxa25x()) {
Russell Kinga6dba202007-08-20 10:18:02 +0100291 clks_register(pxa25x_clks, ARRAY_SIZE(pxa25x_clks));
292
Eric Miaof53f0662007-06-22 05:40:17 +0100293 if ((ret = pxa_init_dma(16)))
294 return ret;
eric miaof79299c2008-01-02 08:24:49 +0800295
Eric Miao711be5c2007-07-18 11:38:45 +0100296 pxa25x_init_pm();
eric miaof79299c2008-01-02 08:24:49 +0800297
eric miaoc01655042008-01-28 23:00:02 +0000298 for (i = 0; i < ARRAY_SIZE(pxa25x_sysdev); i++) {
299 ret = sysdev_register(&pxa25x_sysdev[i]);
300 if (ret)
301 pr_err("failed to register sysdev[%d]\n", i);
302 }
303
Russell King34f32312007-05-15 10:39:49 +0100304 ret = platform_add_devices(pxa25x_devices,
305 ARRAY_SIZE(pxa25x_devices));
eric miaoc01655042008-01-28 23:00:02 +0000306 if (ret)
307 return ret;
Russell Kinge176bb02007-05-15 11:16:10 +0100308 }
eric miaoc01655042008-01-28 23:00:02 +0000309
Russell King34f32312007-05-15 10:39:49 +0100310 /* Only add HWUART for PXA255/26x; PXA210/250/27x do not have it. */
311 if (cpu_is_pxa25x())
Eric Miaoe09d02e2007-07-17 10:45:58 +0100312 ret = platform_device_register(&pxa_device_hwuart);
Russell King34f32312007-05-15 10:39:49 +0100313
314 return ret;
Russell Kinge176bb02007-05-15 11:16:10 +0100315}
316
Russell King1c104e02008-04-19 10:59:24 +0100317postcore_initcall(pxa25x_init);