Yakir Yang | 9e32e16 | 2016-03-29 09:57:30 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Rockchip SoC DP (Display Port) interface driver. |
| 3 | * |
| 4 | * Copyright (C) Fuzhou Rockchip Electronics Co., Ltd. |
| 5 | * Author: Andy Yan <andy.yan@rock-chips.com> |
| 6 | * Yakir Yang <ykk@rock-chips.com> |
| 7 | * Jeff Chen <jeff.chen@rock-chips.com> |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify it |
| 10 | * under the terms of the GNU General Public License as published by the |
| 11 | * Free Software Foundation; either version 2 of the License, or (at your |
| 12 | * option) any later version. |
| 13 | */ |
| 14 | |
| 15 | #include <linux/component.h> |
| 16 | #include <linux/mfd/syscon.h> |
Yakir Yang | d9c900b | 2016-06-29 17:15:01 +0800 | [diff] [blame] | 17 | #include <linux/of_device.h> |
Yakir Yang | 9e32e16 | 2016-03-29 09:57:30 +0800 | [diff] [blame] | 18 | #include <linux/of_graph.h> |
| 19 | #include <linux/regmap.h> |
| 20 | #include <linux/reset.h> |
| 21 | #include <linux/clk.h> |
| 22 | |
| 23 | #include <drm/drmP.h> |
| 24 | #include <drm/drm_crtc_helper.h> |
| 25 | #include <drm/drm_dp_helper.h> |
| 26 | #include <drm/drm_of.h> |
| 27 | #include <drm/drm_panel.h> |
| 28 | |
| 29 | #include <video/of_videomode.h> |
| 30 | #include <video/videomode.h> |
| 31 | |
| 32 | #include <drm/bridge/analogix_dp.h> |
| 33 | |
| 34 | #include "rockchip_drm_drv.h" |
| 35 | #include "rockchip_drm_vop.h" |
| 36 | |
Yakir Yang | d9c900b | 2016-06-29 17:15:01 +0800 | [diff] [blame] | 37 | #define RK3288_GRF_SOC_CON6 0x25c |
| 38 | #define RK3288_EDP_LCDC_SEL BIT(5) |
Yakir Yang | 82872e4 | 2016-06-29 17:15:26 +0800 | [diff] [blame] | 39 | #define RK3399_GRF_SOC_CON20 0x6250 |
| 40 | #define RK3399_EDP_LCDC_SEL BIT(5) |
Yakir Yang | d9c900b | 2016-06-29 17:15:01 +0800 | [diff] [blame] | 41 | |
| 42 | #define HIWORD_UPDATE(val, mask) (val | (mask) << 16) |
| 43 | |
Yakir Yang | 9e32e16 | 2016-03-29 09:57:30 +0800 | [diff] [blame] | 44 | #define to_dp(nm) container_of(nm, struct rockchip_dp_device, nm) |
| 45 | |
Yakir Yang | d9c900b | 2016-06-29 17:15:01 +0800 | [diff] [blame] | 46 | /** |
| 47 | * struct rockchip_dp_chip_data - splite the grf setting of kind of chips |
| 48 | * @lcdsel_grf_reg: grf register offset of lcdc select |
| 49 | * @lcdsel_big: reg value of selecting vop big for eDP |
| 50 | * @lcdsel_lit: reg value of selecting vop little for eDP |
| 51 | * @chip_type: specific chip type |
| 52 | */ |
| 53 | struct rockchip_dp_chip_data { |
| 54 | u32 lcdsel_grf_reg; |
| 55 | u32 lcdsel_big; |
| 56 | u32 lcdsel_lit; |
| 57 | u32 chip_type; |
| 58 | }; |
Yakir Yang | 9e32e16 | 2016-03-29 09:57:30 +0800 | [diff] [blame] | 59 | |
| 60 | struct rockchip_dp_device { |
| 61 | struct drm_device *drm_dev; |
| 62 | struct device *dev; |
| 63 | struct drm_encoder encoder; |
| 64 | struct drm_display_mode mode; |
| 65 | |
| 66 | struct clk *pclk; |
| 67 | struct regmap *grf; |
| 68 | struct reset_control *rst; |
| 69 | |
Yakir Yang | d9c900b | 2016-06-29 17:15:01 +0800 | [diff] [blame] | 70 | const struct rockchip_dp_chip_data *data; |
| 71 | |
Yakir Yang | 9e32e16 | 2016-03-29 09:57:30 +0800 | [diff] [blame] | 72 | struct analogix_dp_plat_data plat_data; |
| 73 | }; |
| 74 | |
| 75 | static int rockchip_dp_pre_init(struct rockchip_dp_device *dp) |
| 76 | { |
| 77 | reset_control_assert(dp->rst); |
| 78 | usleep_range(10, 20); |
| 79 | reset_control_deassert(dp->rst); |
| 80 | |
| 81 | return 0; |
| 82 | } |
| 83 | |
| 84 | static int rockchip_dp_poweron(struct analogix_dp_plat_data *plat_data) |
| 85 | { |
| 86 | struct rockchip_dp_device *dp = to_dp(plat_data); |
| 87 | int ret; |
| 88 | |
| 89 | ret = clk_prepare_enable(dp->pclk); |
| 90 | if (ret < 0) { |
| 91 | dev_err(dp->dev, "failed to enable pclk %d\n", ret); |
| 92 | return ret; |
| 93 | } |
| 94 | |
| 95 | ret = rockchip_dp_pre_init(dp); |
| 96 | if (ret < 0) { |
| 97 | dev_err(dp->dev, "failed to dp pre init %d\n", ret); |
| 98 | return ret; |
| 99 | } |
| 100 | |
| 101 | return 0; |
| 102 | } |
| 103 | |
| 104 | static int rockchip_dp_powerdown(struct analogix_dp_plat_data *plat_data) |
| 105 | { |
| 106 | struct rockchip_dp_device *dp = to_dp(plat_data); |
| 107 | |
| 108 | clk_disable_unprepare(dp->pclk); |
| 109 | |
| 110 | return 0; |
| 111 | } |
| 112 | |
Yakir Yang | db8a9ae | 2016-06-29 17:15:39 +0800 | [diff] [blame^] | 113 | static int rockchip_dp_get_modes(struct analogix_dp_plat_data *plat_data, |
| 114 | struct drm_connector *connector) |
| 115 | { |
| 116 | struct drm_display_info *di = &connector->display_info; |
| 117 | /* VOP couldn't output YUV video format for eDP rightly */ |
| 118 | u32 mask = DRM_COLOR_FORMAT_YCRCB444 | DRM_COLOR_FORMAT_YCRCB422; |
| 119 | |
| 120 | if ((di->color_formats & mask)) { |
| 121 | DRM_DEBUG_KMS("Swapping display color format from YUV to RGB\n"); |
| 122 | di->color_formats &= ~mask; |
| 123 | di->color_formats |= DRM_COLOR_FORMAT_RGB444; |
| 124 | di->bpc = 8; |
| 125 | } |
| 126 | |
| 127 | return 0; |
| 128 | } |
| 129 | |
Yakir Yang | 9e32e16 | 2016-03-29 09:57:30 +0800 | [diff] [blame] | 130 | static bool |
| 131 | rockchip_dp_drm_encoder_mode_fixup(struct drm_encoder *encoder, |
| 132 | const struct drm_display_mode *mode, |
| 133 | struct drm_display_mode *adjusted_mode) |
| 134 | { |
| 135 | /* do nothing */ |
| 136 | return true; |
| 137 | } |
| 138 | |
| 139 | static void rockchip_dp_drm_encoder_mode_set(struct drm_encoder *encoder, |
| 140 | struct drm_display_mode *mode, |
| 141 | struct drm_display_mode *adjusted) |
| 142 | { |
| 143 | /* do nothing */ |
| 144 | } |
| 145 | |
| 146 | static void rockchip_dp_drm_encoder_enable(struct drm_encoder *encoder) |
| 147 | { |
| 148 | struct rockchip_dp_device *dp = to_dp(encoder); |
| 149 | int ret; |
| 150 | u32 val; |
| 151 | |
Yakir Yang | 9e32e16 | 2016-03-29 09:57:30 +0800 | [diff] [blame] | 152 | ret = drm_of_encoder_active_endpoint_id(dp->dev->of_node, encoder); |
| 153 | if (ret < 0) |
| 154 | return; |
| 155 | |
| 156 | if (ret) |
Yakir Yang | d9c900b | 2016-06-29 17:15:01 +0800 | [diff] [blame] | 157 | val = dp->data->lcdsel_lit; |
Yakir Yang | 9e32e16 | 2016-03-29 09:57:30 +0800 | [diff] [blame] | 158 | else |
Yakir Yang | d9c900b | 2016-06-29 17:15:01 +0800 | [diff] [blame] | 159 | val = dp->data->lcdsel_big; |
Yakir Yang | 9e32e16 | 2016-03-29 09:57:30 +0800 | [diff] [blame] | 160 | |
| 161 | dev_dbg(dp->dev, "vop %s output to dp\n", (ret) ? "LIT" : "BIG"); |
| 162 | |
Yakir Yang | d9c900b | 2016-06-29 17:15:01 +0800 | [diff] [blame] | 163 | ret = regmap_write(dp->grf, dp->data->lcdsel_grf_reg, val); |
Yakir Yang | 9e32e16 | 2016-03-29 09:57:30 +0800 | [diff] [blame] | 164 | if (ret != 0) { |
| 165 | dev_err(dp->dev, "Could not write to GRF: %d\n", ret); |
| 166 | return; |
| 167 | } |
| 168 | } |
| 169 | |
| 170 | static void rockchip_dp_drm_encoder_nop(struct drm_encoder *encoder) |
| 171 | { |
| 172 | /* do nothing */ |
| 173 | } |
| 174 | |
Mark Yao | 4e257d9 | 2016-04-20 10:41:42 +0800 | [diff] [blame] | 175 | static int |
| 176 | rockchip_dp_drm_encoder_atomic_check(struct drm_encoder *encoder, |
| 177 | struct drm_crtc_state *crtc_state, |
| 178 | struct drm_connector_state *conn_state) |
| 179 | { |
| 180 | struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc_state); |
Yakir Yang | 82872e4 | 2016-06-29 17:15:26 +0800 | [diff] [blame] | 181 | struct rockchip_dp_device *dp = to_dp(encoder); |
| 182 | int ret; |
Mark Yao | 4e257d9 | 2016-04-20 10:41:42 +0800 | [diff] [blame] | 183 | |
| 184 | /* |
| 185 | * FIXME(Yakir): driver should configure the CRTC output video |
| 186 | * mode with the display information which indicated the monitor |
| 187 | * support colorimetry. |
| 188 | * |
| 189 | * But don't know why the CRTC driver seems could only output the |
| 190 | * RGBaaa rightly. For example, if connect the "innolux,n116bge" |
| 191 | * eDP screen, EDID would indicated that screen only accepted the |
| 192 | * 6bpc mode. But if I configure CRTC to RGB666 output, then eDP |
| 193 | * screen would show a blue picture (RGB888 show a green picture). |
| 194 | * But if I configure CTRC to RGBaaa, and eDP driver still keep |
| 195 | * RGB666 input video mode, then screen would works prefect. |
| 196 | */ |
Yakir Yang | 82872e4 | 2016-06-29 17:15:26 +0800 | [diff] [blame] | 197 | |
Mark Yao | 4e257d9 | 2016-04-20 10:41:42 +0800 | [diff] [blame] | 198 | s->output_mode = ROCKCHIP_OUT_MODE_AAAA; |
| 199 | s->output_type = DRM_MODE_CONNECTOR_eDP; |
Yakir Yang | 82872e4 | 2016-06-29 17:15:26 +0800 | [diff] [blame] | 200 | if (dp->data->chip_type == RK3399_EDP) { |
| 201 | /* |
| 202 | * For RK3399, VOP Lit must code the out mode to RGB888, |
| 203 | * VOP Big must code the out mode to RGB10. |
| 204 | */ |
| 205 | ret = drm_of_encoder_active_endpoint_id(dp->dev->of_node, |
| 206 | encoder); |
| 207 | if (ret > 0) |
| 208 | s->output_mode = ROCKCHIP_OUT_MODE_P888; |
| 209 | } |
Mark Yao | 4e257d9 | 2016-04-20 10:41:42 +0800 | [diff] [blame] | 210 | |
| 211 | return 0; |
| 212 | } |
| 213 | |
Yakir Yang | 9e32e16 | 2016-03-29 09:57:30 +0800 | [diff] [blame] | 214 | static struct drm_encoder_helper_funcs rockchip_dp_encoder_helper_funcs = { |
| 215 | .mode_fixup = rockchip_dp_drm_encoder_mode_fixup, |
| 216 | .mode_set = rockchip_dp_drm_encoder_mode_set, |
| 217 | .enable = rockchip_dp_drm_encoder_enable, |
| 218 | .disable = rockchip_dp_drm_encoder_nop, |
Mark Yao | 4e257d9 | 2016-04-20 10:41:42 +0800 | [diff] [blame] | 219 | .atomic_check = rockchip_dp_drm_encoder_atomic_check, |
Yakir Yang | 9e32e16 | 2016-03-29 09:57:30 +0800 | [diff] [blame] | 220 | }; |
| 221 | |
| 222 | static void rockchip_dp_drm_encoder_destroy(struct drm_encoder *encoder) |
| 223 | { |
| 224 | drm_encoder_cleanup(encoder); |
| 225 | } |
| 226 | |
| 227 | static struct drm_encoder_funcs rockchip_dp_encoder_funcs = { |
| 228 | .destroy = rockchip_dp_drm_encoder_destroy, |
| 229 | }; |
| 230 | |
| 231 | static int rockchip_dp_init(struct rockchip_dp_device *dp) |
| 232 | { |
| 233 | struct device *dev = dp->dev; |
| 234 | struct device_node *np = dev->of_node; |
| 235 | int ret; |
| 236 | |
| 237 | dp->grf = syscon_regmap_lookup_by_phandle(np, "rockchip,grf"); |
| 238 | if (IS_ERR(dp->grf)) { |
| 239 | dev_err(dev, "failed to get rockchip,grf property\n"); |
| 240 | return PTR_ERR(dp->grf); |
| 241 | } |
| 242 | |
| 243 | dp->pclk = devm_clk_get(dev, "pclk"); |
| 244 | if (IS_ERR(dp->pclk)) { |
| 245 | dev_err(dev, "failed to get pclk property\n"); |
| 246 | return PTR_ERR(dp->pclk); |
| 247 | } |
| 248 | |
| 249 | dp->rst = devm_reset_control_get(dev, "dp"); |
| 250 | if (IS_ERR(dp->rst)) { |
| 251 | dev_err(dev, "failed to get dp reset control\n"); |
| 252 | return PTR_ERR(dp->rst); |
| 253 | } |
| 254 | |
| 255 | ret = clk_prepare_enable(dp->pclk); |
| 256 | if (ret < 0) { |
| 257 | dev_err(dp->dev, "failed to enable pclk %d\n", ret); |
| 258 | return ret; |
| 259 | } |
| 260 | |
| 261 | ret = rockchip_dp_pre_init(dp); |
| 262 | if (ret < 0) { |
| 263 | dev_err(dp->dev, "failed to pre init %d\n", ret); |
| 264 | return ret; |
| 265 | } |
| 266 | |
| 267 | return 0; |
| 268 | } |
| 269 | |
| 270 | static int rockchip_dp_drm_create_encoder(struct rockchip_dp_device *dp) |
| 271 | { |
| 272 | struct drm_encoder *encoder = &dp->encoder; |
| 273 | struct drm_device *drm_dev = dp->drm_dev; |
| 274 | struct device *dev = dp->dev; |
| 275 | int ret; |
| 276 | |
| 277 | encoder->possible_crtcs = drm_of_find_possible_crtcs(drm_dev, |
| 278 | dev->of_node); |
| 279 | DRM_DEBUG_KMS("possible_crtcs = 0x%x\n", encoder->possible_crtcs); |
| 280 | |
| 281 | ret = drm_encoder_init(drm_dev, encoder, &rockchip_dp_encoder_funcs, |
| 282 | DRM_MODE_ENCODER_TMDS, NULL); |
| 283 | if (ret) { |
| 284 | DRM_ERROR("failed to initialize encoder with drm\n"); |
| 285 | return ret; |
| 286 | } |
| 287 | |
| 288 | drm_encoder_helper_add(encoder, &rockchip_dp_encoder_helper_funcs); |
| 289 | |
| 290 | return 0; |
| 291 | } |
| 292 | |
| 293 | static int rockchip_dp_bind(struct device *dev, struct device *master, |
| 294 | void *data) |
| 295 | { |
| 296 | struct rockchip_dp_device *dp = dev_get_drvdata(dev); |
Yakir Yang | d9c900b | 2016-06-29 17:15:01 +0800 | [diff] [blame] | 297 | const struct rockchip_dp_chip_data *dp_data; |
Yakir Yang | 9e32e16 | 2016-03-29 09:57:30 +0800 | [diff] [blame] | 298 | struct drm_device *drm_dev = data; |
| 299 | int ret; |
| 300 | |
| 301 | /* |
| 302 | * Just like the probe function said, we don't need the |
| 303 | * device drvrate anymore, we should leave the charge to |
| 304 | * analogix dp driver, set the device drvdata to NULL. |
| 305 | */ |
| 306 | dev_set_drvdata(dev, NULL); |
| 307 | |
Yakir Yang | d9c900b | 2016-06-29 17:15:01 +0800 | [diff] [blame] | 308 | dp_data = of_device_get_match_data(dev); |
| 309 | if (!dp_data) |
| 310 | return -ENODEV; |
| 311 | |
Yakir Yang | 9e32e16 | 2016-03-29 09:57:30 +0800 | [diff] [blame] | 312 | ret = rockchip_dp_init(dp); |
| 313 | if (ret < 0) |
| 314 | return ret; |
| 315 | |
Yakir Yang | d9c900b | 2016-06-29 17:15:01 +0800 | [diff] [blame] | 316 | dp->data = dp_data; |
Yakir Yang | 9e32e16 | 2016-03-29 09:57:30 +0800 | [diff] [blame] | 317 | dp->drm_dev = drm_dev; |
| 318 | |
| 319 | ret = rockchip_dp_drm_create_encoder(dp); |
| 320 | if (ret) { |
| 321 | DRM_ERROR("failed to create drm encoder\n"); |
| 322 | return ret; |
| 323 | } |
| 324 | |
| 325 | dp->plat_data.encoder = &dp->encoder; |
| 326 | |
Yakir Yang | d9c900b | 2016-06-29 17:15:01 +0800 | [diff] [blame] | 327 | dp->plat_data.dev_type = dp->data->chip_type; |
Yakir Yang | 9e32e16 | 2016-03-29 09:57:30 +0800 | [diff] [blame] | 328 | dp->plat_data.power_on = rockchip_dp_poweron; |
| 329 | dp->plat_data.power_off = rockchip_dp_powerdown; |
Yakir Yang | db8a9ae | 2016-06-29 17:15:39 +0800 | [diff] [blame^] | 330 | dp->plat_data.get_modes = rockchip_dp_get_modes; |
Yakir Yang | 9e32e16 | 2016-03-29 09:57:30 +0800 | [diff] [blame] | 331 | |
| 332 | return analogix_dp_bind(dev, dp->drm_dev, &dp->plat_data); |
| 333 | } |
| 334 | |
| 335 | static void rockchip_dp_unbind(struct device *dev, struct device *master, |
| 336 | void *data) |
| 337 | { |
| 338 | return analogix_dp_unbind(dev, master, data); |
| 339 | } |
| 340 | |
| 341 | static const struct component_ops rockchip_dp_component_ops = { |
| 342 | .bind = rockchip_dp_bind, |
| 343 | .unbind = rockchip_dp_unbind, |
| 344 | }; |
| 345 | |
| 346 | static int rockchip_dp_probe(struct platform_device *pdev) |
| 347 | { |
| 348 | struct device *dev = &pdev->dev; |
| 349 | struct device_node *panel_node, *port, *endpoint; |
Yakir Yang | eb87c91 | 2016-06-29 17:15:30 +0800 | [diff] [blame] | 350 | struct drm_panel *panel = NULL; |
Yakir Yang | 9e32e16 | 2016-03-29 09:57:30 +0800 | [diff] [blame] | 351 | struct rockchip_dp_device *dp; |
Yakir Yang | 9e32e16 | 2016-03-29 09:57:30 +0800 | [diff] [blame] | 352 | |
| 353 | port = of_graph_get_port_by_id(dev->of_node, 1); |
Yakir Yang | eb87c91 | 2016-06-29 17:15:30 +0800 | [diff] [blame] | 354 | if (port) { |
| 355 | endpoint = of_get_child_by_name(port, "endpoint"); |
| 356 | of_node_put(port); |
| 357 | if (!endpoint) { |
| 358 | dev_err(dev, "no output endpoint found\n"); |
| 359 | return -EINVAL; |
| 360 | } |
Yakir Yang | 9e32e16 | 2016-03-29 09:57:30 +0800 | [diff] [blame] | 361 | |
Yakir Yang | eb87c91 | 2016-06-29 17:15:30 +0800 | [diff] [blame] | 362 | panel_node = of_graph_get_remote_port_parent(endpoint); |
| 363 | of_node_put(endpoint); |
| 364 | if (!panel_node) { |
| 365 | dev_err(dev, "no output node found\n"); |
| 366 | return -EINVAL; |
| 367 | } |
Yakir Yang | 9e32e16 | 2016-03-29 09:57:30 +0800 | [diff] [blame] | 368 | |
Yakir Yang | eb87c91 | 2016-06-29 17:15:30 +0800 | [diff] [blame] | 369 | panel = of_drm_find_panel(panel_node); |
Yakir Yang | 9e32e16 | 2016-03-29 09:57:30 +0800 | [diff] [blame] | 370 | of_node_put(panel_node); |
Yakir Yang | eb87c91 | 2016-06-29 17:15:30 +0800 | [diff] [blame] | 371 | if (!panel) { |
| 372 | DRM_ERROR("failed to find panel\n"); |
| 373 | return -EPROBE_DEFER; |
| 374 | } |
Yakir Yang | 9e32e16 | 2016-03-29 09:57:30 +0800 | [diff] [blame] | 375 | } |
| 376 | |
Yakir Yang | 9e32e16 | 2016-03-29 09:57:30 +0800 | [diff] [blame] | 377 | dp = devm_kzalloc(dev, sizeof(*dp), GFP_KERNEL); |
| 378 | if (!dp) |
| 379 | return -ENOMEM; |
| 380 | |
| 381 | dp->dev = dev; |
| 382 | |
| 383 | dp->plat_data.panel = panel; |
| 384 | |
| 385 | /* |
| 386 | * We just use the drvdata until driver run into component |
| 387 | * add function, and then we would set drvdata to null, so |
| 388 | * that analogix dp driver could take charge of the drvdata. |
| 389 | */ |
| 390 | platform_set_drvdata(pdev, dp); |
| 391 | |
| 392 | return component_add(dev, &rockchip_dp_component_ops); |
| 393 | } |
| 394 | |
| 395 | static int rockchip_dp_remove(struct platform_device *pdev) |
| 396 | { |
| 397 | component_del(&pdev->dev, &rockchip_dp_component_ops); |
| 398 | |
| 399 | return 0; |
| 400 | } |
| 401 | |
Yakir Yang | 9e32e16 | 2016-03-29 09:57:30 +0800 | [diff] [blame] | 402 | static const struct dev_pm_ops rockchip_dp_pm_ops = { |
Tomeu Vizoso | fe64ba5 | 2016-06-06 16:53:33 +0200 | [diff] [blame] | 403 | #ifdef CONFIG_PM_SLEEP |
| 404 | .suspend = analogix_dp_suspend, |
| 405 | .resume_early = analogix_dp_resume, |
| 406 | #endif |
Yakir Yang | 9e32e16 | 2016-03-29 09:57:30 +0800 | [diff] [blame] | 407 | }; |
| 408 | |
Yakir Yang | 82872e4 | 2016-06-29 17:15:26 +0800 | [diff] [blame] | 409 | static const struct rockchip_dp_chip_data rk3399_edp = { |
| 410 | .lcdsel_grf_reg = RK3399_GRF_SOC_CON20, |
| 411 | .lcdsel_big = HIWORD_UPDATE(0, RK3399_EDP_LCDC_SEL), |
| 412 | .lcdsel_lit = HIWORD_UPDATE(RK3399_EDP_LCDC_SEL, RK3399_EDP_LCDC_SEL), |
| 413 | .chip_type = RK3399_EDP, |
| 414 | }; |
| 415 | |
Yakir Yang | d9c900b | 2016-06-29 17:15:01 +0800 | [diff] [blame] | 416 | static const struct rockchip_dp_chip_data rk3288_dp = { |
| 417 | .lcdsel_grf_reg = RK3288_GRF_SOC_CON6, |
| 418 | .lcdsel_big = HIWORD_UPDATE(0, RK3288_EDP_LCDC_SEL), |
| 419 | .lcdsel_lit = HIWORD_UPDATE(RK3288_EDP_LCDC_SEL, RK3288_EDP_LCDC_SEL), |
| 420 | .chip_type = RK3288_DP, |
| 421 | }; |
| 422 | |
Yakir Yang | 9e32e16 | 2016-03-29 09:57:30 +0800 | [diff] [blame] | 423 | static const struct of_device_id rockchip_dp_dt_ids[] = { |
Yakir Yang | d9c900b | 2016-06-29 17:15:01 +0800 | [diff] [blame] | 424 | {.compatible = "rockchip,rk3288-dp", .data = &rk3288_dp }, |
Yakir Yang | 82872e4 | 2016-06-29 17:15:26 +0800 | [diff] [blame] | 425 | {.compatible = "rockchip,rk3399-edp", .data = &rk3399_edp }, |
Yakir Yang | 9e32e16 | 2016-03-29 09:57:30 +0800 | [diff] [blame] | 426 | {} |
| 427 | }; |
| 428 | MODULE_DEVICE_TABLE(of, rockchip_dp_dt_ids); |
| 429 | |
| 430 | static struct platform_driver rockchip_dp_driver = { |
| 431 | .probe = rockchip_dp_probe, |
| 432 | .remove = rockchip_dp_remove, |
| 433 | .driver = { |
| 434 | .name = "rockchip-dp", |
| 435 | .owner = THIS_MODULE, |
| 436 | .pm = &rockchip_dp_pm_ops, |
| 437 | .of_match_table = of_match_ptr(rockchip_dp_dt_ids), |
| 438 | }, |
| 439 | }; |
| 440 | |
| 441 | module_platform_driver(rockchip_dp_driver); |
| 442 | |
| 443 | MODULE_AUTHOR("Yakir Yang <ykk@rock-chips.com>"); |
| 444 | MODULE_AUTHOR("Jeff chen <jeff.chen@rock-chips.com>"); |
| 445 | MODULE_DESCRIPTION("Rockchip Specific Analogix-DP Driver Extension"); |
| 446 | MODULE_LICENSE("GPL v2"); |