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Jerome Anand5dab11d2017-01-25 04:27:52 +05301/*
2 * Copyright (C) 2016 Intel Corporation
3 * Authors: Sailaja Bandarupalli <sailaja.bandarupalli@intel.com>
4 * Ramesh Babu K V <ramesh.babu@intel.com>
5 * Vaibhav Agarwal <vaibhav.agarwal@intel.com>
6 * Jerome Anand <jerome.anand@intel.com>
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining
9 * a copy of this software and associated documentation files
10 * (the "Software"), to deal in the Software without restriction,
11 * including without limitation the rights to use, copy, modify, merge,
12 * publish, distribute, sublicense, and/or sell copies of the Software,
13 * and to permit persons to whom the Software is furnished to do so,
14 * subject to the following conditions:
15 *
16 * The above copyright notice and this permission notice (including the
17 * next paragraph) shall be included in all copies or substantial
18 * portions of the Software.
19 *
20 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
21 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
23 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
24 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
25 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
26 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
27 * SOFTWARE.
28 */
29
30#ifndef _INTEL_HDMI_AUDIO_H_
31#define _INTEL_HDMI_AUDIO_H_
32
33#include <linux/types.h>
34#include <sound/initval.h>
35#include <linux/version.h>
36#include <linux/pm_runtime.h>
37#include <sound/asoundef.h>
38#include <sound/control.h>
39#include <sound/pcm.h>
40#include "intel_hdmi_lpe_audio.h"
41
Takashi Iwai79dda752017-01-30 17:23:39 +010042struct platform_device;
43
Jerome Anand5dab11d2017-01-25 04:27:52 +053044#define PCM_INDEX 0
45#define MAX_PB_STREAMS 1
46#define MAX_CAP_STREAMS 0
47#define HDMI_AUDIO_DRIVER "hdmi-audio"
48
Pierre-Louis Bossart964ca802017-01-31 14:16:52 -060049#define HDMI_INFO_FRAME_WORD1 0x000a0184
50#define DP_INFO_FRAME_WORD1 0x00441b84
Jerome Anand5dab11d2017-01-25 04:27:52 +053051#define FIFO_THRESHOLD 0xFE
52#define DMA_FIFO_THRESHOLD 0x7
53#define BYTES_PER_WORD 0x4
54
55/* Sampling rate as per IEC60958 Ver 3 */
56#define CH_STATUS_MAP_32KHZ 0x3
57#define CH_STATUS_MAP_44KHZ 0x0
58#define CH_STATUS_MAP_48KHZ 0x2
59#define CH_STATUS_MAP_88KHZ 0x8
60#define CH_STATUS_MAP_96KHZ 0xA
61#define CH_STATUS_MAP_176KHZ 0xC
62#define CH_STATUS_MAP_192KHZ 0xE
63
64#define MAX_SMPL_WIDTH_20 0x0
65#define MAX_SMPL_WIDTH_24 0x1
66#define SMPL_WIDTH_16BITS 0x1
67#define SMPL_WIDTH_24BITS 0x5
68#define CHANNEL_ALLOCATION 0x1F
69#define MASK_BYTE0 0x000000FF
70#define VALID_DIP_WORDS 3
71#define LAYOUT0 0
72#define LAYOUT1 1
73#define SWAP_LFE_CENTER 0x00fac4c8
74#define AUD_CONFIG_CH_MASK_V2 0x70
75
76struct pcm_stream_info {
77 int str_id;
78 void *had_substream;
79 void (*period_elapsed)(void *had_substream);
80 u32 buffer_ptr;
81 u64 buffer_rendered;
82 u32 ring_buf_size;
83 int sfreq;
84};
85
86struct ring_buf_info {
87 u32 buf_addr;
88 u32 buf_size;
89 u8 is_valid;
90};
91
92struct had_stream_pvt {
93 enum had_stream_status stream_status;
94 int stream_ops;
95 ssize_t dbg_cum_bytes;
96};
97
Takashi Iwai5647aec2017-01-31 08:14:34 +010098struct had_stream_data {
Jerome Anand5dab11d2017-01-25 04:27:52 +053099 enum had_status_stream stream_type;
100};
101
Jerome Anand5dab11d2017-01-25 04:27:52 +0530102/**
103 * struct snd_intelhad - intelhad driver structure
104 *
105 * @card: ptr to hold card details
106 * @card_index: sound card index
107 * @card_id: detected sound card id
Jerome Anand5dab11d2017-01-25 04:27:52 +0530108 * @drv_status: driver status
109 * @buf_info: ring buffer info
110 * @stream_info: stream information
Takashi Iwaida864802017-01-31 13:52:22 +0100111 * @eld: holds ELD info
Jerome Anand5dab11d2017-01-25 04:27:52 +0530112 * @curr_buf: pointer to hold current active ring buf
113 * @valid_buf_cnt: ring buffer count for stream
114 * @had_spinlock: driver lock
115 * @aes_bits: IEC958 status bits
116 * @buff_done: id of current buffer done intr
117 * @dev: platoform device handle
118 * @kctl: holds kctl ptrs used for channel map
119 * @chmap: holds channel map info
120 * @audio_reg_base: hdmi audio register base offset
Takashi Iwai6ddb3ab2017-01-30 18:17:44 +0100121 * @underrun_count: PCM stream underrun counter
Jerome Anand5dab11d2017-01-25 04:27:52 +0530122 */
123struct snd_intelhad {
124 struct snd_card *card;
125 int card_index;
126 char *card_id;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530127 enum had_drv_status drv_status;
128 struct ring_buf_info buf_info[HAD_NUM_OF_RING_BUFS];
129 struct pcm_stream_info stream_info;
Takashi Iwaida864802017-01-31 13:52:22 +0100130 union otm_hdmi_eld_t eld;
Pierre-Louis Bossart964ca802017-01-31 14:16:52 -0600131 bool dp_output;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530132 enum intel_had_aud_buf_type curr_buf;
133 int valid_buf_cnt;
134 unsigned int aes_bits;
135 int flag_underrun;
Takashi Iwai5647aec2017-01-31 08:14:34 +0100136 struct had_stream_data stream_data;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530137 spinlock_t had_spinlock;
138 enum intel_had_aud_buf_type buff_done;
139 struct device *dev;
140 struct snd_kcontrol *kctl;
141 struct snd_pcm_chmap *chmap;
142 unsigned int *audio_reg_base;
143 unsigned int audio_cfg_offset;
Takashi Iwai6ddb3ab2017-01-30 18:17:44 +0100144 int underrun_count;
Takashi Iwaida864802017-01-31 13:52:22 +0100145 enum hdmi_connector_status state;
146 int tmds_clock_speed;
147 int link_rate;
148
149 /* internal stuff */
150 int irq;
151 void __iomem *mmio_start;
152 unsigned int had_config_offset;
153 int hdmi_audio_interrupt_mask;
154 struct work_struct hdmi_audio_wq;
Jerome Anand5dab11d2017-01-25 04:27:52 +0530155};
156
Takashi Iwaida864802017-01-31 13:52:22 +0100157int hdmi_lpe_audio_suspend(struct platform_device *pdev, pm_message_t state);
158int hdmi_lpe_audio_resume(struct platform_device *pdev);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530159extern struct snd_pcm_ops snd_intelhad_playback_ops;
160
Takashi Iwaida864802017-01-31 13:52:22 +0100161int had_process_buffer_done(struct snd_intelhad *intelhaddata);
162int had_process_buffer_underrun(struct snd_intelhad *intelhaddata);
163int had_process_hot_plug(struct snd_intelhad *intelhaddata);
164int had_process_hot_unplug(struct snd_intelhad *intelhaddata);
165
Jerome Anand5dab11d2017-01-25 04:27:52 +0530166int snd_intelhad_init_audio_ctrl(struct snd_pcm_substream *substream,
167 struct snd_intelhad *intelhaddata,
168 int flag_silence);
169int snd_intelhad_prog_buffer(struct snd_intelhad *intelhaddata,
170 int start, int end);
171int snd_intelhad_invd_buffer(int start, int end);
172int snd_intelhad_read_len(struct snd_intelhad *intelhaddata);
173void had_build_channel_allocation_map(struct snd_intelhad *intelhaddata);
174
Takashi Iwaida864802017-01-31 13:52:22 +0100175void snd_intelhad_enable_audio_int(struct snd_intelhad *ctx, bool enable);
176void snd_intelhad_enable_audio(struct snd_intelhad *ctx, bool enable);
Takashi Iwai76296ef2017-01-30 16:09:11 +0100177void snd_intelhad_handle_underrun(struct snd_intelhad *intelhaddata);
178
Jerome Anand5dab11d2017-01-25 04:27:52 +0530179/* Register access functions */
180int had_get_hwstate(struct snd_intelhad *intelhaddata);
Takashi Iwai79dda752017-01-30 17:23:39 +0100181int had_read_register(struct snd_intelhad *intelhaddata,
182 u32 reg_addr, u32 *data);
183int had_write_register(struct snd_intelhad *intelhaddata,
184 u32 reg_addr, u32 data);
185int had_read_modify(struct snd_intelhad *intelhaddata,
186 u32 reg_addr, u32 data, u32 mask);
Jerome Anand5dab11d2017-01-25 04:27:52 +0530187
Jerome Anand5dab11d2017-01-25 04:27:52 +0530188#endif /* _INTEL_HDMI_AUDIO_ */