blob: 28bce9be30bc3a200d0e9fd8237e020be092a1a8 [file] [log] [blame]
Felipe Balbi72246da2011-08-19 18:10:58 +03001/**
2 * ep0.c - DesignWare USB3 DRD Controller Endpoint 0 Handling
3 *
4 * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com
Felipe Balbi72246da2011-08-19 18:10:58 +03005 *
6 * Authors: Felipe Balbi <balbi@ti.com>,
7 * Sebastian Andrzej Siewior <bigeasy@linutronix.de>
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions, and the following disclaimer,
14 * without modification.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. The names of the above-listed copyright holders may not be used
19 * to endorse or promote products derived from this software without
20 * specific prior written permission.
21 *
22 * ALTERNATIVELY, this software may be distributed under the terms of the
23 * GNU General Public License ("GPL") version 2, as published by the Free
24 * Software Foundation.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
27 * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
28 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
30 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
31 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
32 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
33 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
34 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
35 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
36 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37 */
38
39#include <linux/kernel.h>
40#include <linux/slab.h>
41#include <linux/spinlock.h>
42#include <linux/platform_device.h>
43#include <linux/pm_runtime.h>
44#include <linux/interrupt.h>
45#include <linux/io.h>
46#include <linux/list.h>
47#include <linux/dma-mapping.h>
48
49#include <linux/usb/ch9.h>
50#include <linux/usb/gadget.h>
Sebastian Andrzej Siewior5bdb1dc2011-11-02 13:30:45 +010051#include <linux/usb/composite.h>
Felipe Balbi72246da2011-08-19 18:10:58 +030052
53#include "core.h"
54#include "gadget.h"
55#include "io.h"
56
Felipe Balbi788a23f2012-05-21 14:22:41 +030057static void __dwc3_ep0_do_control_status(struct dwc3 *dwc, struct dwc3_ep *dep);
Felipe Balbia0807882012-05-04 13:03:54 +030058static void __dwc3_ep0_do_control_data(struct dwc3 *dwc,
59 struct dwc3_ep *dep, struct dwc3_request *req);
Sebastian Andrzej Siewior5bdb1dc2011-11-02 13:30:45 +010060
Felipe Balbi72246da2011-08-19 18:10:58 +030061static const char *dwc3_ep0_state_string(enum dwc3_ep0_state state)
62{
63 switch (state) {
64 case EP0_UNCONNECTED:
65 return "Unconnected";
Felipe Balbic7fcdeb2011-08-27 22:28:36 +030066 case EP0_SETUP_PHASE:
67 return "Setup Phase";
68 case EP0_DATA_PHASE:
69 return "Data Phase";
70 case EP0_STATUS_PHASE:
71 return "Status Phase";
Felipe Balbi72246da2011-08-19 18:10:58 +030072 default:
73 return "UNKNOWN";
74 }
75}
76
77static int dwc3_ep0_start_trans(struct dwc3 *dwc, u8 epnum, dma_addr_t buf_dma,
Felipe Balbic7fcdeb2011-08-27 22:28:36 +030078 u32 len, u32 type)
Felipe Balbi72246da2011-08-19 18:10:58 +030079{
80 struct dwc3_gadget_ep_cmd_params params;
Felipe Balbif6bafc62012-02-06 11:04:53 +020081 struct dwc3_trb *trb;
Felipe Balbi72246da2011-08-19 18:10:58 +030082 struct dwc3_ep *dep;
83
84 int ret;
85
86 dep = dwc->eps[epnum];
Felipe Balbic7fcdeb2011-08-27 22:28:36 +030087 if (dep->flags & DWC3_EP_BUSY) {
88 dev_vdbg(dwc->dev, "%s: still busy\n", dep->name);
89 return 0;
90 }
Felipe Balbi72246da2011-08-19 18:10:58 +030091
Felipe Balbif6bafc62012-02-06 11:04:53 +020092 trb = dwc->ep0_trb;
Felipe Balbi72246da2011-08-19 18:10:58 +030093
Felipe Balbif6bafc62012-02-06 11:04:53 +020094 trb->bpl = lower_32_bits(buf_dma);
95 trb->bph = upper_32_bits(buf_dma);
96 trb->size = len;
97 trb->ctrl = type;
Felipe Balbi72246da2011-08-19 18:10:58 +030098
Felipe Balbif6bafc62012-02-06 11:04:53 +020099 trb->ctrl |= (DWC3_TRB_CTRL_HWO
100 | DWC3_TRB_CTRL_LST
101 | DWC3_TRB_CTRL_IOC
102 | DWC3_TRB_CTRL_ISP_IMI);
Felipe Balbi72246da2011-08-19 18:10:58 +0300103
104 memset(&params, 0, sizeof(params));
Felipe Balbidc1c70a2011-09-30 10:58:51 +0300105 params.param0 = upper_32_bits(dwc->ep0_trb_addr);
106 params.param1 = lower_32_bits(dwc->ep0_trb_addr);
Felipe Balbi72246da2011-08-19 18:10:58 +0300107
108 ret = dwc3_send_gadget_ep_cmd(dwc, dep->number,
109 DWC3_DEPCMD_STARTTRANSFER, &params);
110 if (ret < 0) {
111 dev_dbg(dwc->dev, "failed to send STARTTRANSFER command\n");
112 return ret;
113 }
114
Felipe Balbic7fcdeb2011-08-27 22:28:36 +0300115 dep->flags |= DWC3_EP_BUSY;
Felipe Balbib4996a82012-06-06 12:04:13 +0300116 dep->resource_index = dwc3_gadget_ep_get_transfer_index(dwc,
Felipe Balbi72246da2011-08-19 18:10:58 +0300117 dep->number);
118
Felipe Balbi1ddcb212011-08-30 15:52:17 +0300119 dwc->ep0_next_event = DWC3_EP0_COMPLETE;
120
Felipe Balbi72246da2011-08-19 18:10:58 +0300121 return 0;
122}
123
124static int __dwc3_gadget_ep0_queue(struct dwc3_ep *dep,
125 struct dwc3_request *req)
126{
Sebastian Andrzej Siewior5bdb1dc2011-11-02 13:30:45 +0100127 struct dwc3 *dwc = dep->dwc;
Felipe Balbi72246da2011-08-19 18:10:58 +0300128
129 req->request.actual = 0;
130 req->request.status = -EINPROGRESS;
Felipe Balbi72246da2011-08-19 18:10:58 +0300131 req->epnum = dep->number;
132
133 list_add_tail(&req->list, &dep->request_list);
Felipe Balbi72246da2011-08-19 18:10:58 +0300134
Felipe Balbic7fcdeb2011-08-27 22:28:36 +0300135 /*
136 * Gadget driver might not be quick enough to queue a request
137 * before we get a Transfer Not Ready event on this endpoint.
138 *
139 * In that case, we will set DWC3_EP_PENDING_REQUEST. When that
140 * flag is set, it's telling us that as soon as Gadget queues the
141 * required request, we should kick the transfer here because the
142 * IRQ we were waiting for is long gone.
143 */
144 if (dep->flags & DWC3_EP_PENDING_REQUEST) {
Felipe Balbic7fcdeb2011-08-27 22:28:36 +0300145 unsigned direction;
Felipe Balbia6829702011-08-27 22:18:09 +0300146
Felipe Balbic7fcdeb2011-08-27 22:28:36 +0300147 direction = !!(dep->flags & DWC3_EP0_DIR_IN);
Felipe Balbia6829702011-08-27 22:18:09 +0300148
Felipe Balbi68d8a782011-12-29 06:32:29 +0200149 if (dwc->ep0state != EP0_DATA_PHASE) {
150 dev_WARN(dwc->dev, "Unexpected pending request\n");
Felipe Balbic7fcdeb2011-08-27 22:28:36 +0300151 return 0;
152 }
Felipe Balbia6829702011-08-27 22:18:09 +0300153
Felipe Balbia0807882012-05-04 13:03:54 +0300154 __dwc3_ep0_do_control_data(dwc, dwc->eps[direction], req);
155
Felipe Balbic7fcdeb2011-08-27 22:28:36 +0300156 dep->flags &= ~(DWC3_EP_PENDING_REQUEST |
157 DWC3_EP0_DIR_IN);
Felipe Balbid9b33c62012-07-19 08:51:13 +0300158
159 return 0;
160 }
161
162 /*
163 * In case gadget driver asked us to delay the STATUS phase,
164 * handle it here.
165 */
166 if (dwc->delayed_status) {
Sebastian Andrzej Siewior5bdb1dc2011-11-02 13:30:45 +0100167 dwc->delayed_status = false;
Felipe Balbi68d3e662011-12-08 13:56:27 +0200168
169 if (dwc->ep0state == EP0_STATUS_PHASE)
Felipe Balbi788a23f2012-05-21 14:22:41 +0300170 __dwc3_ep0_do_control_status(dwc, dwc->eps[1]);
Felipe Balbi68d3e662011-12-08 13:56:27 +0200171 else
172 dev_dbg(dwc->dev, "too early for delayed status\n");
Felipe Balbid9b33c62012-07-19 08:51:13 +0300173
174 return 0;
Felipe Balbi72246da2011-08-19 18:10:58 +0300175 }
176
Felipe Balbi35f75692012-07-19 08:49:01 +0300177 return 0;
Felipe Balbi72246da2011-08-19 18:10:58 +0300178}
179
180int dwc3_gadget_ep0_queue(struct usb_ep *ep, struct usb_request *request,
181 gfp_t gfp_flags)
182{
183 struct dwc3_request *req = to_dwc3_request(request);
184 struct dwc3_ep *dep = to_dwc3_ep(ep);
185 struct dwc3 *dwc = dep->dwc;
186
187 unsigned long flags;
188
189 int ret;
190
Felipe Balbi72246da2011-08-19 18:10:58 +0300191 spin_lock_irqsave(&dwc->lock, flags);
Ido Shayevitz16e78db2012-03-12 20:25:24 +0200192 if (!dep->endpoint.desc) {
Felipe Balbi72246da2011-08-19 18:10:58 +0300193 dev_dbg(dwc->dev, "trying to queue request %p to disabled %s\n",
194 request, dep->name);
195 ret = -ESHUTDOWN;
196 goto out;
197 }
198
199 /* we share one TRB for ep0/1 */
Sebastian Andrzej Siewiorc2da2ff2011-10-20 19:04:16 +0200200 if (!list_empty(&dep->request_list)) {
Felipe Balbi72246da2011-08-19 18:10:58 +0300201 ret = -EBUSY;
202 goto out;
203 }
204
205 dev_vdbg(dwc->dev, "queueing request %p to %s length %d, state '%s'\n",
206 request, dep->name, request->length,
207 dwc3_ep0_state_string(dwc->ep0state));
208
209 ret = __dwc3_gadget_ep0_queue(dep, req);
210
211out:
212 spin_unlock_irqrestore(&dwc->lock, flags);
213
214 return ret;
215}
216
217static void dwc3_ep0_stall_and_restart(struct dwc3 *dwc)
218{
Felipe Balbid7422202011-09-08 18:17:12 +0300219 struct dwc3_ep *dep = dwc->eps[0];
220
Felipe Balbi72246da2011-08-19 18:10:58 +0300221 /* stall is always issued on EP0 */
Sebastian Andrzej Siewiorc2da2ff2011-10-20 19:04:16 +0200222 __dwc3_gadget_ep_set_halt(dep, 1);
223 dep->flags = DWC3_EP_ENABLED;
Sebastian Andrzej Siewior5bdb1dc2011-11-02 13:30:45 +0100224 dwc->delayed_status = false;
Felipe Balbid7422202011-09-08 18:17:12 +0300225
226 if (!list_empty(&dep->request_list)) {
227 struct dwc3_request *req;
228
229 req = next_request(&dep->request_list);
230 dwc3_gadget_giveback(dep, req, -ECONNRESET);
231 }
232
Felipe Balbic7fcdeb2011-08-27 22:28:36 +0300233 dwc->ep0state = EP0_SETUP_PHASE;
Felipe Balbi72246da2011-08-19 18:10:58 +0300234 dwc3_ep0_out_start(dwc);
235}
236
Pratyush Anand08f0d962012-06-25 22:40:43 +0530237int dwc3_gadget_ep0_set_halt(struct usb_ep *ep, int value)
238{
239 struct dwc3_ep *dep = to_dwc3_ep(ep);
240 struct dwc3 *dwc = dep->dwc;
241
242 dwc3_ep0_stall_and_restart(dwc);
243
244 return 0;
245}
246
Felipe Balbi72246da2011-08-19 18:10:58 +0300247void dwc3_ep0_out_start(struct dwc3 *dwc)
248{
Felipe Balbi72246da2011-08-19 18:10:58 +0300249 int ret;
250
Felipe Balbic7fcdeb2011-08-27 22:28:36 +0300251 ret = dwc3_ep0_start_trans(dwc, 0, dwc->ctrl_req_addr, 8,
252 DWC3_TRBCTL_CONTROL_SETUP);
Felipe Balbi72246da2011-08-19 18:10:58 +0300253 WARN_ON(ret < 0);
254}
255
Felipe Balbi72246da2011-08-19 18:10:58 +0300256static struct dwc3_ep *dwc3_wIndex_to_dep(struct dwc3 *dwc, __le16 wIndex_le)
257{
258 struct dwc3_ep *dep;
259 u32 windex = le16_to_cpu(wIndex_le);
260 u32 epnum;
261
262 epnum = (windex & USB_ENDPOINT_NUMBER_MASK) << 1;
263 if ((windex & USB_ENDPOINT_DIR_MASK) == USB_DIR_IN)
264 epnum |= 1;
265
266 dep = dwc->eps[epnum];
267 if (dep->flags & DWC3_EP_ENABLED)
268 return dep;
269
270 return NULL;
271}
272
Sebastian Andrzej Siewior8ee62702011-10-18 19:13:29 +0200273static void dwc3_ep0_status_cmpl(struct usb_ep *ep, struct usb_request *req)
Felipe Balbi72246da2011-08-19 18:10:58 +0300274{
Felipe Balbi72246da2011-08-19 18:10:58 +0300275}
Felipe Balbi72246da2011-08-19 18:10:58 +0300276/*
277 * ch 9.4.5
278 */
Felipe Balbi25b8ff62011-11-04 12:32:47 +0200279static int dwc3_ep0_handle_status(struct dwc3 *dwc,
280 struct usb_ctrlrequest *ctrl)
Felipe Balbi72246da2011-08-19 18:10:58 +0300281{
282 struct dwc3_ep *dep;
283 u32 recip;
Sebastian Andrzej Siewiore6a3b5e2011-09-13 17:54:39 +0200284 u32 reg;
Felipe Balbi72246da2011-08-19 18:10:58 +0300285 u16 usb_status = 0;
286 __le16 *response_pkt;
287
288 recip = ctrl->bRequestType & USB_RECIP_MASK;
289 switch (recip) {
290 case USB_RECIP_DEVICE:
291 /*
Sebastian Andrzej Siewiore6a3b5e2011-09-13 17:54:39 +0200292 * LTM will be set once we know how to set this in HW.
Felipe Balbi72246da2011-08-19 18:10:58 +0300293 */
294 usb_status |= dwc->is_selfpowered << USB_DEVICE_SELF_POWERED;
Sebastian Andrzej Siewiore6a3b5e2011-09-13 17:54:39 +0200295
296 if (dwc->speed == DWC3_DSTS_SUPERSPEED) {
297 reg = dwc3_readl(dwc->regs, DWC3_DCTL);
298 if (reg & DWC3_DCTL_INITU1ENA)
299 usb_status |= 1 << USB_DEV_STAT_U1_ENABLED;
300 if (reg & DWC3_DCTL_INITU2ENA)
301 usb_status |= 1 << USB_DEV_STAT_U2_ENABLED;
302 }
303
Felipe Balbi72246da2011-08-19 18:10:58 +0300304 break;
305
306 case USB_RECIP_INTERFACE:
307 /*
308 * Function Remote Wake Capable D0
309 * Function Remote Wakeup D1
310 */
311 break;
312
313 case USB_RECIP_ENDPOINT:
314 dep = dwc3_wIndex_to_dep(dwc, ctrl->wIndex);
315 if (!dep)
Felipe Balbi25b8ff62011-11-04 12:32:47 +0200316 return -EINVAL;
Felipe Balbi72246da2011-08-19 18:10:58 +0300317
318 if (dep->flags & DWC3_EP_STALL)
319 usb_status = 1 << USB_ENDPOINT_HALT;
320 break;
321 default:
322 return -EINVAL;
323 };
324
325 response_pkt = (__le16 *) dwc->setup_buf;
326 *response_pkt = cpu_to_le16(usb_status);
Felipe Balbie2617792011-11-29 10:35:47 +0200327
328 dep = dwc->eps[0];
329 dwc->ep0_usb_req.dep = dep;
Sebastian Andrzej Siewiore0ce0b02011-11-25 12:03:46 +0100330 dwc->ep0_usb_req.request.length = sizeof(*response_pkt);
Felipe Balbi0fc9a1b2011-12-19 11:32:34 +0200331 dwc->ep0_usb_req.request.buf = dwc->setup_buf;
Sebastian Andrzej Siewiore0ce0b02011-11-25 12:03:46 +0100332 dwc->ep0_usb_req.request.complete = dwc3_ep0_status_cmpl;
Felipe Balbie2617792011-11-29 10:35:47 +0200333
334 return __dwc3_gadget_ep0_queue(dep, &dwc->ep0_usb_req);
Felipe Balbi72246da2011-08-19 18:10:58 +0300335}
336
337static int dwc3_ep0_handle_feature(struct dwc3 *dwc,
338 struct usb_ctrlrequest *ctrl, int set)
339{
340 struct dwc3_ep *dep;
341 u32 recip;
342 u32 wValue;
343 u32 wIndex;
Sebastian Andrzej Siewiore6a3b5e2011-09-13 17:54:39 +0200344 u32 reg;
Felipe Balbi72246da2011-08-19 18:10:58 +0300345 int ret;
Felipe Balbi72246da2011-08-19 18:10:58 +0300346
347 wValue = le16_to_cpu(ctrl->wValue);
348 wIndex = le16_to_cpu(ctrl->wIndex);
349 recip = ctrl->bRequestType & USB_RECIP_MASK;
350 switch (recip) {
351 case USB_RECIP_DEVICE:
352
Sebastian Andrzej Siewiore6a3b5e2011-09-13 17:54:39 +0200353 switch (wValue) {
354 case USB_DEVICE_REMOTE_WAKEUP:
355 break;
Felipe Balbi72246da2011-08-19 18:10:58 +0300356 /*
357 * 9.4.1 says only only for SS, in AddressState only for
358 * default control pipe
359 */
Felipe Balbi72246da2011-08-19 18:10:58 +0300360 case USB_DEVICE_U1_ENABLE:
Felipe Balbi72246da2011-08-19 18:10:58 +0300361 if (dwc->dev_state != DWC3_CONFIGURED_STATE)
362 return -EINVAL;
363 if (dwc->speed != DWC3_DSTS_SUPERSPEED)
364 return -EINVAL;
Felipe Balbi72246da2011-08-19 18:10:58 +0300365
Sebastian Andrzej Siewiore6a3b5e2011-09-13 17:54:39 +0200366 reg = dwc3_readl(dwc->regs, DWC3_DCTL);
367 if (set)
368 reg |= DWC3_DCTL_INITU1ENA;
369 else
370 reg &= ~DWC3_DCTL_INITU1ENA;
371 dwc3_writel(dwc->regs, DWC3_DCTL, reg);
Felipe Balbi72246da2011-08-19 18:10:58 +0300372 break;
Sebastian Andrzej Siewiore6a3b5e2011-09-13 17:54:39 +0200373
Felipe Balbi72246da2011-08-19 18:10:58 +0300374 case USB_DEVICE_U2_ENABLE:
Sebastian Andrzej Siewiore6a3b5e2011-09-13 17:54:39 +0200375 if (dwc->dev_state != DWC3_CONFIGURED_STATE)
376 return -EINVAL;
377 if (dwc->speed != DWC3_DSTS_SUPERSPEED)
378 return -EINVAL;
379
380 reg = dwc3_readl(dwc->regs, DWC3_DCTL);
381 if (set)
382 reg |= DWC3_DCTL_INITU2ENA;
383 else
384 reg &= ~DWC3_DCTL_INITU2ENA;
385 dwc3_writel(dwc->regs, DWC3_DCTL, reg);
Felipe Balbi72246da2011-08-19 18:10:58 +0300386 break;
Sebastian Andrzej Siewiore6a3b5e2011-09-13 17:54:39 +0200387
Felipe Balbi72246da2011-08-19 18:10:58 +0300388 case USB_DEVICE_LTM_ENABLE:
Sebastian Andrzej Siewiore6a3b5e2011-09-13 17:54:39 +0200389 return -EINVAL;
Felipe Balbi72246da2011-08-19 18:10:58 +0300390 break;
391
392 case USB_DEVICE_TEST_MODE:
393 if ((wIndex & 0xff) != 0)
394 return -EINVAL;
395 if (!set)
396 return -EINVAL;
397
Gerard Cauvy3b637362012-02-10 12:21:18 +0200398 dwc->test_mode_nr = wIndex >> 8;
399 dwc->test_mode = true;
Gerard Cauvyecb07792012-03-16 16:20:10 +0200400 break;
401 default:
402 return -EINVAL;
Felipe Balbi72246da2011-08-19 18:10:58 +0300403 }
404 break;
405
406 case USB_RECIP_INTERFACE:
407 switch (wValue) {
408 case USB_INTRF_FUNC_SUSPEND:
409 if (wIndex & USB_INTRF_FUNC_SUSPEND_LP)
410 /* XXX enable Low power suspend */
411 ;
412 if (wIndex & USB_INTRF_FUNC_SUSPEND_RW)
413 /* XXX enable remote wakeup */
414 ;
415 break;
416 default:
417 return -EINVAL;
418 }
419 break;
420
421 case USB_RECIP_ENDPOINT:
422 switch (wValue) {
423 case USB_ENDPOINT_HALT:
Paul Zimmerman1d046792012-02-15 18:56:56 -0800424 dep = dwc3_wIndex_to_dep(dwc, wIndex);
Felipe Balbi72246da2011-08-19 18:10:58 +0300425 if (!dep)
426 return -EINVAL;
427 ret = __dwc3_gadget_ep_set_halt(dep, set);
428 if (ret)
429 return -EINVAL;
430 break;
431 default:
432 return -EINVAL;
433 }
434 break;
435
436 default:
437 return -EINVAL;
438 };
439
Felipe Balbi72246da2011-08-19 18:10:58 +0300440 return 0;
441}
442
443static int dwc3_ep0_set_address(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl)
444{
Felipe Balbi72246da2011-08-19 18:10:58 +0300445 u32 addr;
446 u32 reg;
447
448 addr = le16_to_cpu(ctrl->wValue);
Felipe Balbif96a6ec2011-10-15 21:37:35 +0300449 if (addr > 127) {
450 dev_dbg(dwc->dev, "invalid device address %d\n", addr);
Felipe Balbi72246da2011-08-19 18:10:58 +0300451 return -EINVAL;
Felipe Balbif96a6ec2011-10-15 21:37:35 +0300452 }
453
454 if (dwc->dev_state == DWC3_CONFIGURED_STATE) {
455 dev_dbg(dwc->dev, "trying to set address when configured\n");
456 return -EINVAL;
457 }
Felipe Balbi72246da2011-08-19 18:10:58 +0300458
Felipe Balbi26460212011-09-30 10:58:36 +0300459 reg = dwc3_readl(dwc->regs, DWC3_DCFG);
460 reg &= ~(DWC3_DCFG_DEVADDR_MASK);
461 reg |= DWC3_DCFG_DEVADDR(addr);
462 dwc3_writel(dwc->regs, DWC3_DCFG, reg);
Felipe Balbi72246da2011-08-19 18:10:58 +0300463
Felipe Balbi26460212011-09-30 10:58:36 +0300464 if (addr)
465 dwc->dev_state = DWC3_ADDRESS_STATE;
466 else
467 dwc->dev_state = DWC3_DEFAULT_STATE;
Felipe Balbi72246da2011-08-19 18:10:58 +0300468
Felipe Balbi26460212011-09-30 10:58:36 +0300469 return 0;
Felipe Balbi72246da2011-08-19 18:10:58 +0300470}
471
472static int dwc3_ep0_delegate_req(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl)
473{
474 int ret;
475
476 spin_unlock(&dwc->lock);
477 ret = dwc->gadget_driver->setup(&dwc->gadget, ctrl);
478 spin_lock(&dwc->lock);
479 return ret;
480}
481
482static int dwc3_ep0_set_config(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl)
483{
484 u32 cfg;
485 int ret;
Pratyush Anande274a312012-07-02 10:21:54 +0530486 u32 reg;
Felipe Balbi72246da2011-08-19 18:10:58 +0300487
Paul Zimmermanb23c8432011-09-30 10:58:42 +0300488 dwc->start_config_issued = false;
Felipe Balbi72246da2011-08-19 18:10:58 +0300489 cfg = le16_to_cpu(ctrl->wValue);
490
491 switch (dwc->dev_state) {
492 case DWC3_DEFAULT_STATE:
493 return -EINVAL;
494 break;
495
496 case DWC3_ADDRESS_STATE:
497 ret = dwc3_ep0_delegate_req(dwc, ctrl);
498 /* if the cfg matches and the cfg is non zero */
Felipe Balbi457e84b2012-01-18 18:04:09 +0200499 if (cfg && (!ret || (ret == USB_GADGET_DELAYED_STATUS))) {
Felipe Balbi72246da2011-08-19 18:10:58 +0300500 dwc->dev_state = DWC3_CONFIGURED_STATE;
Pratyush Anande274a312012-07-02 10:21:54 +0530501 /*
502 * Enable transition to U1/U2 state when
503 * nothing is pending from application.
504 */
505 reg = dwc3_readl(dwc->regs, DWC3_DCTL);
506 reg |= (DWC3_DCTL_ACCEPTU1ENA | DWC3_DCTL_ACCEPTU2ENA);
507 dwc3_writel(dwc->regs, DWC3_DCTL, reg);
508
Felipe Balbi457e84b2012-01-18 18:04:09 +0200509 dwc->resize_fifos = true;
510 dev_dbg(dwc->dev, "resize fifos flag SET\n");
511 }
Felipe Balbi72246da2011-08-19 18:10:58 +0300512 break;
513
514 case DWC3_CONFIGURED_STATE:
515 ret = dwc3_ep0_delegate_req(dwc, ctrl);
516 if (!cfg)
517 dwc->dev_state = DWC3_ADDRESS_STATE;
518 break;
Sebastian Andrzej Siewior5bdb1dc2011-11-02 13:30:45 +0100519 default:
520 ret = -EINVAL;
Felipe Balbi72246da2011-08-19 18:10:58 +0300521 }
Sebastian Andrzej Siewior5bdb1dc2011-11-02 13:30:45 +0100522 return ret;
Felipe Balbi72246da2011-08-19 18:10:58 +0300523}
524
Felipe Balbi865e09e2012-04-24 16:19:49 +0300525static void dwc3_ep0_set_sel_cmpl(struct usb_ep *ep, struct usb_request *req)
526{
527 struct dwc3_ep *dep = to_dwc3_ep(ep);
528 struct dwc3 *dwc = dep->dwc;
529
530 u32 param = 0;
531 u32 reg;
532
533 struct timing {
534 u8 u1sel;
535 u8 u1pel;
536 u16 u2sel;
537 u16 u2pel;
538 } __packed timing;
539
540 int ret;
541
542 memcpy(&timing, req->buf, sizeof(timing));
543
544 dwc->u1sel = timing.u1sel;
545 dwc->u1pel = timing.u1pel;
Felipe Balbic8cf7af2012-05-31 11:00:28 +0300546 dwc->u2sel = le16_to_cpu(timing.u2sel);
547 dwc->u2pel = le16_to_cpu(timing.u2pel);
Felipe Balbi865e09e2012-04-24 16:19:49 +0300548
549 reg = dwc3_readl(dwc->regs, DWC3_DCTL);
550 if (reg & DWC3_DCTL_INITU2ENA)
551 param = dwc->u2pel;
552 if (reg & DWC3_DCTL_INITU1ENA)
553 param = dwc->u1pel;
554
555 /*
556 * According to Synopsys Databook, if parameter is
557 * greater than 125, a value of zero should be
558 * programmed in the register.
559 */
560 if (param > 125)
561 param = 0;
562
563 /* now that we have the time, issue DGCMD Set Sel */
564 ret = dwc3_send_gadget_generic_command(dwc,
565 DWC3_DGCMD_SET_PERIODIC_PAR, param);
566 WARN_ON(ret < 0);
567}
568
569static int dwc3_ep0_set_sel(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl)
570{
571 struct dwc3_ep *dep;
572 u16 wLength;
573 u16 wValue;
574
575 if (dwc->dev_state == DWC3_DEFAULT_STATE)
576 return -EINVAL;
577
578 wValue = le16_to_cpu(ctrl->wValue);
579 wLength = le16_to_cpu(ctrl->wLength);
580
581 if (wLength != 6) {
582 dev_err(dwc->dev, "Set SEL should be 6 bytes, got %d\n",
583 wLength);
584 return -EINVAL;
585 }
586
587 /*
588 * To handle Set SEL we need to receive 6 bytes from Host. So let's
589 * queue a usb_request for 6 bytes.
590 *
591 * Remember, though, this controller can't handle non-wMaxPacketSize
592 * aligned transfers on the OUT direction, so we queue a request for
593 * wMaxPacketSize instead.
594 */
595 dep = dwc->eps[0];
596 dwc->ep0_usb_req.dep = dep;
597 dwc->ep0_usb_req.request.length = dep->endpoint.maxpacket;
598 dwc->ep0_usb_req.request.buf = dwc->setup_buf;
599 dwc->ep0_usb_req.request.complete = dwc3_ep0_set_sel_cmpl;
600
601 return __dwc3_gadget_ep0_queue(dep, &dwc->ep0_usb_req);
602}
603
Felipe Balbic12a0d82012-04-25 10:45:05 +0300604static int dwc3_ep0_set_isoch_delay(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl)
605{
606 u16 wLength;
607 u16 wValue;
608 u16 wIndex;
609
610 wValue = le16_to_cpu(ctrl->wValue);
611 wLength = le16_to_cpu(ctrl->wLength);
612 wIndex = le16_to_cpu(ctrl->wIndex);
613
614 if (wIndex || wLength)
615 return -EINVAL;
616
617 /*
618 * REVISIT It's unclear from Databook what to do with this
619 * value. For now, just cache it.
620 */
621 dwc->isoch_delay = wValue;
622
623 return 0;
624}
625
Felipe Balbi72246da2011-08-19 18:10:58 +0300626static int dwc3_ep0_std_request(struct dwc3 *dwc, struct usb_ctrlrequest *ctrl)
627{
628 int ret;
629
630 switch (ctrl->bRequest) {
631 case USB_REQ_GET_STATUS:
632 dev_vdbg(dwc->dev, "USB_REQ_GET_STATUS\n");
633 ret = dwc3_ep0_handle_status(dwc, ctrl);
634 break;
635 case USB_REQ_CLEAR_FEATURE:
636 dev_vdbg(dwc->dev, "USB_REQ_CLEAR_FEATURE\n");
637 ret = dwc3_ep0_handle_feature(dwc, ctrl, 0);
638 break;
639 case USB_REQ_SET_FEATURE:
640 dev_vdbg(dwc->dev, "USB_REQ_SET_FEATURE\n");
641 ret = dwc3_ep0_handle_feature(dwc, ctrl, 1);
642 break;
643 case USB_REQ_SET_ADDRESS:
644 dev_vdbg(dwc->dev, "USB_REQ_SET_ADDRESS\n");
645 ret = dwc3_ep0_set_address(dwc, ctrl);
646 break;
647 case USB_REQ_SET_CONFIGURATION:
648 dev_vdbg(dwc->dev, "USB_REQ_SET_CONFIGURATION\n");
649 ret = dwc3_ep0_set_config(dwc, ctrl);
650 break;
Felipe Balbi865e09e2012-04-24 16:19:49 +0300651 case USB_REQ_SET_SEL:
652 dev_vdbg(dwc->dev, "USB_REQ_SET_SEL\n");
653 ret = dwc3_ep0_set_sel(dwc, ctrl);
654 break;
Felipe Balbic12a0d82012-04-25 10:45:05 +0300655 case USB_REQ_SET_ISOCH_DELAY:
656 dev_vdbg(dwc->dev, "USB_REQ_SET_ISOCH_DELAY\n");
657 ret = dwc3_ep0_set_isoch_delay(dwc, ctrl);
658 break;
Felipe Balbi72246da2011-08-19 18:10:58 +0300659 default:
660 dev_vdbg(dwc->dev, "Forwarding to gadget driver\n");
661 ret = dwc3_ep0_delegate_req(dwc, ctrl);
662 break;
663 };
664
665 return ret;
666}
667
668static void dwc3_ep0_inspect_setup(struct dwc3 *dwc,
669 const struct dwc3_event_depevt *event)
670{
671 struct usb_ctrlrequest *ctrl = dwc->ctrl_req;
Felipe Balbief21ede2012-05-31 10:29:49 +0300672 int ret = -EINVAL;
Felipe Balbi72246da2011-08-19 18:10:58 +0300673 u32 len;
674
675 if (!dwc->gadget_driver)
Felipe Balbief21ede2012-05-31 10:29:49 +0300676 goto out;
Felipe Balbi72246da2011-08-19 18:10:58 +0300677
678 len = le16_to_cpu(ctrl->wLength);
Felipe Balbi1ddcb212011-08-30 15:52:17 +0300679 if (!len) {
Felipe Balbid95b09b2011-09-30 10:58:37 +0300680 dwc->three_stage_setup = false;
681 dwc->ep0_expect_in = false;
Felipe Balbi1ddcb212011-08-30 15:52:17 +0300682 dwc->ep0_next_event = DWC3_EP0_NRDY_STATUS;
683 } else {
Felipe Balbid95b09b2011-09-30 10:58:37 +0300684 dwc->three_stage_setup = true;
685 dwc->ep0_expect_in = !!(ctrl->bRequestType & USB_DIR_IN);
Felipe Balbi1ddcb212011-08-30 15:52:17 +0300686 dwc->ep0_next_event = DWC3_EP0_NRDY_DATA;
687 }
Felipe Balbi72246da2011-08-19 18:10:58 +0300688
689 if ((ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD)
690 ret = dwc3_ep0_std_request(dwc, ctrl);
691 else
692 ret = dwc3_ep0_delegate_req(dwc, ctrl);
693
Sebastian Andrzej Siewior5bdb1dc2011-11-02 13:30:45 +0100694 if (ret == USB_GADGET_DELAYED_STATUS)
695 dwc->delayed_status = true;
696
Felipe Balbief21ede2012-05-31 10:29:49 +0300697out:
698 if (ret < 0)
699 dwc3_ep0_stall_and_restart(dwc);
Felipe Balbi72246da2011-08-19 18:10:58 +0300700}
701
702static void dwc3_ep0_complete_data(struct dwc3 *dwc,
703 const struct dwc3_event_depevt *event)
704{
705 struct dwc3_request *r = NULL;
706 struct usb_request *ur;
Felipe Balbif6bafc62012-02-06 11:04:53 +0200707 struct dwc3_trb *trb;
Sebastian Andrzej Siewiorc2da2ff2011-10-20 19:04:16 +0200708 struct dwc3_ep *ep0;
Felipe Balbic611ccb2011-08-27 02:30:33 +0300709 u32 transferred;
Felipe Balbif6bafc62012-02-06 11:04:53 +0200710 u32 length;
Felipe Balbi72246da2011-08-19 18:10:58 +0300711 u8 epnum;
712
713 epnum = event->endpoint_number;
Sebastian Andrzej Siewiorc2da2ff2011-10-20 19:04:16 +0200714 ep0 = dwc->eps[0];
Felipe Balbi72246da2011-08-19 18:10:58 +0300715
Felipe Balbi1ddcb212011-08-30 15:52:17 +0300716 dwc->ep0_next_event = DWC3_EP0_NRDY_STATUS;
717
Sebastian Andrzej Siewiorc2da2ff2011-10-20 19:04:16 +0200718 r = next_request(&ep0->request_list);
Sebastian Andrzej Siewior8ee62702011-10-18 19:13:29 +0200719 ur = &r->request;
Felipe Balbi72246da2011-08-19 18:10:58 +0300720
Felipe Balbif6bafc62012-02-06 11:04:53 +0200721 trb = dwc->ep0_trb;
722 length = trb->size & DWC3_TRB_SIZE_MASK;
Felipe Balbi72246da2011-08-19 18:10:58 +0300723
Felipe Balbia6829702011-08-27 22:18:09 +0300724 if (dwc->ep0_bounced) {
Moiz Sonasath566ccdd2012-03-14 00:44:56 -0500725 unsigned transfer_size = ur->length;
726 unsigned maxp = ep0->endpoint.maxpacket;
727
728 transfer_size += (maxp - (transfer_size % maxp));
Felipe Balbic7fcdeb2011-08-27 22:28:36 +0300729 transferred = min_t(u32, ur->length,
Moiz Sonasath566ccdd2012-03-14 00:44:56 -0500730 transfer_size - length);
Felipe Balbia6829702011-08-27 22:18:09 +0300731 memcpy(ur->buf, dwc->ep0_bounce, transferred);
732 dwc->ep0_bounced = false;
733 } else {
Felipe Balbif6bafc62012-02-06 11:04:53 +0200734 transferred = ur->length - length;
Felipe Balbia6829702011-08-27 22:18:09 +0300735 }
Felipe Balbi72246da2011-08-19 18:10:58 +0300736
Felipe Balbicd423dd2012-03-21 11:44:00 +0200737 ur->actual += transferred;
738
Felipe Balbi72246da2011-08-19 18:10:58 +0300739 if ((epnum & 1) && ur->actual < ur->length) {
740 /* for some reason we did not get everything out */
741
742 dwc3_ep0_stall_and_restart(dwc);
Felipe Balbi72246da2011-08-19 18:10:58 +0300743 } else {
744 /*
745 * handle the case where we have to send a zero packet. This
746 * seems to be case when req.length > maxpacket. Could it be?
747 */
Felipe Balbi72246da2011-08-19 18:10:58 +0300748 if (r)
Sebastian Andrzej Siewiorc2da2ff2011-10-20 19:04:16 +0200749 dwc3_gadget_giveback(ep0, r, 0);
Felipe Balbi72246da2011-08-19 18:10:58 +0300750 }
751}
752
Felipe Balbi85a78102012-05-31 12:32:37 +0300753static void dwc3_ep0_complete_status(struct dwc3 *dwc,
Felipe Balbi72246da2011-08-19 18:10:58 +0300754 const struct dwc3_event_depevt *event)
755{
756 struct dwc3_request *r;
757 struct dwc3_ep *dep;
Felipe Balbi72246da2011-08-19 18:10:58 +0300758
Felipe Balbic7fcdeb2011-08-27 22:28:36 +0300759 dep = dwc->eps[0];
Felipe Balbi72246da2011-08-19 18:10:58 +0300760
761 if (!list_empty(&dep->request_list)) {
762 r = next_request(&dep->request_list);
763
764 dwc3_gadget_giveback(dep, r, 0);
765 }
766
Gerard Cauvy3b637362012-02-10 12:21:18 +0200767 if (dwc->test_mode) {
768 int ret;
769
770 ret = dwc3_gadget_set_test_mode(dwc, dwc->test_mode_nr);
771 if (ret < 0) {
772 dev_dbg(dwc->dev, "Invalid Test #%d\n",
773 dwc->test_mode_nr);
774 dwc3_ep0_stall_and_restart(dwc);
Felipe Balbi5c81aba2012-06-25 19:30:49 +0300775 return;
Gerard Cauvy3b637362012-02-10 12:21:18 +0200776 }
777 }
778
Felipe Balbic7fcdeb2011-08-27 22:28:36 +0300779 dwc->ep0state = EP0_SETUP_PHASE;
Felipe Balbi72246da2011-08-19 18:10:58 +0300780 dwc3_ep0_out_start(dwc);
781}
782
783static void dwc3_ep0_xfer_complete(struct dwc3 *dwc,
784 const struct dwc3_event_depevt *event)
785{
Felipe Balbic7fcdeb2011-08-27 22:28:36 +0300786 struct dwc3_ep *dep = dwc->eps[event->endpoint_number];
787
788 dep->flags &= ~DWC3_EP_BUSY;
Felipe Balbib4996a82012-06-06 12:04:13 +0300789 dep->resource_index = 0;
Felipe Balbidf62df52011-10-14 15:11:49 +0300790 dwc->setup_packet_pending = false;
Felipe Balbic7fcdeb2011-08-27 22:28:36 +0300791
Felipe Balbi72246da2011-08-19 18:10:58 +0300792 switch (dwc->ep0state) {
Felipe Balbic7fcdeb2011-08-27 22:28:36 +0300793 case EP0_SETUP_PHASE:
794 dev_vdbg(dwc->dev, "Inspecting Setup Bytes\n");
Felipe Balbi72246da2011-08-19 18:10:58 +0300795 dwc3_ep0_inspect_setup(dwc, event);
796 break;
797
Felipe Balbic7fcdeb2011-08-27 22:28:36 +0300798 case EP0_DATA_PHASE:
799 dev_vdbg(dwc->dev, "Data Phase\n");
Felipe Balbi72246da2011-08-19 18:10:58 +0300800 dwc3_ep0_complete_data(dwc, event);
801 break;
802
Felipe Balbic7fcdeb2011-08-27 22:28:36 +0300803 case EP0_STATUS_PHASE:
804 dev_vdbg(dwc->dev, "Status Phase\n");
Felipe Balbi85a78102012-05-31 12:32:37 +0300805 dwc3_ep0_complete_status(dwc, event);
Felipe Balbi72246da2011-08-19 18:10:58 +0300806 break;
Felipe Balbic7fcdeb2011-08-27 22:28:36 +0300807 default:
808 WARN(true, "UNKNOWN ep0state %d\n", dwc->ep0state);
Felipe Balbi72246da2011-08-19 18:10:58 +0300809 }
810}
811
Felipe Balbic7fcdeb2011-08-27 22:28:36 +0300812static void dwc3_ep0_do_control_setup(struct dwc3 *dwc,
813 const struct dwc3_event_depevt *event)
814{
Felipe Balbic7fcdeb2011-08-27 22:28:36 +0300815 dwc3_ep0_out_start(dwc);
816}
817
Felipe Balbia0807882012-05-04 13:03:54 +0300818static void __dwc3_ep0_do_control_data(struct dwc3 *dwc,
819 struct dwc3_ep *dep, struct dwc3_request *req)
820{
821 int ret;
822
823 req->direction = !!dep->number;
824
825 if (req->request.length == 0) {
826 ret = dwc3_ep0_start_trans(dwc, dep->number,
827 dwc->ctrl_req_addr, 0,
828 DWC3_TRBCTL_CONTROL_DATA);
Felipe Balbic74c6d42012-05-04 13:08:22 +0300829 } else if (!IS_ALIGNED(req->request.length, dep->endpoint.maxpacket)
Felipe Balbia0807882012-05-04 13:03:54 +0300830 && (dep->number == 0)) {
831 u32 transfer_size;
832
833 ret = usb_gadget_map_request(&dwc->gadget, &req->request,
834 dep->number);
835 if (ret) {
836 dev_dbg(dwc->dev, "failed to map request\n");
837 return;
838 }
839
840 WARN_ON(req->request.length > DWC3_EP0_BOUNCE_SIZE);
841
842 transfer_size = roundup(req->request.length,
843 (u32) dep->endpoint.maxpacket);
844
845 dwc->ep0_bounced = true;
846
847 /*
848 * REVISIT in case request length is bigger than
849 * DWC3_EP0_BOUNCE_SIZE we will need two chained
850 * TRBs to handle the transfer.
851 */
852 ret = dwc3_ep0_start_trans(dwc, dep->number,
853 dwc->ep0_bounce_addr, transfer_size,
854 DWC3_TRBCTL_CONTROL_DATA);
855 } else {
856 ret = usb_gadget_map_request(&dwc->gadget, &req->request,
857 dep->number);
858 if (ret) {
859 dev_dbg(dwc->dev, "failed to map request\n");
860 return;
861 }
862
863 ret = dwc3_ep0_start_trans(dwc, dep->number, req->request.dma,
864 req->request.length, DWC3_TRBCTL_CONTROL_DATA);
865 }
866
867 WARN_ON(ret < 0);
868}
869
Felipe Balbic7fcdeb2011-08-27 22:28:36 +0300870static void dwc3_ep0_do_control_data(struct dwc3 *dwc,
871 const struct dwc3_event_depevt *event)
872{
873 struct dwc3_ep *dep;
874 struct dwc3_request *req;
Felipe Balbic7fcdeb2011-08-27 22:28:36 +0300875
876 dep = dwc->eps[0];
Felipe Balbic7fcdeb2011-08-27 22:28:36 +0300877
878 if (list_empty(&dep->request_list)) {
879 dev_vdbg(dwc->dev, "pending request for EP0 Data phase\n");
880 dep->flags |= DWC3_EP_PENDING_REQUEST;
881
882 if (event->endpoint_number)
883 dep->flags |= DWC3_EP0_DIR_IN;
884 return;
885 }
886
887 req = next_request(&dep->request_list);
Felipe Balbia0807882012-05-04 13:03:54 +0300888 dep = dwc->eps[event->endpoint_number];
Felipe Balbic7fcdeb2011-08-27 22:28:36 +0300889
Felipe Balbia0807882012-05-04 13:03:54 +0300890 __dwc3_ep0_do_control_data(dwc, dep, req);
Felipe Balbic7fcdeb2011-08-27 22:28:36 +0300891}
892
Sebastian Andrzej Siewiorf0f2b2a2011-11-02 13:30:44 +0100893static int dwc3_ep0_start_control_status(struct dwc3_ep *dep)
Felipe Balbic7fcdeb2011-08-27 22:28:36 +0300894{
Sebastian Andrzej Siewiorf0f2b2a2011-11-02 13:30:44 +0100895 struct dwc3 *dwc = dep->dwc;
Felipe Balbic7fcdeb2011-08-27 22:28:36 +0300896 u32 type;
Felipe Balbic7fcdeb2011-08-27 22:28:36 +0300897
898 type = dwc->three_stage_setup ? DWC3_TRBCTL_CONTROL_STATUS3
899 : DWC3_TRBCTL_CONTROL_STATUS2;
900
Sebastian Andrzej Siewiorf0f2b2a2011-11-02 13:30:44 +0100901 return dwc3_ep0_start_trans(dwc, dep->number,
Felipe Balbic7fcdeb2011-08-27 22:28:36 +0300902 dwc->ctrl_req_addr, 0, type);
Sebastian Andrzej Siewiorf0f2b2a2011-11-02 13:30:44 +0100903}
Felipe Balbic7fcdeb2011-08-27 22:28:36 +0300904
Felipe Balbi788a23f2012-05-21 14:22:41 +0300905static void __dwc3_ep0_do_control_status(struct dwc3 *dwc, struct dwc3_ep *dep)
Sebastian Andrzej Siewiorf0f2b2a2011-11-02 13:30:44 +0100906{
Felipe Balbi457e84b2012-01-18 18:04:09 +0200907 if (dwc->resize_fifos) {
908 dev_dbg(dwc->dev, "starting to resize fifos\n");
909 dwc3_gadget_resize_tx_fifos(dwc);
910 dwc->resize_fifos = 0;
911 }
912
Sebastian Andrzej Siewiorf0f2b2a2011-11-02 13:30:44 +0100913 WARN_ON(dwc3_ep0_start_control_status(dep));
Felipe Balbic7fcdeb2011-08-27 22:28:36 +0300914}
915
Felipe Balbi788a23f2012-05-21 14:22:41 +0300916static void dwc3_ep0_do_control_status(struct dwc3 *dwc,
917 const struct dwc3_event_depevt *event)
918{
919 struct dwc3_ep *dep = dwc->eps[event->endpoint_number];
920
921 __dwc3_ep0_do_control_status(dwc, dep);
922}
923
Felipe Balbi72246da2011-08-19 18:10:58 +0300924static void dwc3_ep0_xfernotready(struct dwc3 *dwc,
925 const struct dwc3_event_depevt *event)
926{
Felipe Balbidf62df52011-10-14 15:11:49 +0300927 dwc->setup_packet_pending = true;
928
Felipe Balbi9cc9bcd2011-10-18 18:00:26 +0300929 /*
Felipe Balbi33b84c22012-05-21 14:35:17 +0300930 * This part is very tricky: If we have just handled
Felipe Balbi9cc9bcd2011-10-18 18:00:26 +0300931 * XferNotReady(Setup) and we're now expecting a
932 * XferComplete but, instead, we receive another
933 * XferNotReady(Setup), we should STALL and restart
934 * the state machine.
935 *
936 * In all other cases, we just continue waiting
937 * for the XferComplete event.
938 *
939 * We are a little bit unsafe here because we're
940 * not trying to ensure that last event was, indeed,
941 * XferNotReady(Setup).
942 *
943 * Still, we don't expect any condition where that
944 * should happen and, even if it does, it would be
945 * another error condition.
946 */
947 if (dwc->ep0_next_event == DWC3_EP0_COMPLETE) {
948 switch (event->status) {
949 case DEPEVT_STATUS_CONTROL_SETUP:
950 dev_vdbg(dwc->dev, "Unexpected XferNotReady(Setup)\n");
951 dwc3_ep0_stall_and_restart(dwc);
952 break;
953 case DEPEVT_STATUS_CONTROL_DATA:
954 /* FALLTHROUGH */
955 case DEPEVT_STATUS_CONTROL_STATUS:
956 /* FALLTHROUGH */
957 default:
958 dev_vdbg(dwc->dev, "waiting for XferComplete\n");
959 }
960
961 return;
962 }
963
Felipe Balbic7fcdeb2011-08-27 22:28:36 +0300964 switch (event->status) {
965 case DEPEVT_STATUS_CONTROL_SETUP:
966 dev_vdbg(dwc->dev, "Control Setup\n");
Sebastian Andrzej Siewiorf0f2b2a2011-11-02 13:30:44 +0100967
968 dwc->ep0state = EP0_SETUP_PHASE;
969
Felipe Balbic7fcdeb2011-08-27 22:28:36 +0300970 dwc3_ep0_do_control_setup(dwc, event);
Felipe Balbi72246da2011-08-19 18:10:58 +0300971 break;
Felipe Balbi1ddcb212011-08-30 15:52:17 +0300972
Felipe Balbic7fcdeb2011-08-27 22:28:36 +0300973 case DEPEVT_STATUS_CONTROL_DATA:
974 dev_vdbg(dwc->dev, "Control Data\n");
Felipe Balbi1ddcb212011-08-30 15:52:17 +0300975
Sebastian Andrzej Siewiorf0f2b2a2011-11-02 13:30:44 +0100976 dwc->ep0state = EP0_DATA_PHASE;
977
Felipe Balbi1ddcb212011-08-30 15:52:17 +0300978 if (dwc->ep0_next_event != DWC3_EP0_NRDY_DATA) {
979 dev_vdbg(dwc->dev, "Expected %d got %d\n",
Felipe Balbi25355be2011-09-30 10:58:38 +0300980 dwc->ep0_next_event,
981 DWC3_EP0_NRDY_DATA);
Felipe Balbi1ddcb212011-08-30 15:52:17 +0300982
983 dwc3_ep0_stall_and_restart(dwc);
984 return;
985 }
986
Felipe Balbi55f3fba2011-09-08 18:27:33 +0300987 /*
988 * One of the possible error cases is when Host _does_
989 * request for Data Phase, but it does so on the wrong
990 * direction.
991 *
992 * Here, we already know ep0_next_event is DATA (see above),
993 * so we only need to check for direction.
994 */
995 if (dwc->ep0_expect_in != event->endpoint_number) {
996 dev_vdbg(dwc->dev, "Wrong direction for Data phase\n");
997 dwc3_ep0_stall_and_restart(dwc);
998 return;
999 }
1000
Felipe Balbic7fcdeb2011-08-27 22:28:36 +03001001 dwc3_ep0_do_control_data(dwc, event);
Felipe Balbi72246da2011-08-19 18:10:58 +03001002 break;
Felipe Balbi1ddcb212011-08-30 15:52:17 +03001003
Felipe Balbic7fcdeb2011-08-27 22:28:36 +03001004 case DEPEVT_STATUS_CONTROL_STATUS:
1005 dev_vdbg(dwc->dev, "Control Status\n");
Felipe Balbi1ddcb212011-08-30 15:52:17 +03001006
Sebastian Andrzej Siewiorf0f2b2a2011-11-02 13:30:44 +01001007 dwc->ep0state = EP0_STATUS_PHASE;
1008
Felipe Balbi1ddcb212011-08-30 15:52:17 +03001009 if (dwc->ep0_next_event != DWC3_EP0_NRDY_STATUS) {
1010 dev_vdbg(dwc->dev, "Expected %d got %d\n",
Felipe Balbi25355be2011-09-30 10:58:38 +03001011 dwc->ep0_next_event,
1012 DWC3_EP0_NRDY_STATUS);
Felipe Balbi1ddcb212011-08-30 15:52:17 +03001013
1014 dwc3_ep0_stall_and_restart(dwc);
1015 return;
1016 }
Sebastian Andrzej Siewior5bdb1dc2011-11-02 13:30:45 +01001017
1018 if (dwc->delayed_status) {
1019 WARN_ON_ONCE(event->endpoint_number != 1);
1020 dev_vdbg(dwc->dev, "Mass Storage delayed status\n");
1021 return;
1022 }
1023
Felipe Balbi788a23f2012-05-21 14:22:41 +03001024 dwc3_ep0_do_control_status(dwc, event);
Felipe Balbi72246da2011-08-19 18:10:58 +03001025 }
1026}
1027
1028void dwc3_ep0_interrupt(struct dwc3 *dwc,
Felipe Balbi8becf272011-11-04 12:40:05 +02001029 const struct dwc3_event_depevt *event)
Felipe Balbi72246da2011-08-19 18:10:58 +03001030{
1031 u8 epnum = event->endpoint_number;
1032
1033 dev_dbg(dwc->dev, "%s while ep%d%s in state '%s'\n",
1034 dwc3_ep_event_string(event->endpoint_event),
Sebastian Andrzej Siewiorb147f352011-09-30 10:58:40 +03001035 epnum >> 1, (epnum & 1) ? "in" : "out",
Felipe Balbi72246da2011-08-19 18:10:58 +03001036 dwc3_ep0_state_string(dwc->ep0state));
1037
1038 switch (event->endpoint_event) {
1039 case DWC3_DEPEVT_XFERCOMPLETE:
1040 dwc3_ep0_xfer_complete(dwc, event);
1041 break;
1042
1043 case DWC3_DEPEVT_XFERNOTREADY:
1044 dwc3_ep0_xfernotready(dwc, event);
1045 break;
1046
1047 case DWC3_DEPEVT_XFERINPROGRESS:
1048 case DWC3_DEPEVT_RXTXFIFOEVT:
1049 case DWC3_DEPEVT_STREAMEVT:
1050 case DWC3_DEPEVT_EPCMDCMPLT:
1051 break;
1052 }
1053}