Thomas Gleixner | d2912cb | 2019-06-04 10:11:33 +0200 | [diff] [blame^] | 1 | // SPDX-License-Identifier: GPL-2.0-only |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2 | /* |
| 3 | * linux/arch/arm/mach-sa1100/assabet.c |
| 4 | * |
| 5 | * Author: Nicolas Pitre |
| 6 | * |
| 7 | * This file contains all Assabet-specific tweaks. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 8 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 9 | #include <linux/init.h> |
| 10 | #include <linux/kernel.h> |
| 11 | #include <linux/module.h> |
| 12 | #include <linux/errno.h> |
Russell King | b955153 | 2016-08-31 08:49:45 +0100 | [diff] [blame] | 13 | #include <linux/gpio/gpio-reg.h> |
Russell King | 29786e9 | 2016-08-31 08:49:47 +0100 | [diff] [blame] | 14 | #include <linux/gpio/machine.h> |
Russell King | 17c7f4f | 2016-08-31 08:49:50 +0100 | [diff] [blame] | 15 | #include <linux/gpio_keys.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 16 | #include <linux/ioport.h> |
Russell King | 6920b5a | 2012-09-21 10:18:58 +0100 | [diff] [blame] | 17 | #include <linux/platform_data/sa11x0-serial.h> |
Russell King | 29786e9 | 2016-08-31 08:49:47 +0100 | [diff] [blame] | 18 | #include <linux/regulator/fixed.h> |
| 19 | #include <linux/regulator/machine.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 20 | #include <linux/serial_core.h> |
Arnd Bergmann | 7f206d4 | 2013-02-14 23:26:50 +0100 | [diff] [blame] | 21 | #include <linux/platform_device.h> |
Russell King | 69dde86 | 2012-01-20 22:18:06 +0000 | [diff] [blame] | 22 | #include <linux/mfd/ucb1x00.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 23 | #include <linux/mtd/mtd.h> |
| 24 | #include <linux/mtd/partitions.h> |
| 25 | #include <linux/delay.h> |
| 26 | #include <linux/mm.h> |
Bryan Wu | 18775a7 | 2012-03-14 02:22:03 +0800 | [diff] [blame] | 27 | #include <linux/leds.h> |
| 28 | #include <linux/slab.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 29 | |
Russell King | e1b7a72 | 2012-01-14 11:50:04 +0000 | [diff] [blame] | 30 | #include <video/sa1100fb.h> |
| 31 | |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 32 | #include <mach/hardware.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 33 | #include <asm/mach-types.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 34 | #include <asm/setup.h> |
| 35 | #include <asm/page.h> |
Russell King | 74945c8 | 2006-03-16 14:44:36 +0000 | [diff] [blame] | 36 | #include <asm/pgtable-hwdef.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 37 | #include <asm/pgtable.h> |
| 38 | #include <asm/tlbflush.h> |
| 39 | |
| 40 | #include <asm/mach/arch.h> |
| 41 | #include <asm/mach/flash.h> |
Dmitry Eremin-Solenikov | dd45077 | 2014-12-24 01:14:14 +0300 | [diff] [blame] | 42 | #include <linux/platform_data/irda-sa11x0.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 43 | #include <asm/mach/map.h> |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 44 | #include <mach/assabet.h> |
Arnd Bergmann | a1fd844 | 2012-08-24 15:17:38 +0200 | [diff] [blame] | 45 | #include <linux/platform_data/mfd-mcp-sa11x0.h> |
Rob Herring | f314f33 | 2012-02-24 00:06:51 +0100 | [diff] [blame] | 46 | #include <mach/irqs.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 47 | |
| 48 | #include "generic.h" |
| 49 | |
| 50 | #define ASSABET_BCR_DB1110 \ |
Russell King | 7186fb9 | 2012-01-21 21:17:06 +0000 | [diff] [blame] | 51 | (ASSABET_BCR_SPK_OFF | \ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 52 | ASSABET_BCR_LED_GREEN | ASSABET_BCR_LED_RED | \ |
| 53 | ASSABET_BCR_RS232EN | ASSABET_BCR_LCD_12RGB | \ |
| 54 | ASSABET_BCR_IRDA_MD0) |
| 55 | |
| 56 | #define ASSABET_BCR_DB1111 \ |
Russell King | 7186fb9 | 2012-01-21 21:17:06 +0000 | [diff] [blame] | 57 | (ASSABET_BCR_SPK_OFF | \ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 58 | ASSABET_BCR_LED_GREEN | ASSABET_BCR_LED_RED | \ |
| 59 | ASSABET_BCR_RS232EN | ASSABET_BCR_LCD_12RGB | \ |
| 60 | ASSABET_BCR_CF_BUS_OFF | ASSABET_BCR_STEREO_LB | \ |
| 61 | ASSABET_BCR_IRDA_MD0 | ASSABET_BCR_CF_RST) |
| 62 | |
| 63 | unsigned long SCR_value = ASSABET_SCR_INIT; |
| 64 | EXPORT_SYMBOL(SCR_value); |
| 65 | |
Russell King | b955153 | 2016-08-31 08:49:45 +0100 | [diff] [blame] | 66 | static struct gpio_chip *assabet_bcr_gc; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 67 | |
Russell King | b955153 | 2016-08-31 08:49:45 +0100 | [diff] [blame] | 68 | static const char *assabet_names[] = { |
| 69 | "cf_pwr", "cf_gfx_reset", "nsoft_reset", "irda_fsel", |
| 70 | "irda_md0", "irda_md1", "stereo_loopback", "ncf_bus_on", |
| 71 | "audio_pwr_on", "light_pwr_on", "lcd16data", "lcd_pwr_on", |
| 72 | "rs232_on", "nred_led", "ngreen_led", "vib_on", |
| 73 | "com_dtr", "com_rts", "radio_wake_mod", "i2c_enab", |
| 74 | "tvir_enab", "qmute", "radio_pwr_on", "spkr_off", |
| 75 | "rs232_valid", "com_dcd", "com_cts", "com_dsr", |
| 76 | "radio_cts", "radio_dsr", "radio_dcd", "radio_ri", |
| 77 | }; |
| 78 | |
| 79 | /* The old deprecated interface */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 80 | void ASSABET_BCR_frob(unsigned int mask, unsigned int val) |
| 81 | { |
Russell King | b955153 | 2016-08-31 08:49:45 +0100 | [diff] [blame] | 82 | unsigned long m = mask, v = val; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 83 | |
Russell King | b955153 | 2016-08-31 08:49:45 +0100 | [diff] [blame] | 84 | assabet_bcr_gc->set_multiple(assabet_bcr_gc, &m, &v); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 85 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 86 | EXPORT_SYMBOL(ASSABET_BCR_frob); |
| 87 | |
Russell King | b955153 | 2016-08-31 08:49:45 +0100 | [diff] [blame] | 88 | static int __init assabet_init_gpio(void __iomem *reg, u32 def_val) |
| 89 | { |
| 90 | struct gpio_chip *gc; |
| 91 | |
| 92 | writel_relaxed(def_val, reg); |
| 93 | |
| 94 | gc = gpio_reg_init(NULL, reg, -1, 32, "assabet", 0xff000000, def_val, |
| 95 | assabet_names, NULL, NULL); |
| 96 | |
| 97 | if (IS_ERR(gc)) |
| 98 | return PTR_ERR(gc); |
| 99 | |
| 100 | assabet_bcr_gc = gc; |
| 101 | |
Russell King | 59b23ea | 2016-08-31 08:49:50 +0100 | [diff] [blame] | 102 | return gc->base; |
Russell King | b955153 | 2016-08-31 08:49:45 +0100 | [diff] [blame] | 103 | } |
| 104 | |
Russell King | 7dde0c0 | 2013-07-09 10:27:12 +0100 | [diff] [blame] | 105 | /* |
| 106 | * The codec reset goes to three devices, so we need to release |
| 107 | * the rest when any one of these requests it. However, that |
| 108 | * causes the ADV7171 to consume around 100mA - more than half |
| 109 | * the LCD-blanked power. |
| 110 | * |
| 111 | * With the ADV7171, LCD and backlight enabled, we go over |
| 112 | * budget on the MAX846 Li-Ion charger, and if no Li-Ion battery |
| 113 | * is connected, the Assabet crashes. |
| 114 | */ |
| 115 | #define RST_UCB1X00 (1 << 0) |
| 116 | #define RST_UDA1341 (1 << 1) |
| 117 | #define RST_ADV7171 (1 << 2) |
| 118 | |
| 119 | #define SDA GPIO_GPIO(15) |
| 120 | #define SCK GPIO_GPIO(18) |
| 121 | #define MOD GPIO_GPIO(17) |
| 122 | |
| 123 | static void adv7171_start(void) |
| 124 | { |
| 125 | GPSR = SCK; |
| 126 | udelay(1); |
| 127 | GPSR = SDA; |
| 128 | udelay(2); |
| 129 | GPCR = SDA; |
| 130 | } |
| 131 | |
| 132 | static void adv7171_stop(void) |
| 133 | { |
| 134 | GPSR = SCK; |
| 135 | udelay(2); |
| 136 | GPSR = SDA; |
| 137 | udelay(1); |
| 138 | } |
| 139 | |
| 140 | static void adv7171_send(unsigned byte) |
| 141 | { |
| 142 | unsigned i; |
| 143 | |
| 144 | for (i = 0; i < 8; i++, byte <<= 1) { |
| 145 | GPCR = SCK; |
| 146 | udelay(1); |
| 147 | if (byte & 0x80) |
| 148 | GPSR = SDA; |
| 149 | else |
| 150 | GPCR = SDA; |
| 151 | udelay(1); |
| 152 | GPSR = SCK; |
| 153 | udelay(1); |
| 154 | } |
| 155 | GPCR = SCK; |
| 156 | udelay(1); |
| 157 | GPSR = SDA; |
| 158 | udelay(1); |
| 159 | GPDR &= ~SDA; |
| 160 | GPSR = SCK; |
| 161 | udelay(1); |
| 162 | if (GPLR & SDA) |
| 163 | printk(KERN_WARNING "No ACK from ADV7171\n"); |
| 164 | udelay(1); |
| 165 | GPCR = SCK | SDA; |
| 166 | udelay(1); |
| 167 | GPDR |= SDA; |
| 168 | udelay(1); |
| 169 | } |
| 170 | |
| 171 | static void adv7171_write(unsigned reg, unsigned val) |
| 172 | { |
| 173 | unsigned gpdr = GPDR; |
| 174 | unsigned gplr = GPLR; |
| 175 | |
Russell King | b955153 | 2016-08-31 08:49:45 +0100 | [diff] [blame] | 176 | ASSABET_BCR_frob(ASSABET_BCR_AUDIO_ON, ASSABET_BCR_AUDIO_ON); |
Russell King | 7dde0c0 | 2013-07-09 10:27:12 +0100 | [diff] [blame] | 177 | udelay(100); |
| 178 | |
| 179 | GPCR = SDA | SCK | MOD; /* clear L3 mode to ensure UDA1341 doesn't respond */ |
| 180 | GPDR = (GPDR | SCK | MOD) & ~SDA; |
| 181 | udelay(10); |
| 182 | if (!(GPLR & SDA)) |
| 183 | printk(KERN_WARNING "Something dragging SDA down?\n"); |
| 184 | GPDR |= SDA; |
| 185 | |
| 186 | adv7171_start(); |
| 187 | adv7171_send(0x54); |
| 188 | adv7171_send(reg); |
| 189 | adv7171_send(val); |
| 190 | adv7171_stop(); |
| 191 | |
| 192 | /* Restore GPIO state for L3 bus */ |
| 193 | GPSR = gplr & (SDA | SCK | MOD); |
| 194 | GPCR = (~gplr) & (SDA | SCK | MOD); |
| 195 | GPDR = gpdr; |
| 196 | } |
| 197 | |
| 198 | static void adv7171_sleep(void) |
| 199 | { |
| 200 | /* Put the ADV7171 into sleep mode */ |
| 201 | adv7171_write(0x04, 0x40); |
| 202 | } |
| 203 | |
| 204 | static unsigned codec_nreset; |
| 205 | |
| 206 | static void assabet_codec_reset(unsigned mask, int set) |
| 207 | { |
| 208 | unsigned long flags; |
| 209 | bool old; |
| 210 | |
| 211 | local_irq_save(flags); |
| 212 | old = !codec_nreset; |
| 213 | if (set) |
| 214 | codec_nreset &= ~mask; |
| 215 | else |
| 216 | codec_nreset |= mask; |
| 217 | |
| 218 | if (old != !codec_nreset) { |
| 219 | if (codec_nreset) { |
| 220 | ASSABET_BCR_set(ASSABET_BCR_NCODEC_RST); |
| 221 | adv7171_sleep(); |
| 222 | } else { |
| 223 | ASSABET_BCR_clear(ASSABET_BCR_NCODEC_RST); |
| 224 | } |
| 225 | } |
| 226 | local_irq_restore(flags); |
| 227 | } |
| 228 | |
Russell King | 6ed3e2a | 2012-01-22 19:23:33 +0000 | [diff] [blame] | 229 | static void assabet_ucb1x00_reset(enum ucb1x00_reset state) |
| 230 | { |
Russell King | 7dde0c0 | 2013-07-09 10:27:12 +0100 | [diff] [blame] | 231 | int set = state == UCB_RST_REMOVE || state == UCB_RST_SUSPEND || |
| 232 | state == UCB_RST_PROBE_FAIL; |
| 233 | assabet_codec_reset(RST_UCB1X00, set); |
Russell King | 6ed3e2a | 2012-01-22 19:23:33 +0000 | [diff] [blame] | 234 | } |
| 235 | |
Russell King | 7dde0c0 | 2013-07-09 10:27:12 +0100 | [diff] [blame] | 236 | void assabet_uda1341_reset(int set) |
| 237 | { |
| 238 | assabet_codec_reset(RST_UDA1341, set); |
| 239 | } |
| 240 | EXPORT_SYMBOL(assabet_uda1341_reset); |
| 241 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 242 | |
| 243 | /* |
| 244 | * Assabet flash support code. |
| 245 | */ |
| 246 | |
| 247 | #ifdef ASSABET_REV_4 |
| 248 | /* |
| 249 | * Phase 4 Assabet has two 28F160B3 flash parts in bank 0: |
| 250 | */ |
| 251 | static struct mtd_partition assabet_partitions[] = { |
| 252 | { |
| 253 | .name = "bootloader", |
| 254 | .size = 0x00020000, |
| 255 | .offset = 0, |
| 256 | .mask_flags = MTD_WRITEABLE, |
| 257 | }, { |
| 258 | .name = "bootloader params", |
| 259 | .size = 0x00020000, |
| 260 | .offset = MTDPART_OFS_APPEND, |
| 261 | .mask_flags = MTD_WRITEABLE, |
| 262 | }, { |
| 263 | .name = "jffs", |
| 264 | .size = MTDPART_SIZ_FULL, |
| 265 | .offset = MTDPART_OFS_APPEND, |
| 266 | } |
| 267 | }; |
| 268 | #else |
| 269 | /* |
| 270 | * Phase 5 Assabet has two 28F128J3A flash parts in bank 0: |
| 271 | */ |
| 272 | static struct mtd_partition assabet_partitions[] = { |
| 273 | { |
| 274 | .name = "bootloader", |
| 275 | .size = 0x00040000, |
| 276 | .offset = 0, |
| 277 | .mask_flags = MTD_WRITEABLE, |
| 278 | }, { |
| 279 | .name = "bootloader params", |
| 280 | .size = 0x00040000, |
| 281 | .offset = MTDPART_OFS_APPEND, |
| 282 | .mask_flags = MTD_WRITEABLE, |
| 283 | }, { |
| 284 | .name = "jffs", |
| 285 | .size = MTDPART_SIZ_FULL, |
| 286 | .offset = MTDPART_OFS_APPEND, |
| 287 | } |
| 288 | }; |
| 289 | #endif |
| 290 | |
| 291 | static struct flash_platform_data assabet_flash_data = { |
| 292 | .map_name = "cfi_probe", |
| 293 | .parts = assabet_partitions, |
| 294 | .nr_parts = ARRAY_SIZE(assabet_partitions), |
| 295 | }; |
| 296 | |
| 297 | static struct resource assabet_flash_resources[] = { |
Russell King | a181099 | 2012-01-12 10:25:29 +0000 | [diff] [blame] | 298 | DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M), |
| 299 | DEFINE_RES_MEM(SA1100_CS1_PHYS, SZ_32M), |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 300 | }; |
| 301 | |
| 302 | |
| 303 | /* |
| 304 | * Assabet IrDA support code. |
| 305 | */ |
| 306 | |
| 307 | static int assabet_irda_set_power(struct device *dev, unsigned int state) |
| 308 | { |
| 309 | static unsigned int bcr_state[4] = { |
| 310 | ASSABET_BCR_IRDA_MD0, |
| 311 | ASSABET_BCR_IRDA_MD1|ASSABET_BCR_IRDA_MD0, |
| 312 | ASSABET_BCR_IRDA_MD1, |
| 313 | 0 |
| 314 | }; |
| 315 | |
Russell King | 22564bd | 2013-07-09 10:32:30 +0100 | [diff] [blame] | 316 | if (state < 4) |
| 317 | ASSABET_BCR_frob(ASSABET_BCR_IRDA_MD1 | ASSABET_BCR_IRDA_MD0, |
| 318 | bcr_state[state]); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 319 | return 0; |
| 320 | } |
| 321 | |
| 322 | static void assabet_irda_set_speed(struct device *dev, unsigned int speed) |
| 323 | { |
| 324 | if (speed < 4000000) |
| 325 | ASSABET_BCR_clear(ASSABET_BCR_IRDA_FSEL); |
| 326 | else |
| 327 | ASSABET_BCR_set(ASSABET_BCR_IRDA_FSEL); |
| 328 | } |
| 329 | |
| 330 | static struct irda_platform_data assabet_irda_data = { |
| 331 | .set_power = assabet_irda_set_power, |
| 332 | .set_speed = assabet_irda_set_speed, |
| 333 | }; |
| 334 | |
Russell King | 69dde86 | 2012-01-20 22:18:06 +0000 | [diff] [blame] | 335 | static struct ucb1x00_plat_data assabet_ucb1x00_data = { |
Russell King | 6ed3e2a | 2012-01-22 19:23:33 +0000 | [diff] [blame] | 336 | .reset = assabet_ucb1x00_reset, |
Russell King | 69dde86 | 2012-01-20 22:18:06 +0000 | [diff] [blame] | 337 | .gpio_base = -1, |
Russell King | c885775 | 2013-07-09 10:31:20 +0100 | [diff] [blame] | 338 | .can_wakeup = 1, |
Russell King | 69dde86 | 2012-01-20 22:18:06 +0000 | [diff] [blame] | 339 | }; |
| 340 | |
Russell King | 323cdfc | 2005-08-18 10:10:46 +0100 | [diff] [blame] | 341 | static struct mcp_plat_data assabet_mcp_data = { |
| 342 | .mccr0 = MCCR0_ADM, |
| 343 | .sclk_rate = 11981000, |
Russell King | 69dde86 | 2012-01-20 22:18:06 +0000 | [diff] [blame] | 344 | .codec_pdata = &assabet_ucb1x00_data, |
Russell King | 323cdfc | 2005-08-18 10:10:46 +0100 | [diff] [blame] | 345 | }; |
| 346 | |
Russell King | 086ada5 | 2012-01-14 12:03:22 +0000 | [diff] [blame] | 347 | static void assabet_lcd_set_visual(u32 visual) |
| 348 | { |
| 349 | u_int is_true_color = visual == FB_VISUAL_TRUECOLOR; |
| 350 | |
| 351 | if (machine_is_assabet()) { |
| 352 | #if 1 // phase 4 or newer Assabet's |
| 353 | if (is_true_color) |
| 354 | ASSABET_BCR_set(ASSABET_BCR_LCD_12RGB); |
| 355 | else |
| 356 | ASSABET_BCR_clear(ASSABET_BCR_LCD_12RGB); |
| 357 | #else |
| 358 | // older Assabet's |
| 359 | if (is_true_color) |
| 360 | ASSABET_BCR_clear(ASSABET_BCR_LCD_12RGB); |
| 361 | else |
| 362 | ASSABET_BCR_set(ASSABET_BCR_LCD_12RGB); |
| 363 | #endif |
| 364 | } |
| 365 | } |
| 366 | |
Russell King | e1b7a72 | 2012-01-14 11:50:04 +0000 | [diff] [blame] | 367 | #ifndef ASSABET_PAL_VIDEO |
Russell King | 086ada5 | 2012-01-14 12:03:22 +0000 | [diff] [blame] | 368 | static void assabet_lcd_backlight_power(int on) |
| 369 | { |
| 370 | if (on) |
| 371 | ASSABET_BCR_set(ASSABET_BCR_LIGHT_ON); |
| 372 | else |
| 373 | ASSABET_BCR_clear(ASSABET_BCR_LIGHT_ON); |
| 374 | } |
| 375 | |
| 376 | /* |
| 377 | * Turn on/off the backlight. When turning the backlight on, we wait |
| 378 | * 500us after turning it on so we don't cause the supplies to droop |
| 379 | * when we enable the LCD controller (and cause a hard reset.) |
| 380 | */ |
| 381 | static void assabet_lcd_power(int on) |
| 382 | { |
| 383 | if (on) { |
| 384 | ASSABET_BCR_set(ASSABET_BCR_LCD_ON); |
| 385 | udelay(500); |
| 386 | } else |
| 387 | ASSABET_BCR_clear(ASSABET_BCR_LCD_ON); |
| 388 | } |
| 389 | |
Russell King | e1b7a72 | 2012-01-14 11:50:04 +0000 | [diff] [blame] | 390 | /* |
| 391 | * The assabet uses a sharp LQ039Q2DS54 LCD module. It is actually |
| 392 | * takes an RGB666 signal, but we provide it with an RGB565 signal |
| 393 | * instead (def_rgb_16). |
| 394 | */ |
| 395 | static struct sa1100fb_mach_info lq039q2ds54_info = { |
| 396 | .pixclock = 171521, .bpp = 16, |
| 397 | .xres = 320, .yres = 240, |
| 398 | |
| 399 | .hsync_len = 5, .vsync_len = 1, |
| 400 | .left_margin = 61, .upper_margin = 3, |
| 401 | .right_margin = 9, .lower_margin = 0, |
| 402 | |
| 403 | .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, |
| 404 | |
| 405 | .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act, |
| 406 | .lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2), |
Russell King | 086ada5 | 2012-01-14 12:03:22 +0000 | [diff] [blame] | 407 | |
| 408 | .backlight_power = assabet_lcd_backlight_power, |
| 409 | .lcd_power = assabet_lcd_power, |
| 410 | .set_visual = assabet_lcd_set_visual, |
Russell King | e1b7a72 | 2012-01-14 11:50:04 +0000 | [diff] [blame] | 411 | }; |
| 412 | #else |
Russell King | 086ada5 | 2012-01-14 12:03:22 +0000 | [diff] [blame] | 413 | static void assabet_pal_backlight_power(int on) |
| 414 | { |
| 415 | ASSABET_BCR_clear(ASSABET_BCR_LIGHT_ON); |
| 416 | } |
| 417 | |
| 418 | static void assabet_pal_power(int on) |
| 419 | { |
| 420 | ASSABET_BCR_clear(ASSABET_BCR_LCD_ON); |
| 421 | } |
| 422 | |
Russell King | e1b7a72 | 2012-01-14 11:50:04 +0000 | [diff] [blame] | 423 | static struct sa1100fb_mach_info pal_info = { |
| 424 | .pixclock = 67797, .bpp = 16, |
| 425 | .xres = 640, .yres = 512, |
| 426 | |
| 427 | .hsync_len = 64, .vsync_len = 6, |
| 428 | .left_margin = 125, .upper_margin = 70, |
| 429 | .right_margin = 115, .lower_margin = 36, |
| 430 | |
| 431 | .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act, |
| 432 | .lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(512), |
Russell King | 086ada5 | 2012-01-14 12:03:22 +0000 | [diff] [blame] | 433 | |
| 434 | .backlight_power = assabet_pal_backlight_power, |
| 435 | .lcd_power = assabet_pal_power, |
| 436 | .set_visual = assabet_lcd_set_visual, |
Russell King | e1b7a72 | 2012-01-14 11:50:04 +0000 | [diff] [blame] | 437 | }; |
| 438 | #endif |
| 439 | |
Russell King | bab50a3 | 2012-01-26 11:50:23 +0000 | [diff] [blame] | 440 | #ifdef CONFIG_ASSABET_NEPONSET |
| 441 | static struct resource neponset_resources[] = { |
| 442 | DEFINE_RES_MEM(0x10000000, 0x08000000), |
| 443 | DEFINE_RES_MEM(0x18000000, 0x04000000), |
| 444 | DEFINE_RES_MEM(0x40000000, SZ_8K), |
| 445 | DEFINE_RES_IRQ(IRQ_GPIO25), |
| 446 | }; |
| 447 | #endif |
| 448 | |
Russell King | 29786e9 | 2016-08-31 08:49:47 +0100 | [diff] [blame] | 449 | static struct gpiod_lookup_table assabet_cf_gpio_table = { |
| 450 | .dev_id = "sa11x0-pcmcia.1", |
| 451 | .table = { |
| 452 | GPIO_LOOKUP("gpio", 21, "ready", GPIO_ACTIVE_HIGH), |
| 453 | GPIO_LOOKUP("gpio", 22, "detect", GPIO_ACTIVE_LOW), |
| 454 | GPIO_LOOKUP("gpio", 24, "bvd2", GPIO_ACTIVE_HIGH), |
| 455 | GPIO_LOOKUP("gpio", 25, "bvd1", GPIO_ACTIVE_HIGH), |
| 456 | GPIO_LOOKUP("assabet", 1, "reset", GPIO_ACTIVE_HIGH), |
| 457 | GPIO_LOOKUP("assabet", 7, "bus-enable", GPIO_ACTIVE_LOW), |
| 458 | { }, |
| 459 | }, |
| 460 | }; |
| 461 | |
| 462 | static struct regulator_consumer_supply assabet_cf_vcc_consumers[] = { |
| 463 | REGULATOR_SUPPLY("vcc", "sa11x0-pcmcia.1"), |
| 464 | }; |
| 465 | |
| 466 | static struct fixed_voltage_config assabet_cf_vcc_pdata __initdata = { |
| 467 | .supply_name = "cf-power", |
| 468 | .microvolts = 3300000, |
Russell King | 29786e9 | 2016-08-31 08:49:47 +0100 | [diff] [blame] | 469 | }; |
| 470 | |
Linus Walleij | efdfeb0 | 2018-09-06 14:24:36 +0200 | [diff] [blame] | 471 | static struct gpiod_lookup_table assabet_cf_vcc_gpio_table = { |
| 472 | .dev_id = "reg-fixed-voltage.0", |
| 473 | .table = { |
| 474 | GPIO_LOOKUP("assabet", 0, NULL, GPIO_ACTIVE_HIGH), |
| 475 | { }, |
| 476 | }, |
| 477 | }; |
| 478 | |
Russell King | 59b23ea | 2016-08-31 08:49:50 +0100 | [diff] [blame] | 479 | static struct gpio_led assabet_leds[] __initdata = { |
| 480 | { |
| 481 | .name = "assabet:red", |
| 482 | .default_trigger = "cpu0", |
| 483 | .active_low = 1, |
| 484 | .default_state = LEDS_GPIO_DEFSTATE_KEEP, |
| 485 | }, { |
| 486 | .name = "assabet:green", |
| 487 | .default_trigger = "heartbeat", |
| 488 | .active_low = 1, |
| 489 | .default_state = LEDS_GPIO_DEFSTATE_KEEP, |
| 490 | }, |
| 491 | }; |
| 492 | |
| 493 | static const struct gpio_led_platform_data assabet_leds_pdata __initconst = { |
| 494 | .num_leds = ARRAY_SIZE(assabet_leds), |
| 495 | .leds = assabet_leds, |
| 496 | }; |
| 497 | |
Russell King | 17c7f4f | 2016-08-31 08:49:50 +0100 | [diff] [blame] | 498 | static struct gpio_keys_button assabet_keys_buttons[] = { |
| 499 | { |
| 500 | .gpio = 0, |
| 501 | .irq = IRQ_GPIO0, |
| 502 | .desc = "gpio0", |
| 503 | .wakeup = 1, |
| 504 | .can_disable = 1, |
| 505 | .debounce_interval = 5, |
| 506 | }, { |
| 507 | .gpio = 1, |
| 508 | .irq = IRQ_GPIO1, |
| 509 | .desc = "gpio1", |
| 510 | .wakeup = 1, |
| 511 | .can_disable = 1, |
| 512 | .debounce_interval = 5, |
| 513 | }, |
| 514 | }; |
| 515 | |
| 516 | static const struct gpio_keys_platform_data assabet_keys_pdata = { |
| 517 | .buttons = assabet_keys_buttons, |
| 518 | .nbuttons = ARRAY_SIZE(assabet_keys_buttons), |
| 519 | .rep = 0, |
| 520 | }; |
| 521 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 522 | static void __init assabet_init(void) |
| 523 | { |
| 524 | /* |
| 525 | * Ensure that the power supply is in "high power" mode. |
| 526 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 527 | GPSR = GPIO_GPIO16; |
Russell King | 4f592e6 | 2012-01-24 09:23:19 +0000 | [diff] [blame] | 528 | GPDR |= GPIO_GPIO16; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 529 | |
| 530 | /* |
| 531 | * Ensure that these pins are set as outputs and are driving |
| 532 | * logic 0. This ensures that we won't inadvertently toggle |
| 533 | * the WS latch in the CPLD, and we don't float causing |
| 534 | * excessive power drain. --rmk |
| 535 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 536 | GPCR = GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM; |
Russell King | 4f592e6 | 2012-01-24 09:23:19 +0000 | [diff] [blame] | 537 | GPDR |= GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 538 | |
| 539 | /* |
Russell King | 49e01e3 | 2012-01-24 09:25:57 +0000 | [diff] [blame] | 540 | * Also set GPIO27 as an output; this is used to clock UART3 |
| 541 | * via the FPGA and as otherwise has no pullups or pulldowns, |
| 542 | * so stop it floating. |
| 543 | */ |
| 544 | GPCR = GPIO_GPIO27; |
| 545 | GPDR |= GPIO_GPIO27; |
| 546 | |
| 547 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 548 | * Set up registers for sleep mode. |
| 549 | */ |
| 550 | PWER = PWER_GPIO0; |
| 551 | PGSR = 0; |
| 552 | PCFR = 0; |
| 553 | PSDR = 0; |
| 554 | PPDR |= PPC_TXD3 | PPC_TXD1; |
| 555 | PPSR |= PPC_TXD3 | PPC_TXD1; |
| 556 | |
Russell King | e36e26a | 2012-01-20 22:24:07 +0000 | [diff] [blame] | 557 | sa11x0_ppc_configure_mcp(); |
| 558 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 559 | if (machine_has_neponset()) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 560 | #ifndef CONFIG_ASSABET_NEPONSET |
| 561 | printk( "Warning: Neponset detected but full support " |
| 562 | "hasn't been configured in the kernel\n" ); |
Russell King | bab50a3 | 2012-01-26 11:50:23 +0000 | [diff] [blame] | 563 | #else |
| 564 | platform_device_register_simple("neponset", 0, |
| 565 | neponset_resources, ARRAY_SIZE(neponset_resources)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 566 | #endif |
Russell King | 29786e9 | 2016-08-31 08:49:47 +0100 | [diff] [blame] | 567 | } else { |
Linus Walleij | efdfeb0 | 2018-09-06 14:24:36 +0200 | [diff] [blame] | 568 | gpiod_add_lookup_table(&assabet_cf_vcc_gpio_table); |
Russell King | 29786e9 | 2016-08-31 08:49:47 +0100 | [diff] [blame] | 569 | sa11x0_register_fixed_regulator(0, &assabet_cf_vcc_pdata, |
Linus Walleij | efdfeb0 | 2018-09-06 14:24:36 +0200 | [diff] [blame] | 570 | assabet_cf_vcc_consumers, |
| 571 | ARRAY_SIZE(assabet_cf_vcc_consumers), |
| 572 | true); |
Russell King | 29786e9 | 2016-08-31 08:49:47 +0100 | [diff] [blame] | 573 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 574 | } |
| 575 | |
Russell King | 17c7f4f | 2016-08-31 08:49:50 +0100 | [diff] [blame] | 576 | platform_device_register_resndata(NULL, "gpio-keys", 0, |
| 577 | NULL, 0, |
| 578 | &assabet_keys_pdata, |
| 579 | sizeof(assabet_keys_pdata)); |
| 580 | |
Russell King | 59b23ea | 2016-08-31 08:49:50 +0100 | [diff] [blame] | 581 | gpio_led_register_device(-1, &assabet_leds_pdata); |
| 582 | |
Russell King | e1b7a72 | 2012-01-14 11:50:04 +0000 | [diff] [blame] | 583 | #ifndef ASSABET_PAL_VIDEO |
| 584 | sa11x0_register_lcd(&lq039q2ds54_info); |
| 585 | #else |
| 586 | sa11x0_register_lcd(&pal_video); |
| 587 | #endif |
Russell King | 7a5b4e1 | 2009-10-06 14:55:53 +0100 | [diff] [blame] | 588 | sa11x0_register_mtd(&assabet_flash_data, assabet_flash_resources, |
| 589 | ARRAY_SIZE(assabet_flash_resources)); |
| 590 | sa11x0_register_irda(&assabet_irda_data); |
| 591 | sa11x0_register_mcp(&assabet_mcp_data); |
Russell King | 29786e9 | 2016-08-31 08:49:47 +0100 | [diff] [blame] | 592 | |
| 593 | if (!machine_has_neponset()) |
| 594 | sa11x0_register_pcmcia(1, &assabet_cf_gpio_table); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 595 | } |
| 596 | |
| 597 | /* |
| 598 | * On Assabet, we must probe for the Neponset board _before_ |
| 599 | * paging_init() has occurred to actually determine the amount |
| 600 | * of RAM available. To do so, we map the appropriate IO section |
| 601 | * in the page table here in order to access GPIO registers. |
| 602 | */ |
| 603 | static void __init map_sa1100_gpio_regs( void ) |
| 604 | { |
| 605 | unsigned long phys = __PREG(GPLR) & PMD_MASK; |
Russell King | 3169663 | 2012-06-06 11:42:36 +0100 | [diff] [blame] | 606 | unsigned long virt = (unsigned long)io_p2v(phys); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 607 | int prot = PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_DOMAIN(DOMAIN_IO); |
| 608 | pmd_t *pmd; |
| 609 | |
Russell King | a61c233 | 2012-01-14 16:10:53 +0000 | [diff] [blame] | 610 | pmd = pmd_offset(pud_offset(pgd_offset_k(virt), virt), virt); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 611 | *pmd = __pmd(phys | prot); |
| 612 | flush_pmd_entry(pmd); |
| 613 | } |
| 614 | |
| 615 | /* |
| 616 | * Read System Configuration "Register" |
| 617 | * (taken from "Intel StrongARM SA-1110 Microprocessor Development Board |
| 618 | * User's Guide", section 4.4.1) |
| 619 | * |
| 620 | * This same scan is performed in arch/arm/boot/compressed/head-sa1100.S |
| 621 | * to set up the serial port for decompression status messages. We |
| 622 | * repeat it here because the kernel may not be loaded as a zImage, and |
| 623 | * also because it's a hassle to communicate the SCR value to the kernel |
| 624 | * from the decompressor. |
| 625 | * |
| 626 | * Note that IRQs are guaranteed to be disabled. |
| 627 | */ |
| 628 | static void __init get_assabet_scr(void) |
| 629 | { |
Arnd Bergmann | c6e9fbb | 2012-04-30 12:41:21 +0000 | [diff] [blame] | 630 | unsigned long uninitialized_var(scr), i; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 631 | |
| 632 | GPDR |= 0x3fc; /* Configure GPIO 9:2 as outputs */ |
| 633 | GPSR = 0x3fc; /* Write 0xFF to GPIO 9:2 */ |
| 634 | GPDR &= ~(0x3fc); /* Configure GPIO 9:2 as inputs */ |
Russell King | 2f3eca8 | 2005-11-21 17:01:13 +0000 | [diff] [blame] | 635 | for(i = 100; i--; ) /* Read GPIO 9:2 */ |
| 636 | scr = GPLR; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 637 | GPDR |= 0x3fc; /* restore correct pin direction */ |
| 638 | scr &= 0x3fc; /* save as system configuration byte. */ |
| 639 | SCR_value = scr; |
| 640 | } |
| 641 | |
| 642 | static void __init |
Laura Abbott | 1c2f87c | 2014-04-13 22:54:58 +0100 | [diff] [blame] | 643 | fixup_assabet(struct tag *tags, char **cmdline) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 644 | { |
| 645 | /* This must be done before any call to machine_has_neponset() */ |
| 646 | map_sa1100_gpio_regs(); |
| 647 | get_assabet_scr(); |
| 648 | |
| 649 | if (machine_has_neponset()) |
| 650 | printk("Neponset expansion board detected\n"); |
| 651 | } |
| 652 | |
| 653 | |
| 654 | static void assabet_uart_pm(struct uart_port *port, u_int state, u_int oldstate) |
| 655 | { |
| 656 | if (port->mapbase == _Ser1UTCR0) { |
| 657 | if (state) |
| 658 | ASSABET_BCR_clear(ASSABET_BCR_RS232EN | |
| 659 | ASSABET_BCR_COM_RTS | |
| 660 | ASSABET_BCR_COM_DTR); |
| 661 | else |
| 662 | ASSABET_BCR_set(ASSABET_BCR_RS232EN | |
| 663 | ASSABET_BCR_COM_RTS | |
| 664 | ASSABET_BCR_COM_DTR); |
| 665 | } |
| 666 | } |
| 667 | |
| 668 | /* |
| 669 | * Assabet uses COM_RTS and COM_DTR for both UART1 (com port) |
| 670 | * and UART3 (radio module). We only handle them for UART1 here. |
| 671 | */ |
| 672 | static void assabet_set_mctrl(struct uart_port *port, u_int mctrl) |
| 673 | { |
| 674 | if (port->mapbase == _Ser1UTCR0) { |
| 675 | u_int set = 0, clear = 0; |
| 676 | |
| 677 | if (mctrl & TIOCM_RTS) |
| 678 | clear |= ASSABET_BCR_COM_RTS; |
| 679 | else |
| 680 | set |= ASSABET_BCR_COM_RTS; |
| 681 | |
| 682 | if (mctrl & TIOCM_DTR) |
| 683 | clear |= ASSABET_BCR_COM_DTR; |
| 684 | else |
| 685 | set |= ASSABET_BCR_COM_DTR; |
| 686 | |
| 687 | ASSABET_BCR_clear(clear); |
| 688 | ASSABET_BCR_set(set); |
| 689 | } |
| 690 | } |
| 691 | |
| 692 | static u_int assabet_get_mctrl(struct uart_port *port) |
| 693 | { |
| 694 | u_int ret = 0; |
| 695 | u_int bsr = ASSABET_BSR; |
| 696 | |
| 697 | /* need 2 reads to read current value */ |
| 698 | bsr = ASSABET_BSR; |
| 699 | |
| 700 | if (port->mapbase == _Ser1UTCR0) { |
| 701 | if (bsr & ASSABET_BSR_COM_DCD) |
| 702 | ret |= TIOCM_CD; |
| 703 | if (bsr & ASSABET_BSR_COM_CTS) |
| 704 | ret |= TIOCM_CTS; |
| 705 | if (bsr & ASSABET_BSR_COM_DSR) |
| 706 | ret |= TIOCM_DSR; |
| 707 | } else if (port->mapbase == _Ser3UTCR0) { |
| 708 | if (bsr & ASSABET_BSR_RAD_DCD) |
| 709 | ret |= TIOCM_CD; |
| 710 | if (bsr & ASSABET_BSR_RAD_CTS) |
| 711 | ret |= TIOCM_CTS; |
| 712 | if (bsr & ASSABET_BSR_RAD_DSR) |
| 713 | ret |= TIOCM_DSR; |
| 714 | if (bsr & ASSABET_BSR_RAD_RI) |
| 715 | ret |= TIOCM_RI; |
| 716 | } else { |
| 717 | ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR; |
| 718 | } |
| 719 | |
| 720 | return ret; |
| 721 | } |
| 722 | |
| 723 | static struct sa1100_port_fns assabet_port_fns __initdata = { |
| 724 | .set_mctrl = assabet_set_mctrl, |
| 725 | .get_mctrl = assabet_get_mctrl, |
| 726 | .pm = assabet_uart_pm, |
| 727 | }; |
| 728 | |
| 729 | static struct map_desc assabet_io_desc[] __initdata = { |
Deepak Saxena | 92519d8 | 2005-10-28 15:19:04 +0100 | [diff] [blame] | 730 | { /* Board Control Register */ |
| 731 | .virtual = 0xf1000000, |
| 732 | .pfn = __phys_to_pfn(0x12000000), |
| 733 | .length = 0x00100000, |
| 734 | .type = MT_DEVICE |
| 735 | }, { /* MQ200 */ |
| 736 | .virtual = 0xf2800000, |
| 737 | .pfn = __phys_to_pfn(0x4b800000), |
| 738 | .length = 0x00800000, |
| 739 | .type = MT_DEVICE |
| 740 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 741 | }; |
| 742 | |
| 743 | static void __init assabet_map_io(void) |
| 744 | { |
| 745 | sa1100_map_io(); |
| 746 | iotable_init(assabet_io_desc, ARRAY_SIZE(assabet_io_desc)); |
| 747 | |
| 748 | /* |
| 749 | * Set SUS bit in SDCR0 so serial port 1 functions. |
| 750 | * Its called GPCLKR0 in my SA1110 manual. |
| 751 | */ |
| 752 | Ser1SDCR0 |= SDCR0_SUS; |
Russell King | f3964fe | 2013-10-16 00:09:02 +0100 | [diff] [blame] | 753 | MSC1 = (MSC1 & ~0xffff) | |
| 754 | MSC_NonBrst | MSC_32BitStMem | |
| 755 | MSC_RdAcc(2) | MSC_WrAcc(2) | MSC_Rec(0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 756 | |
Russell King | 374da9d | 2012-03-25 23:54:16 +0100 | [diff] [blame] | 757 | if (!machine_has_neponset()) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 758 | sa1100_register_uart_fns(&assabet_port_fns); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 759 | |
| 760 | /* |
| 761 | * When Neponset is attached, the first UART should be |
| 762 | * UART3. That's what Angel is doing and many documents |
| 763 | * are stating this. |
| 764 | * |
| 765 | * We do the Neponset mapping even if Neponset support |
| 766 | * isn't compiled in so the user will still get something on |
| 767 | * the expected physical serial port. |
| 768 | * |
| 769 | * We no longer do this; not all boot loaders support it, |
| 770 | * and UART3 appears to be somewhat unreliable with blob. |
| 771 | */ |
| 772 | sa1100_register_uart(0, 1); |
| 773 | sa1100_register_uart(2, 3); |
| 774 | } |
| 775 | |
Russell King | b955153 | 2016-08-31 08:49:45 +0100 | [diff] [blame] | 776 | void __init assabet_init_irq(void) |
| 777 | { |
Russell King | 59b23ea | 2016-08-31 08:49:50 +0100 | [diff] [blame] | 778 | unsigned int assabet_gpio_base; |
Russell King | b955153 | 2016-08-31 08:49:45 +0100 | [diff] [blame] | 779 | u32 def_val; |
| 780 | |
| 781 | sa1100_init_irq(); |
| 782 | |
| 783 | if (machine_has_neponset()) |
| 784 | def_val = ASSABET_BCR_DB1111; |
| 785 | else |
| 786 | def_val = ASSABET_BCR_DB1110; |
| 787 | |
| 788 | /* |
| 789 | * Angel sets this, but other bootloaders may not. |
| 790 | * |
| 791 | * This must precede any driver calls to BCR_set() or BCR_clear(). |
| 792 | */ |
Russell King | 59b23ea | 2016-08-31 08:49:50 +0100 | [diff] [blame] | 793 | assabet_gpio_base = assabet_init_gpio((void *)&ASSABET_BCR, def_val); |
| 794 | |
| 795 | assabet_leds[0].gpio = assabet_gpio_base + 13; |
| 796 | assabet_leds[1].gpio = assabet_gpio_base + 14; |
Russell King | b955153 | 2016-08-31 08:49:45 +0100 | [diff] [blame] | 797 | } |
| 798 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 799 | MACHINE_START(ASSABET, "Intel-Assabet") |
Nicolas Pitre | 17f4425 | 2011-07-05 22:38:17 -0400 | [diff] [blame] | 800 | .atag_offset = 0x100, |
Russell King | e9dea0c | 2005-07-03 17:38:58 +0100 | [diff] [blame] | 801 | .fixup = fixup_assabet, |
| 802 | .map_io = assabet_map_io, |
Rob Herring | f314f33 | 2012-02-24 00:06:51 +0100 | [diff] [blame] | 803 | .nr_irqs = SA1100_NR_IRQS, |
Russell King | b955153 | 2016-08-31 08:49:45 +0100 | [diff] [blame] | 804 | .init_irq = assabet_init_irq, |
Stephen Warren | 6bb27d7 | 2012-11-08 12:40:59 -0700 | [diff] [blame] | 805 | .init_time = sa1100_timer_init, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 806 | .init_machine = assabet_init, |
Shawn Guo | 7fea1ba | 2012-04-26 21:22:45 +0800 | [diff] [blame] | 807 | .init_late = sa11x0_init_late, |
Nicolas Pitre | e9107ab | 2011-07-05 22:28:09 -0400 | [diff] [blame] | 808 | #ifdef CONFIG_SA1111 |
| 809 | .dma_zone_size = SZ_1M, |
| 810 | #endif |
Russell King | d9ca583 | 2011-11-05 10:28:50 +0000 | [diff] [blame] | 811 | .restart = sa11x0_restart, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 812 | MACHINE_END |