blob: 74b5f81678c2fb52c8b6f78aed48608593d73238 [file] [log] [blame]
Marc Zyngier6d6ec202015-10-19 18:02:48 +01001/*
2 * Copyright (C) 2012-2015 - ARM Ltd
3 * Author: Marc Zyngier <marc.zyngier@arm.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program. If not, see <http://www.gnu.org/licenses/>.
16 */
17
18#include <linux/compiler.h>
19#include <linux/kvm_host.h>
20
Marc Zyngier9d8415d2015-10-25 19:57:11 +000021#include <asm/kvm_asm.h>
Marc Zyngier6d6ec202015-10-19 18:02:48 +010022#include <asm/kvm_mmu.h>
23
24#include "hyp.h"
25
Marc Zyngierd1526e52015-10-28 13:59:46 +000026/* Yes, this does nothing, on purpose */
27static void __hyp_text __sysreg_do_nothing(struct kvm_cpu_context *ctxt) { }
28
Marc Zyngier9c6c3562015-10-28 12:39:38 +000029/*
30 * Non-VHE: Both host and guest must save everything.
31 *
32 * VHE: Host must save tpidr*_el[01], actlr_el1, sp0, pc, pstate, and
33 * guest must save everything.
34 */
35
36static void __hyp_text __sysreg_save_common_state(struct kvm_cpu_context *ctxt)
37{
38 ctxt->sys_regs[ACTLR_EL1] = read_sysreg(actlr_el1);
39 ctxt->sys_regs[TPIDR_EL0] = read_sysreg(tpidr_el0);
40 ctxt->sys_regs[TPIDRRO_EL0] = read_sysreg(tpidrro_el0);
41 ctxt->sys_regs[TPIDR_EL1] = read_sysreg(tpidr_el1);
42 ctxt->gp_regs.regs.sp = read_sysreg(sp_el0);
Marc Zyngier094f8232015-10-28 12:56:25 +000043 ctxt->gp_regs.regs.pc = read_sysreg_el2(elr);
44 ctxt->gp_regs.regs.pstate = read_sysreg_el2(spsr);
Marc Zyngier9c6c3562015-10-28 12:39:38 +000045}
46
Marc Zyngieredef5282015-10-28 12:17:35 +000047static void __hyp_text __sysreg_save_state(struct kvm_cpu_context *ctxt)
Marc Zyngier6d6ec202015-10-19 18:02:48 +010048{
49 ctxt->sys_regs[MPIDR_EL1] = read_sysreg(vmpidr_el2);
50 ctxt->sys_regs[CSSELR_EL1] = read_sysreg(csselr_el1);
Marc Zyngier094f8232015-10-28 12:56:25 +000051 ctxt->sys_regs[SCTLR_EL1] = read_sysreg_el1(sctlr);
52 ctxt->sys_regs[CPACR_EL1] = read_sysreg_el1(cpacr);
53 ctxt->sys_regs[TTBR0_EL1] = read_sysreg_el1(ttbr0);
54 ctxt->sys_regs[TTBR1_EL1] = read_sysreg_el1(ttbr1);
55 ctxt->sys_regs[TCR_EL1] = read_sysreg_el1(tcr);
56 ctxt->sys_regs[ESR_EL1] = read_sysreg_el1(esr);
57 ctxt->sys_regs[AFSR0_EL1] = read_sysreg_el1(afsr0);
58 ctxt->sys_regs[AFSR1_EL1] = read_sysreg_el1(afsr1);
59 ctxt->sys_regs[FAR_EL1] = read_sysreg_el1(far);
60 ctxt->sys_regs[MAIR_EL1] = read_sysreg_el1(mair);
61 ctxt->sys_regs[VBAR_EL1] = read_sysreg_el1(vbar);
62 ctxt->sys_regs[CONTEXTIDR_EL1] = read_sysreg_el1(contextidr);
63 ctxt->sys_regs[AMAIR_EL1] = read_sysreg_el1(amair);
64 ctxt->sys_regs[CNTKCTL_EL1] = read_sysreg_el1(cntkctl);
Marc Zyngier6d6ec202015-10-19 18:02:48 +010065 ctxt->sys_regs[PAR_EL1] = read_sysreg(par_el1);
66 ctxt->sys_regs[MDSCR_EL1] = read_sysreg(mdscr_el1);
67
Marc Zyngier6d6ec202015-10-19 18:02:48 +010068 ctxt->gp_regs.sp_el1 = read_sysreg(sp_el1);
Marc Zyngier094f8232015-10-28 12:56:25 +000069 ctxt->gp_regs.elr_el1 = read_sysreg_el1(elr);
70 ctxt->gp_regs.spsr[KVM_SPSR_EL1]= read_sysreg_el1(spsr);
Marc Zyngier6d6ec202015-10-19 18:02:48 +010071}
72
Marc Zyngierd1526e52015-10-28 13:59:46 +000073static hyp_alternate_select(__sysreg_call_save_host_state,
74 __sysreg_save_state, __sysreg_do_nothing,
75 ARM64_HAS_VIRT_HOST_EXTN);
76
Marc Zyngieredef5282015-10-28 12:17:35 +000077void __hyp_text __sysreg_save_host_state(struct kvm_cpu_context *ctxt)
78{
Marc Zyngierd1526e52015-10-28 13:59:46 +000079 __sysreg_call_save_host_state()(ctxt);
Marc Zyngier9c6c3562015-10-28 12:39:38 +000080 __sysreg_save_common_state(ctxt);
Marc Zyngieredef5282015-10-28 12:17:35 +000081}
82
83void __hyp_text __sysreg_save_guest_state(struct kvm_cpu_context *ctxt)
84{
85 __sysreg_save_state(ctxt);
Marc Zyngier9c6c3562015-10-28 12:39:38 +000086 __sysreg_save_common_state(ctxt);
87}
88
89static void __hyp_text __sysreg_restore_common_state(struct kvm_cpu_context *ctxt)
90{
91 write_sysreg(ctxt->sys_regs[ACTLR_EL1], actlr_el1);
92 write_sysreg(ctxt->sys_regs[TPIDR_EL0], tpidr_el0);
93 write_sysreg(ctxt->sys_regs[TPIDRRO_EL0], tpidrro_el0);
94 write_sysreg(ctxt->sys_regs[TPIDR_EL1], tpidr_el1);
95 write_sysreg(ctxt->gp_regs.regs.sp, sp_el0);
Marc Zyngier094f8232015-10-28 12:56:25 +000096 write_sysreg_el2(ctxt->gp_regs.regs.pc, elr);
97 write_sysreg_el2(ctxt->gp_regs.regs.pstate, spsr);
Marc Zyngieredef5282015-10-28 12:17:35 +000098}
99
100static void __hyp_text __sysreg_restore_state(struct kvm_cpu_context *ctxt)
Marc Zyngier6d6ec202015-10-19 18:02:48 +0100101{
Marc Zyngier094f8232015-10-28 12:56:25 +0000102 write_sysreg(ctxt->sys_regs[MPIDR_EL1], vmpidr_el2);
103 write_sysreg(ctxt->sys_regs[CSSELR_EL1], csselr_el1);
104 write_sysreg_el1(ctxt->sys_regs[SCTLR_EL1], sctlr);
105 write_sysreg_el1(ctxt->sys_regs[CPACR_EL1], cpacr);
106 write_sysreg_el1(ctxt->sys_regs[TTBR0_EL1], ttbr0);
107 write_sysreg_el1(ctxt->sys_regs[TTBR1_EL1], ttbr1);
108 write_sysreg_el1(ctxt->sys_regs[TCR_EL1], tcr);
109 write_sysreg_el1(ctxt->sys_regs[ESR_EL1], esr);
110 write_sysreg_el1(ctxt->sys_regs[AFSR0_EL1], afsr0);
111 write_sysreg_el1(ctxt->sys_regs[AFSR1_EL1], afsr1);
112 write_sysreg_el1(ctxt->sys_regs[FAR_EL1], far);
113 write_sysreg_el1(ctxt->sys_regs[MAIR_EL1], mair);
114 write_sysreg_el1(ctxt->sys_regs[VBAR_EL1], vbar);
115 write_sysreg_el1(ctxt->sys_regs[CONTEXTIDR_EL1],contextidr);
116 write_sysreg_el1(ctxt->sys_regs[AMAIR_EL1], amair);
117 write_sysreg_el1(ctxt->sys_regs[CNTKCTL_EL1], cntkctl);
118 write_sysreg(ctxt->sys_regs[PAR_EL1], par_el1);
119 write_sysreg(ctxt->sys_regs[MDSCR_EL1], mdscr_el1);
Marc Zyngier6d6ec202015-10-19 18:02:48 +0100120
Marc Zyngier094f8232015-10-28 12:56:25 +0000121 write_sysreg(ctxt->gp_regs.sp_el1, sp_el1);
122 write_sysreg_el1(ctxt->gp_regs.elr_el1, elr);
123 write_sysreg_el1(ctxt->gp_regs.spsr[KVM_SPSR_EL1],spsr);
Marc Zyngier6d6ec202015-10-19 18:02:48 +0100124}
Marc Zyngierc209ec82015-10-19 19:28:29 +0100125
Marc Zyngierd1526e52015-10-28 13:59:46 +0000126static hyp_alternate_select(__sysreg_call_restore_host_state,
127 __sysreg_restore_state, __sysreg_do_nothing,
128 ARM64_HAS_VIRT_HOST_EXTN);
129
Marc Zyngieredef5282015-10-28 12:17:35 +0000130void __hyp_text __sysreg_restore_host_state(struct kvm_cpu_context *ctxt)
131{
Marc Zyngierd1526e52015-10-28 13:59:46 +0000132 __sysreg_call_restore_host_state()(ctxt);
Marc Zyngier9c6c3562015-10-28 12:39:38 +0000133 __sysreg_restore_common_state(ctxt);
Marc Zyngieredef5282015-10-28 12:17:35 +0000134}
135
136void __hyp_text __sysreg_restore_guest_state(struct kvm_cpu_context *ctxt)
137{
138 __sysreg_restore_state(ctxt);
Marc Zyngier9c6c3562015-10-28 12:39:38 +0000139 __sysreg_restore_common_state(ctxt);
Marc Zyngieredef5282015-10-28 12:17:35 +0000140}
141
Marc Zyngierc209ec82015-10-19 19:28:29 +0100142void __hyp_text __sysreg32_save_state(struct kvm_vcpu *vcpu)
143{
144 u64 *spsr, *sysreg;
145
146 if (read_sysreg(hcr_el2) & HCR_RW)
147 return;
148
149 spsr = vcpu->arch.ctxt.gp_regs.spsr;
150 sysreg = vcpu->arch.ctxt.sys_regs;
151
152 spsr[KVM_SPSR_ABT] = read_sysreg(spsr_abt);
153 spsr[KVM_SPSR_UND] = read_sysreg(spsr_und);
154 spsr[KVM_SPSR_IRQ] = read_sysreg(spsr_irq);
155 spsr[KVM_SPSR_FIQ] = read_sysreg(spsr_fiq);
156
157 sysreg[DACR32_EL2] = read_sysreg(dacr32_el2);
158 sysreg[IFSR32_EL2] = read_sysreg(ifsr32_el2);
159
Marc Zyngierc13d1682015-10-26 08:34:09 +0000160 if (__fpsimd_enabled())
Marc Zyngierc209ec82015-10-19 19:28:29 +0100161 sysreg[FPEXC32_EL2] = read_sysreg(fpexc32_el2);
162
163 if (vcpu->arch.debug_flags & KVM_ARM64_DEBUG_DIRTY)
164 sysreg[DBGVCR32_EL2] = read_sysreg(dbgvcr32_el2);
165}
166
167void __hyp_text __sysreg32_restore_state(struct kvm_vcpu *vcpu)
168{
169 u64 *spsr, *sysreg;
170
171 if (read_sysreg(hcr_el2) & HCR_RW)
172 return;
173
174 spsr = vcpu->arch.ctxt.gp_regs.spsr;
175 sysreg = vcpu->arch.ctxt.sys_regs;
176
177 write_sysreg(spsr[KVM_SPSR_ABT], spsr_abt);
178 write_sysreg(spsr[KVM_SPSR_UND], spsr_und);
179 write_sysreg(spsr[KVM_SPSR_IRQ], spsr_irq);
180 write_sysreg(spsr[KVM_SPSR_FIQ], spsr_fiq);
181
182 write_sysreg(sysreg[DACR32_EL2], dacr32_el2);
183 write_sysreg(sysreg[IFSR32_EL2], ifsr32_el2);
184
185 if (vcpu->arch.debug_flags & KVM_ARM64_DEBUG_DIRTY)
186 write_sysreg(sysreg[DBGVCR32_EL2], dbgvcr32_el2);
187}