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Andy Shevchenko875a92b2018-06-29 15:36:34 +03001# SPDX-License-Identifier: GPL-2.0
Mika Westerberg5fae8b82014-10-24 15:16:52 +03002# Intel pin control drivers
Andy Shevchenko875a92b2018-06-29 15:36:34 +03003
Peter Robinson29ddbb82017-07-04 07:49:47 +01004if (X86 || COMPILE_TEST)
Mika Westerberg5fae8b82014-10-24 15:16:52 +03005
6config PINCTRL_BAYTRAIL
7 bool "Intel Baytrail GPIO pin control"
Linus Walleije2a021d2017-10-11 12:04:35 +02008 depends on ACPI
9 select GPIOLIB
Mika Westerberg5fae8b82014-10-24 15:16:52 +030010 select GPIOLIB_IRQCHIP
Cristina Ciocanc501d0b2016-04-01 14:00:03 +030011 select PINMUX
12 select PINCONF
13 select GENERIC_PINCONF
Mika Westerberg5fae8b82014-10-24 15:16:52 +030014 help
15 driver for memory mapped GPIO functionality on Intel Baytrail
16 platforms. Supports 3 banks with 102, 28 and 44 gpios.
17 Most pins are usually muxed to some other functionality by firmware,
18 so only a small amount is available for gpio use.
19
20 Requires ACPI device enumeration code to set up a platform device.
Mika Westerberg6e08d6b2014-11-03 13:01:33 +020021
22config PINCTRL_CHERRYVIEW
23 tristate "Intel Cherryview/Braswell pinctrl and GPIO driver"
24 depends on ACPI
25 select PINMUX
26 select PINCONF
27 select GENERIC_PINCONF
28 select GPIOLIB
29 select GPIOLIB_IRQCHIP
30 help
31 Cherryview/Braswell pinctrl driver provides an interface that
32 allows configuring of SoC pins and using them as GPIOs.
Mika Westerberg7981c0012015-03-30 17:31:49 +030033
Andy Shevchenkoeb834792019-08-22 18:40:50 +030034config PINCTRL_LYNXPOINT
35 tristate "Intel Lynxpoint pinctrl and GPIO driver"
36 depends on ACPI
Andy Shevchenko64e14e92019-11-25 19:30:57 +020037 select PINMUX
38 select PINCONF
39 select GENERIC_PINCONF
Andy Shevchenkoeb834792019-08-22 18:40:50 +030040 select GPIOLIB
41 select GPIOLIB_IRQCHIP
42 help
43 Lynxpoint is the PCH of Intel Haswell. This pinctrl driver
44 provides an interface that allows configuring of PCH pins and
45 using them as GPIOs.
46
Andy Shevchenko4e80c8f52016-06-23 13:49:36 +030047config PINCTRL_MERRIFIELD
48 tristate "Intel Merrifield pinctrl driver"
49 depends on X86_INTEL_MID
50 select PINMUX
51 select PINCONF
52 select GENERIC_PINCONF
53 help
54 Merrifield Family-Level Interface Shim (FLIS) driver provides an
55 interface that allows configuring of SoC pins and using them as
56 GPIOs.
57
Mika Westerberg7981c0012015-03-30 17:31:49 +030058config PINCTRL_INTEL
59 tristate
60 select PINMUX
61 select PINCONF
62 select GENERIC_PINCONF
63 select GPIOLIB
64 select GPIOLIB_IRQCHIP
65
Mika Westerbergee1a6ca2015-10-21 13:08:45 +030066config PINCTRL_BROXTON
67 tristate "Intel Broxton pinctrl and GPIO driver"
68 depends on ACPI
69 select PINCTRL_INTEL
70 help
71 Broxton pinctrl driver provides an interface that allows
72 configuring of SoC pins and using them as GPIOs.
73
Mika Westerberg19a8a772017-06-06 16:18:19 +030074config PINCTRL_CANNONLAKE
75 tristate "Intel Cannon Lake PCH pinctrl and GPIO driver"
76 depends on ACPI
77 select PINCTRL_INTEL
78 help
79 This pinctrl driver provides an interface that allows configuring
80 of Intel Cannon Lake PCH pins and using them as GPIOs.
81
Mika Westerberg0f80dbc2017-10-23 15:40:26 +030082config PINCTRL_CEDARFORK
83 tristate "Intel Cedar Fork pinctrl and GPIO driver"
84 depends on ACPI
85 select PINCTRL_INTEL
86 help
87 This pinctrl driver provides an interface that allows configuring
88 of Intel Cedar Fork PCH pins and using them as GPIOs.
89
Mika Westerberg75bb10b2017-08-03 19:36:02 +030090config PINCTRL_DENVERTON
91 tristate "Intel Denverton pinctrl and GPIO driver"
92 depends on ACPI
93 select PINCTRL_INTEL
94 help
95 This pinctrl driver provides an interface that allows configuring
96 of Intel Denverton SoC pins and using them as GPIOs.
97
Mika Westerberg6693f9f2017-01-27 13:07:16 +030098config PINCTRL_GEMINILAKE
99 tristate "Intel Gemini Lake SoC pinctrl and GPIO driver"
100 depends on ACPI
101 select PINCTRL_INTEL
102 help
103 This pinctrl driver provides an interface that allows configuring
104 of Intel Gemini Lake SoC pins and using them as GPIOs.
105
Andy Shevchenkoe6800d22018-06-27 15:05:53 +0300106config PINCTRL_ICELAKE
107 tristate "Intel Ice Lake PCH pinctrl and GPIO driver"
108 depends on ACPI
109 select PINCTRL_INTEL
110 help
111 This pinctrl driver provides an interface that allows configuring
112 of Intel Ice Lake PCH pins and using them as GPIOs.
113
Mika Westerberge480b742017-08-18 13:05:55 +0300114config PINCTRL_LEWISBURG
115 tristate "Intel Lewisburg pinctrl and GPIO driver"
116 depends on ACPI
117 select PINCTRL_INTEL
118 help
119 This pinctrl driver provides an interface that allows configuring
120 of Intel Lewisburg pins and using them as GPIOs.
121
Mika Westerberg7981c0012015-03-30 17:31:49 +0300122config PINCTRL_SUNRISEPOINT
123 tristate "Intel Sunrisepoint pinctrl and GPIO driver"
124 depends on ACPI
125 select PINCTRL_INTEL
126 help
127 Sunrisepoint is the PCH of Intel Skylake. This pinctrl driver
128 provides an interface that allows configuring of PCH pins and
129 using them as GPIOs.
Peter Robinson29ddbb82017-07-04 07:49:47 +0100130
Andy Shevchenkoc9ccf712019-10-21 19:45:28 +0300131config PINCTRL_TIGERLAKE
132 tristate "Intel Tiger Lake pinctrl and GPIO driver"
133 depends on ACPI
134 select PINCTRL_INTEL
135 help
136 This pinctrl driver provides an interface that allows configuring
137 of Intel Tiger Lake PCH pins and using them as GPIOs.
Peter Robinson29ddbb82017-07-04 07:49:47 +0100138endif