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Nishanth Menon803d3a12019-05-22 11:19:20 -05001// SPDX-License-Identifier: GPL-2.0
2/*
Alexander A. Klimov303d6f62020-07-13 12:14:09 +02003 * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com/
Nishanth Menon803d3a12019-05-22 11:19:20 -05004 */
5
6/dts-v1/;
7
8#include "k3-j721e-som-p0.dtsi"
Nikhil Devshatwar2dc61b52019-08-09 13:59:47 +05309#include <dt-bindings/gpio/gpio.h>
10#include <dt-bindings/input/input.h>
Grygorii Strashkof998dc42020-03-24 00:52:53 +020011#include <dt-bindings/net/ti-dp83867.h>
Nishanth Menon803d3a12019-05-22 11:19:20 -050012
13/ {
14 chosen {
15 stdout-path = "serial2:115200n8";
16 bootargs = "console=ttyS2,115200n8 earlycon=ns16550a,mmio32,0x02800000";
17 };
Nikhil Devshatwar2dc61b52019-08-09 13:59:47 +053018
19 gpio_keys: gpio-keys {
20 compatible = "gpio-keys";
21 autorepeat;
22 pinctrl-names = "default";
23 pinctrl-0 = <&sw10_button_pins_default &sw11_button_pins_default>;
24
25 sw10: sw10 {
26 label = "GPIO Key USER1";
27 linux,code = <BTN_0>;
28 gpios = <&main_gpio0 0 GPIO_ACTIVE_LOW>;
29 };
30
31 sw11: sw11 {
32 label = "GPIO Key USER2";
33 linux,code = <BTN_1>;
34 gpios = <&wkup_gpio0 7 GPIO_ACTIVE_LOW>;
35 };
36 };
Peter Ujfalusied3aad52020-07-03 10:44:43 +030037
38 evm_12v0: fixedregulator-evm12v0 {
39 /* main supply */
40 compatible = "regulator-fixed";
41 regulator-name = "evm_12v0";
42 regulator-min-microvolt = <12000000>;
43 regulator-max-microvolt = <12000000>;
44 regulator-always-on;
45 regulator-boot-on;
46 };
47
48 vsys_3v3: fixedregulator-vsys3v3 {
49 /* Output of LMS140 */
50 compatible = "regulator-fixed";
51 regulator-name = "vsys_3v3";
52 regulator-min-microvolt = <3300000>;
53 regulator-max-microvolt = <3300000>;
54 vin-supply = <&evm_12v0>;
55 regulator-always-on;
56 regulator-boot-on;
57 };
58
59 vsys_5v0: fixedregulator-vsys5v0 {
60 /* Output of LM5140 */
61 compatible = "regulator-fixed";
62 regulator-name = "vsys_5v0";
63 regulator-min-microvolt = <5000000>;
64 regulator-max-microvolt = <5000000>;
65 vin-supply = <&evm_12v0>;
66 regulator-always-on;
67 regulator-boot-on;
68 };
69
70 sound0: sound@0 {
71 compatible = "ti,j721e-cpb-audio";
72 model = "j721e-cpb";
73
74 ti,cpb-mcasp = <&mcasp10>;
75 ti,cpb-codec = <&pcm3168a_1>;
76
77 clocks = <&k3_clks 184 1>,
78 <&k3_clks 184 2>, <&k3_clks 184 4>,
79 <&k3_clks 157 371>,
80 <&k3_clks 157 400>, <&k3_clks 157 401>;
81 clock-names = "cpb-mcasp-auxclk",
82 "cpb-mcasp-auxclk-48000", "cpb-mcasp-auxclk-44100",
83 "cpb-codec-scki",
84 "cpb-codec-scki-48000", "cpb-codec-scki-44100";
85 };
Nikhil Devshatwar2dc61b52019-08-09 13:59:47 +053086};
87
88&main_pmx0 {
89 sw10_button_pins_default: sw10_button_pins_default {
90 pinctrl-single,pins = <
91 J721E_IOPAD(0x0, PIN_INPUT, 7) /* (AC18) EXTINTn.GPIO0_0 */
92 >;
93 };
Faiz Abbas67d95d22019-09-19 21:02:42 +053094
95 main_mmc1_pins_default: main_mmc1_pins_default {
96 pinctrl-single,pins = <
97 J721E_IOPAD(0x254, PIN_INPUT, 0) /* (R29) MMC1_CMD */
98 J721E_IOPAD(0x250, PIN_INPUT, 0) /* (P25) MMC1_CLK */
99 J721E_IOPAD(0x2ac, PIN_INPUT, 0) /* (P25) MMC1_CLKLB */
100 J721E_IOPAD(0x24c, PIN_INPUT, 0) /* (R24) MMC1_DAT0 */
101 J721E_IOPAD(0x248, PIN_INPUT, 0) /* (P24) MMC1_DAT1 */
102 J721E_IOPAD(0x244, PIN_INPUT, 0) /* (R25) MMC1_DAT2 */
103 J721E_IOPAD(0x240, PIN_INPUT, 0) /* (R26) MMC1_DAT3 */
104 J721E_IOPAD(0x258, PIN_INPUT, 0) /* (P23) MMC1_SDCD */
105 J721E_IOPAD(0x25c, PIN_INPUT, 0) /* (R28) MMC1_SDWP */
106 >;
107 };
Roger Quadros49e19742019-10-28 11:37:30 +0200108
109 main_usbss0_pins_default: main_usbss0_pins_default {
110 pinctrl-single,pins = <
111 J721E_IOPAD(0x290, PIN_OUTPUT, 0) /* (U6) USB0_DRVVBUS */
Roger Quadros02c35dc2020-06-29 15:52:53 +0300112 J721E_IOPAD(0x210, PIN_INPUT, 7) /* (W3) MCAN1_RX.GPIO1_3 */
Roger Quadros49e19742019-10-28 11:37:30 +0200113 >;
114 };
115
116 main_usbss1_pins_default: main_usbss1_pins_default {
117 pinctrl-single,pins = <
118 J721E_IOPAD(0x214, PIN_OUTPUT, 4) /* (V4) MCAN1_TX.USB1_DRVVBUS */
119 >;
120 };
Vignesh Raghavendracb273542019-12-11 22:34:12 +0530121
122 main_i2c1_exp4_pins_default: main-i2c1-exp4-pins-default {
123 pinctrl-single,pins = <
124 J721E_IOPAD(0x230, PIN_INPUT, 7) /* (U2) ECAP0_IN_APWM_OUT.GPIO1_11 */
125 >;
126 };
127
128 main_i2c0_pins_default: main-i2c0-pins-default {
129 pinctrl-single,pins = <
130 J721E_IOPAD(0x220, PIN_INPUT_PULLUP, 0) /* (AC5) I2C0_SCL */
131 J721E_IOPAD(0x224, PIN_INPUT_PULLUP, 0) /* (AA5) I2C0_SDA */
132 >;
133 };
134
135 main_i2c1_pins_default: main-i2c1-pins-default {
136 pinctrl-single,pins = <
137 J721E_IOPAD(0x228, PIN_INPUT_PULLUP, 0) /* (Y6) I2C1_SCL */
138 J721E_IOPAD(0x22c, PIN_INPUT_PULLUP, 0) /* (AA6) I2C1_SDA */
139 >;
140 };
141
142 main_i2c3_pins_default: main-i2c3-pins-default {
143 pinctrl-single,pins = <
144 J721E_IOPAD(0x270, PIN_INPUT_PULLUP, 4) /* (T26) MMC2_CLK.I2C3_SCL */
145 J721E_IOPAD(0x274, PIN_INPUT_PULLUP, 4) /* (T25) MMC2_CMD.I2C3_SDA */
146 >;
147 };
148
149 main_i2c6_pins_default: main-i2c6-pins-default {
150 pinctrl-single,pins = <
151 J721E_IOPAD(0x1d0, PIN_INPUT_PULLUP, 2) /* (AA3) SPI0_D1.I2C6_SCL */
152 J721E_IOPAD(0x1e4, PIN_INPUT_PULLUP, 2) /* (Y2) SPI1_D1.I2C6_SDA */
153 >;
154 };
Peter Ujfalusied3aad52020-07-03 10:44:43 +0300155
156 mcasp10_pins_default: mcasp10_pins_default {
157 pinctrl-single,pins = <
158 J721E_IOPAD(0x158, PIN_OUTPUT_PULLDOWN, 12) /* (U23) RGMII5_TX_CTL.MCASP10_ACLKX */
159 J721E_IOPAD(0x15c, PIN_OUTPUT_PULLDOWN, 12) /* (U26) RGMII5_RX_CTL.MCASP10_AFSX */
160 J721E_IOPAD(0x160, PIN_OUTPUT_PULLDOWN, 12) /* (V28) RGMII5_TD3.MCASP10_AXR0 */
161 J721E_IOPAD(0x164, PIN_OUTPUT_PULLDOWN, 12) /* (V29) RGMII5_TD2.MCASP10_AXR1 */
162 J721E_IOPAD(0x170, PIN_OUTPUT_PULLDOWN, 12) /* (U29) RGMII5_TXC.MCASP10_AXR2 */
163 J721E_IOPAD(0x174, PIN_OUTPUT_PULLDOWN, 12) /* (U25) RGMII5_RXC.MCASP10_AXR3 */
164 J721E_IOPAD(0x198, PIN_INPUT_PULLDOWN, 12) /* (V25) RGMII6_TD1.MCASP10_AXR4 */
165 J721E_IOPAD(0x19c, PIN_INPUT_PULLDOWN, 12) /* (W27) RGMII6_TD0.MCASP10_AXR5 */
166 J721E_IOPAD(0x1a0, PIN_INPUT_PULLDOWN, 12) /* (W29) RGMII6_TXC.MCASP10_AXR6 */
167 >;
168 };
169
170 audi_ext_refclk2_pins_default: audi_ext_refclk2_pins_default {
171 pinctrl-single,pins = <
172 J721E_IOPAD(0x1a4, PIN_OUTPUT, 3) /* (W26) RGMII6_RXC.AUDIO_EXT_REFCLK2 */
173 >;
174 };
Nikhil Devshatwar2dc61b52019-08-09 13:59:47 +0530175};
176
177&wkup_pmx0 {
178 sw11_button_pins_default: sw11_button_pins_default {
179 pinctrl-single,pins = <
180 J721E_WKUP_IOPAD(0xcc, PIN_INPUT, 7) /* (G28) WKUP_GPIO0_7 */
181 >;
182 };
Vignesh Raghavendracb273542019-12-11 22:34:12 +0530183
184 mcu_fss0_ospi1_pins_default: mcu-fss0-ospi1-pins-default {
185 pinctrl-single,pins = <
186 J721E_WKUP_IOPAD(0x34, PIN_OUTPUT, 0) /* (F22) MCU_OSPI1_CLK */
187 J721E_WKUP_IOPAD(0x50, PIN_OUTPUT, 0) /* (C22) MCU_OSPI1_CSn0 */
188 J721E_WKUP_IOPAD(0x40, PIN_INPUT, 0) /* (D22) MCU_OSPI1_D0 */
189 J721E_WKUP_IOPAD(0x44, PIN_INPUT, 0) /* (G22) MCU_OSPI1_D1 */
190 J721E_WKUP_IOPAD(0x48, PIN_INPUT, 0) /* (D23) MCU_OSPI1_D2 */
191 J721E_WKUP_IOPAD(0x4c, PIN_INPUT, 0) /* (C23) MCU_OSPI1_D3 */
192 J721E_WKUP_IOPAD(0x3c, PIN_INPUT, 0) /* (B23) MCU_OSPI1_DQS */
193 J721E_WKUP_IOPAD(0x38, PIN_INPUT, 0) /* (A23) MCU_OSPI1_LBCLKO */
194 >;
195 };
Grygorii Strashkof998dc42020-03-24 00:52:53 +0200196
197 mcu_cpsw_pins_default: mcu_cpsw_pins_default {
198 pinctrl-single,pins = <
199 J721E_WKUP_IOPAD(0x0058, PIN_OUTPUT, 0) /* MCU_RGMII1_TX_CTL */
200 J721E_WKUP_IOPAD(0x005c, PIN_INPUT, 0) /* MCU_RGMII1_RX_CTL */
201 J721E_WKUP_IOPAD(0x0060, PIN_OUTPUT, 0) /* MCU_RGMII1_TD3 */
202 J721E_WKUP_IOPAD(0x0064, PIN_OUTPUT, 0) /* MCU_RGMII1_TD2 */
203 J721E_WKUP_IOPAD(0x0068, PIN_OUTPUT, 0) /* MCU_RGMII1_TD1 */
204 J721E_WKUP_IOPAD(0x006c, PIN_OUTPUT, 0) /* MCU_RGMII1_TD0 */
205 J721E_WKUP_IOPAD(0x0078, PIN_INPUT, 0) /* MCU_RGMII1_RD3 */
206 J721E_WKUP_IOPAD(0x007c, PIN_INPUT, 0) /* MCU_RGMII1_RD2 */
207 J721E_WKUP_IOPAD(0x0080, PIN_INPUT, 0) /* MCU_RGMII1_RD1 */
208 J721E_WKUP_IOPAD(0x0084, PIN_INPUT, 0) /* MCU_RGMII1_RD0 */
209 J721E_WKUP_IOPAD(0x0070, PIN_INPUT, 0) /* MCU_RGMII1_TXC */
210 J721E_WKUP_IOPAD(0x0074, PIN_INPUT, 0) /* MCU_RGMII1_RXC */
211 >;
212 };
213
214 mcu_mdio_pins_default: mcu_mdio1_pins_default {
215 pinctrl-single,pins = <
216 J721E_WKUP_IOPAD(0x008c, PIN_OUTPUT, 0) /* MCU_MDIO0_MDC */
217 J721E_WKUP_IOPAD(0x0088, PIN_INPUT, 0) /* MCU_MDIO0_MDIO */
218 >;
219 };
Nishanth Menon803d3a12019-05-22 11:19:20 -0500220};
221
222&wkup_uart0 {
223 /* Wakeup UART is used by System firmware */
224 status = "disabled";
225};
226
Lokesh Vutlabf146a12019-07-29 18:00:23 +0530227&main_uart0 {
228 power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
229};
230
Nishanth Menon803d3a12019-05-22 11:19:20 -0500231&main_uart3 {
232 /* UART not brought out */
233 status = "disabled";
234};
235
236&main_uart5 {
237 /* UART not brought out */
238 status = "disabled";
239};
240
241&main_uart6 {
242 /* UART not brought out */
243 status = "disabled";
244};
245
246&main_uart7 {
247 /* UART not brought out */
248 status = "disabled";
249};
250
251&main_uart8 {
252 /* UART not brought out */
253 status = "disabled";
254};
255
256&main_uart9 {
257 /* UART not brought out */
258 status = "disabled";
259};
Lokesh Vutla64318622019-08-09 13:59:45 +0530260
261&main_gpio2 {
262 status = "disabled";
263};
264
265&main_gpio3 {
266 status = "disabled";
267};
268
269&main_gpio4 {
270 status = "disabled";
271};
272
273&main_gpio5 {
274 status = "disabled";
275};
276
277&main_gpio6 {
278 status = "disabled";
279};
280
281&main_gpio7 {
282 status = "disabled";
283};
284
285&wkup_gpio1 {
286 status = "disabled";
287};
Suman Annaeb9f9172019-07-24 19:10:20 -0500288
289&mailbox0_cluster0 {
290 interrupts = <214 0>;
291
292 mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
293 ti,mbox-rx = <0 0 0>;
294 ti,mbox-tx = <1 0 0>;
295 };
296
297 mbox_mcu_r5fss0_core1: mbox-mcu-r5fss0-core1 {
298 ti,mbox-rx = <2 0 0>;
299 ti,mbox-tx = <3 0 0>;
300 };
301};
302
303&mailbox0_cluster1 {
304 interrupts = <215 0>;
305
306 mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
307 ti,mbox-rx = <0 0 0>;
308 ti,mbox-tx = <1 0 0>;
309 };
310
311 mbox_main_r5fss0_core1: mbox-main-r5fss0-core1 {
312 ti,mbox-rx = <2 0 0>;
313 ti,mbox-tx = <3 0 0>;
314 };
315};
316
317&mailbox0_cluster2 {
318 interrupts = <216 0>;
319
320 mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
321 ti,mbox-rx = <0 0 0>;
322 ti,mbox-tx = <1 0 0>;
323 };
324
325 mbox_main_r5fss1_core1: mbox-main-r5fss1-core1 {
326 ti,mbox-rx = <2 0 0>;
327 ti,mbox-tx = <3 0 0>;
328 };
329};
330
331&mailbox0_cluster3 {
332 interrupts = <217 0>;
333
334 mbox_c66_0: mbox-c66-0 {
335 ti,mbox-rx = <0 0 0>;
336 ti,mbox-tx = <1 0 0>;
337 };
338
339 mbox_c66_1: mbox-c66-1 {
340 ti,mbox-rx = <2 0 0>;
341 ti,mbox-tx = <3 0 0>;
342 };
343};
344
345&mailbox0_cluster4 {
346 interrupts = <218 0>;
347
348 mbox_c71_0: mbox-c71-0 {
349 ti,mbox-rx = <0 0 0>;
350 ti,mbox-tx = <1 0 0>;
351 };
352};
353
354&mailbox0_cluster5 {
355 status = "disabled";
356};
357
358&mailbox0_cluster6 {
359 status = "disabled";
360};
361
362&mailbox0_cluster7 {
363 status = "disabled";
364};
365
366&mailbox0_cluster8 {
367 status = "disabled";
368};
369
370&mailbox0_cluster9 {
371 status = "disabled";
372};
373
374&mailbox0_cluster10 {
375 status = "disabled";
376};
377
378&mailbox0_cluster11 {
379 status = "disabled";
380};
Faiz Abbas67d95d22019-09-19 21:02:42 +0530381
382&main_sdhci0 {
383 /* eMMC */
384 non-removable;
385 ti,driver-strength-ohm = <50>;
386 disable-wp;
387};
388
389&main_sdhci1 {
390 /* SD/MMC */
391 pinctrl-names = "default";
392 pinctrl-0 = <&main_mmc1_pins_default>;
393 ti,driver-strength-ohm = <50>;
394 disable-wp;
395};
396
397&main_sdhci2 {
398 /* Unused */
399 status = "disabled";
400};
Roger Quadros49e19742019-10-28 11:37:30 +0200401
Roger Quadros02c35dc2020-06-29 15:52:53 +0300402&usb_serdes_mux {
403 idle-states = <1>, <0>; /* USB0 to SERDES3, USB1 to SERDES1 */
404};
405
406&serdes_ln_ctrl {
407 idle-states = <SERDES0_LANE0_PCIE0_LANE0>, <SERDES0_LANE1_PCIE0_LANE1>,
408 <SERDES1_LANE0_PCIE1_LANE0>, <SERDES1_LANE1_PCIE1_LANE1>,
409 <SERDES2_LANE0_PCIE2_LANE0>, <SERDES2_LANE1_PCIE2_LANE1>,
410 <SERDES3_LANE0_USB3_0_SWAP>, <SERDES3_LANE1_USB3_0>,
411 <SERDES4_LANE0_EDP_LANE0>, <SERDES4_LANE1_EDP_LANE1>, <SERDES4_LANE2_EDP_LANE2>, <SERDES4_LANE3_EDP_LANE3>;
412};
413
414&serdes_wiz3 {
415 typec-dir-gpios = <&main_gpio1 3 GPIO_ACTIVE_HIGH>;
Roger Quadros04fe6472020-06-29 15:52:54 +0300416 typec-dir-debounce-ms = <700>; /* TUSB321, tCCB_DEFAULT 133 ms */
Roger Quadros02c35dc2020-06-29 15:52:53 +0300417};
418
419&serdes3 {
420 serdes3_usb_link: link@0 {
421 reg = <0>;
422 cdns,num-lanes = <2>;
423 #phy-cells = <0>;
424 cdns,phy-type = <PHY_TYPE_USB3>;
425 resets = <&serdes_wiz3 1>, <&serdes_wiz3 2>;
426 };
427};
428
Roger Quadros49e19742019-10-28 11:37:30 +0200429&usbss0 {
430 pinctrl-names = "default";
431 pinctrl-0 = <&main_usbss0_pins_default>;
Roger Quadros49e19742019-10-28 11:37:30 +0200432 ti,vbus-divider;
433};
434
435&usb0 {
436 dr_mode = "otg";
Roger Quadros02c35dc2020-06-29 15:52:53 +0300437 maximum-speed = "super-speed";
438 phys = <&serdes3_usb_link>;
439 phy-names = "cdns3,usb3-phy";
Roger Quadros49e19742019-10-28 11:37:30 +0200440};
441
442&usbss1 {
443 pinctrl-names = "default";
444 pinctrl-0 = <&main_usbss1_pins_default>;
445 ti,usb2-only;
446};
447
448&usb1 {
449 dr_mode = "host";
450 maximum-speed = "high-speed";
451};
Vignesh Raghavendracb273542019-12-11 22:34:12 +0530452
453&ospi1 {
454 pinctrl-names = "default";
455 pinctrl-0 = <&mcu_fss0_ospi1_pins_default>;
456
457 flash@0{
458 compatible = "jedec,spi-nor";
459 reg = <0x0>;
460 spi-tx-bus-width = <1>;
461 spi-rx-bus-width = <4>;
462 spi-max-frequency = <40000000>;
463 cdns,tshsl-ns = <60>;
464 cdns,tsd2d-ns = <60>;
465 cdns,tchsh-ns = <60>;
466 cdns,tslch-ns = <60>;
467 cdns,read-delay = <2>;
468 #address-cells = <1>;
469 #size-cells = <1>;
470 };
471};
472
473&tscadc0 {
474 adc {
475 ti,adc-channels = <0 1 2 3 4 5 6 7>;
476 };
477};
478
479&tscadc1 {
480 adc {
481 ti,adc-channels = <0 1 2 3 4 5 6 7>;
482 };
483};
484
485&main_i2c0 {
486 pinctrl-names = "default";
487 pinctrl-0 = <&main_i2c0_pins_default>;
488 clock-frequency = <400000>;
489
490 exp1: gpio@20 {
491 compatible = "ti,tca6416";
492 reg = <0x20>;
493 gpio-controller;
494 #gpio-cells = <2>;
495 };
496
497 exp2: gpio@22 {
498 compatible = "ti,tca6424";
499 reg = <0x22>;
500 gpio-controller;
501 #gpio-cells = <2>;
Peter Ujfalusied3aad52020-07-03 10:44:43 +0300502
503 p09 {
504 /* P11 - MCASP/TRACE_MUX_S0 */
505 gpio-hog;
506 gpios = <9 GPIO_ACTIVE_HIGH>;
507 output-low;
508 line-name = "MCASP/TRACE_MUX_S0";
509 };
510
511 p10 {
512 /* P12 - MCASP/TRACE_MUX_S1 */
513 gpio-hog;
514 gpios = <10 GPIO_ACTIVE_HIGH>;
515 output-high;
516 line-name = "MCASP/TRACE_MUX_S1";
517 };
Vignesh Raghavendracb273542019-12-11 22:34:12 +0530518 };
519};
520
521&main_i2c1 {
522 pinctrl-names = "default";
523 pinctrl-0 = <&main_i2c1_pins_default>;
524 clock-frequency = <400000>;
525
526 exp4: gpio@20 {
527 compatible = "ti,tca6408";
528 reg = <0x20>;
529 gpio-controller;
530 #gpio-cells = <2>;
531 pinctrl-names = "default";
532 pinctrl-0 = <&main_i2c1_exp4_pins_default>;
533 interrupt-parent = <&main_gpio1>;
534 interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
535 interrupt-controller;
536 #interrupt-cells = <2>;
537 };
538};
539
Peter Ujfalusied3aad52020-07-03 10:44:43 +0300540&k3_clks {
541 /* Confiure AUDIO_EXT_REFCLK2 pin as output */
542 pinctrl-names = "default";
543 pinctrl-0 = <&audi_ext_refclk2_pins_default>;
544};
545
Vignesh Raghavendracb273542019-12-11 22:34:12 +0530546&main_i2c3 {
547 pinctrl-names = "default";
548 pinctrl-0 = <&main_i2c3_pins_default>;
549 clock-frequency = <400000>;
550
551 exp3: gpio@20 {
552 compatible = "ti,tca6408";
553 reg = <0x20>;
554 gpio-controller;
555 #gpio-cells = <2>;
556 };
Peter Ujfalusied3aad52020-07-03 10:44:43 +0300557
558 pcm3168a_1: audio-codec@44 {
559 compatible = "ti,pcm3168a";
560 reg = <0x44>;
561
562 #sound-dai-cells = <1>;
563
564 reset-gpios = <&exp3 0 GPIO_ACTIVE_LOW>;
565
566 /* C_AUDIO_REFCLK2 -> RGMII6_RXC (W26) */
567 clocks = <&k3_clks 157 371>;
568 clock-names = "scki";
569
570 /* HSDIV3_16FFT_MAIN_4_HSDIVOUT2_CLK -> REFCLK2 */
571 assigned-clocks = <&k3_clks 157 371>;
572 assigned-clock-parents = <&k3_clks 157 400>;
573 assigned-clock-rates = <24576000>; /* for 48KHz */
574
575 VDD1-supply = <&vsys_3v3>;
576 VDD2-supply = <&vsys_3v3>;
577 VCCAD1-supply = <&vsys_5v0>;
578 VCCAD2-supply = <&vsys_5v0>;
579 VCCDA1-supply = <&vsys_5v0>;
580 VCCDA2-supply = <&vsys_5v0>;
581 };
Vignesh Raghavendracb273542019-12-11 22:34:12 +0530582};
583
584&main_i2c6 {
585 pinctrl-names = "default";
586 pinctrl-0 = <&main_i2c6_pins_default>;
587 clock-frequency = <400000>;
588
589 exp5: gpio@20 {
590 compatible = "ti,tca6408";
591 reg = <0x20>;
592 gpio-controller;
593 #gpio-cells = <2>;
594 };
595};
Grygorii Strashkof998dc42020-03-24 00:52:53 +0200596
597&mcu_cpsw {
598 pinctrl-names = "default";
599 pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default>;
600};
601
602&davinci_mdio {
603 phy0: ethernet-phy@0 {
604 reg = <0>;
605 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
606 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
607 };
608};
609
610&cpsw_port1 {
611 phy-mode = "rgmii-rxid";
612 phy-handle = <&phy0>;
613};
Tomi Valkeinen0836dac2020-04-22 12:15:12 +0300614
615&dss {
616 /*
617 * These clock assignments are chosen to enable the following outputs:
618 *
619 * VP0 - DisplayPort SST
620 * VP1 - DPI0
621 * VP2 - DSI
622 * VP3 - DPI1
623 */
624
625 assigned-clocks = <&k3_clks 152 1>,
626 <&k3_clks 152 4>,
627 <&k3_clks 152 9>,
628 <&k3_clks 152 13>;
629 assigned-clock-parents = <&k3_clks 152 2>, /* PLL16_HSDIV0 */
630 <&k3_clks 152 6>, /* PLL19_HSDIV0 */
631 <&k3_clks 152 11>, /* PLL18_HSDIV0 */
632 <&k3_clks 152 18>; /* PLL23_HSDIV0 */
633};
Peter Ujfalusied3aad52020-07-03 10:44:43 +0300634
635&mcasp10 {
636 #sound-dai-cells = <0>;
637
638 pinctrl-names = "default";
639 pinctrl-0 = <&mcasp10_pins_default>;
640
641 op-mode = <0>; /* MCASP_IIS_MODE */
642 tdm-slots = <2>;
643 auxclk-fs-ratio = <256>;
644
645 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
646 1 1 1 1
647 2 2 2 0
648 >;
649 tx-num-evt = <0>;
650 rx-num-evt = <0>;
651
652 status = "okay";
653};