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Thomas Gleixner2874c5f2019-05-27 08:55:01 +02001// SPDX-License-Identifier: GPL-2.0-or-later
Heiko Schocher8159df72009-06-15 09:38:18 +02002/*
Holger Brunck93e2b952011-03-11 08:02:44 +01003 * Copyright 2008-2011 DENX Software Engineering GmbH
Heiko Schocher8159df72009-06-15 09:38:18 +02004 * Author: Heiko Schocher <hs@denx.de>
5 *
6 * Description:
Christian Herzig4bfc1dd2012-05-08 15:57:20 +02007 * Keymile 83xx platform specific routines.
Heiko Schocher8159df72009-06-15 09:38:18 +02008 */
9
10#include <linux/stddef.h>
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/errno.h>
14#include <linux/reboot.h>
15#include <linux/pci.h>
16#include <linux/kdev_t.h>
17#include <linux/major.h>
18#include <linux/console.h>
19#include <linux/delay.h>
20#include <linux/seq_file.h>
21#include <linux/root_dev.h>
22#include <linux/initrd.h>
23#include <linux/of_platform.h>
24#include <linux/of_device.h>
25
Arun Sharma600634972011-07-26 16:09:06 -070026#include <linux/atomic.h>
Holger Brunck89491d82012-12-07 16:09:13 +010027#include <linux/time.h>
28#include <linux/io.h>
Heiko Schocher8159df72009-06-15 09:38:18 +020029#include <asm/machdep.h>
30#include <asm/ipic.h>
31#include <asm/irq.h>
32#include <asm/prom.h>
33#include <asm/udbg.h>
34#include <sysdev/fsl_soc.h>
35#include <sysdev/fsl_pci.h>
Zhao Qiang7aa1aa62015-11-30 10:48:57 +080036#include <soc/fsl/qe/qe.h>
Heiko Schocher8159df72009-06-15 09:38:18 +020037
38#include "mpc83xx.h"
39
40#define SVR_REV(svr) (((svr) >> 0) & 0xFFFF) /* Revision field */
Gerlando Falauto14f40f32012-12-07 16:09:14 +010041
42static void quirk_mpc8360e_qe_enet10(void)
43{
44 /*
45 * handle mpc8360E Erratum QE_ENET10:
46 * RGMII AC values do not meet the specification
47 */
48 uint svid = mfspr(SPRN_SVR);
49 struct device_node *np_par;
50 struct resource res;
51 void __iomem *base;
52 int ret;
53
54 np_par = of_find_node_by_name(NULL, "par_io");
55 if (np_par == NULL) {
56 pr_warn("%s couldn;t find par_io node\n", __func__);
57 return;
58 }
59 /* Map Parallel I/O ports registers */
60 ret = of_address_to_resource(np_par, 0, &res);
61 if (ret) {
62 pr_warn("%s couldn;t map par_io registers\n", __func__);
63 return;
64 }
65
Julia Lawallbfbe37f2020-01-01 18:49:45 +010066 base = ioremap(res.start, resource_size(&res));
Gerlando Falauto14f40f32012-12-07 16:09:14 +010067
68 /*
69 * set output delay adjustments to default values according
70 * table 5 in Errata Rev. 5, 9/2011:
71 *
72 * write 0b01 to UCC1 bits 18:19
73 * write 0b01 to UCC2 option 1 bits 4:5
74 * write 0b01 to UCC2 option 2 bits 16:17
75 */
76 clrsetbits_be32((base + 0xa8), 0x0c00f000, 0x04005000);
77
78 /*
79 * set output delay adjustments to default values according
80 * table 3-13 in Reference Manual Rev.3 05/2010:
81 *
82 * write 0b01 to UCC2 option 2 bits 16:17
83 * write 0b0101 to UCC1 bits 20:23
84 * write 0b0101 to UCC2 option 1 bits 24:27
85 */
86 clrsetbits_be32((base + 0xac), 0x0000cff0, 0x00004550);
87
88 if (SVR_REV(svid) == 0x0021) {
89 /*
90 * UCC2 option 1: write 0b1010 to bits 24:27
91 * at address IMMRBAR+0x14AC
92 */
93 clrsetbits_be32((base + 0xac), 0x000000f0, 0x000000a0);
94 } else if (SVR_REV(svid) == 0x0020) {
95 /*
96 * UCC1: write 0b11 to bits 18:19
97 * at address IMMRBAR+0x14A8
98 */
99 setbits32((base + 0xa8), 0x00003000);
100
101 /*
102 * UCC2 option 1: write 0b11 to bits 4:5
103 * at address IMMRBAR+0x14A8
104 */
105 setbits32((base + 0xa8), 0x0c000000);
106
107 /*
108 * UCC2 option 2: write 0b11 to bits 16:17
109 * at address IMMRBAR+0x14AC
110 */
111 setbits32((base + 0xac), 0x0000c000);
112 }
113 iounmap(base);
114 of_node_put(np_par);
115}
116
Heiko Schocher8159df72009-06-15 09:38:18 +0200117/* ************************************************************************
118 *
119 * Setup the architecture
120 *
121 */
Holger Brunck93e2b952011-03-11 08:02:44 +0100122static void __init mpc83xx_km_setup_arch(void)
Heiko Schocher8159df72009-06-15 09:38:18 +0200123{
Dmitry Eremin-Solenikovbede4802011-11-17 18:48:48 +0400124#ifdef CONFIG_QUICC_ENGINE
Heiko Schocher8159df72009-06-15 09:38:18 +0200125 struct device_node *np;
Dmitry Eremin-Solenikovbede4802011-11-17 18:48:48 +0400126#endif
Heiko Schocher8159df72009-06-15 09:38:18 +0200127
Kevin Haofff69fd2016-08-23 10:06:58 +0800128 mpc83xx_setup_arch();
Heiko Schocher8159df72009-06-15 09:38:18 +0200129
130#ifdef CONFIG_QUICC_ENGINE
Heiko Schocher8159df72009-06-15 09:38:18 +0200131 np = of_find_node_by_name(NULL, "par_io");
132 if (np != NULL) {
133 par_io_init(np);
134 of_node_put(np);
135
Holger Brunck93e2b952011-03-11 08:02:44 +0100136 for_each_node_by_name(np, "spi")
137 par_io_of_config(np);
138
Holger Brunckf7854e72012-05-08 15:57:19 +0200139 for_each_node_by_name(np, "ucc")
Heiko Schocher8159df72009-06-15 09:38:18 +0200140 par_io_of_config(np);
Gerlando Falauto9c2f4512012-12-07 16:09:15 +0100141
142 /* Only apply this quirk when par_io is available */
143 np = of_find_compatible_node(NULL, "network", "ucc_geth");
144 if (np != NULL) {
145 quirk_mpc8360e_qe_enet10();
146 of_node_put(np);
147 }
Heiko Schocher8159df72009-06-15 09:38:18 +0200148 }
Christian Herzig4bfc1dd2012-05-08 15:57:20 +0200149#endif /* CONFIG_QUICC_ENGINE */
Heiko Schocher8159df72009-06-15 09:38:18 +0200150}
151
Dmitry Eremin-Solenikov7669d582011-11-17 18:48:47 +0400152machine_device_initcall(mpc83xx_km, mpc83xx_declare_of_platform_devices);
Heiko Schocher8159df72009-06-15 09:38:18 +0200153
Holger Brunck93e2b952011-03-11 08:02:44 +0100154/* list of the supported boards */
155static char *board[] __initdata = {
156 "Keymile,KMETER1",
157 "Keymile,kmpbec8321",
158 NULL
159};
160
Heiko Schocher8159df72009-06-15 09:38:18 +0200161/*
162 * Called very early, MMU is off, device-tree isn't unflattened
163 */
Holger Brunck93e2b952011-03-11 08:02:44 +0100164static int __init mpc83xx_km_probe(void)
Heiko Schocher8159df72009-06-15 09:38:18 +0200165{
Holger Brunck93e2b952011-03-11 08:02:44 +0100166 int i = 0;
Heiko Schocher8159df72009-06-15 09:38:18 +0200167
Holger Brunck93e2b952011-03-11 08:02:44 +0100168 while (board[i]) {
Benjamin Herrenschmidt56571382016-07-05 15:04:05 +1000169 if (of_machine_is_compatible(board[i]))
Holger Brunck93e2b952011-03-11 08:02:44 +0100170 break;
171 i++;
172 }
173 return (board[i] != NULL);
Heiko Schocher8159df72009-06-15 09:38:18 +0200174}
175
Holger Brunck93e2b952011-03-11 08:02:44 +0100176define_machine(mpc83xx_km) {
177 .name = "mpc83xx-km-platform",
178 .probe = mpc83xx_km_probe,
179 .setup_arch = mpc83xx_km_setup_arch,
Rasmus Villemoes01a2ffb2019-11-28 15:55:18 +0100180 .init_IRQ = mpc83xx_ipic_init_IRQ,
Heiko Schocher8159df72009-06-15 09:38:18 +0200181 .get_irq = ipic_get_irq,
182 .restart = mpc83xx_restart,
183 .time_init = mpc83xx_time_init,
184 .calibrate_decr = generic_calibrate_decr,
185 .progress = udbg_progress,
186};