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Vineet Guptacfdbc2e2013-01-18 15:12:20 +05301#
2# Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
3#
4# This program is free software; you can redistribute it and/or modify
5# it under the terms of the GNU General Public License version 2 as
6# published by the Free Software Foundation.
7#
8
9config ARC
10 def_bool y
Vineet Guptac4c9a042016-10-31 13:46:38 -070011 select ARC_TIMERS
Vineet Gupta2a440162015-08-08 17:51:58 +053012 select ARCH_SUPPORTS_ATOMIC_RMW if ARC_HAS_LLSC
Vineet Guptaf06d19e2013-11-15 12:08:05 +053013 select BUILDTIME_EXTABLE_SORT
Vineet Gupta4adeefe2013-01-18 15:12:18 +053014 select CLONE_BACKWARDS
Noam Camus69fbd092016-01-14 12:20:08 +053015 select COMMON_CLK
Vineet Guptace636522015-07-27 17:23:28 +053016 select GENERIC_ATOMIC64 if !ISA_ARCV2 || !(ARC_HAS_LL64 && ARC_HAS_LLSC)
Vineet Guptacfdbc2e2013-01-18 15:12:20 +053017 select GENERIC_CLOCKEVENTS
18 select GENERIC_FIND_FIRST_BIT
19 # for now, we don't need GENERIC_IRQ_PROBE, CONFIG_GENERIC_IRQ_CHIP
20 select GENERIC_IRQ_SHOW
Joao Pintoc1678ff2016-03-10 14:44:13 -060021 select GENERIC_PCI_IOMAP
Vineet Guptacfdbc2e2013-01-18 15:12:20 +053022 select GENERIC_PENDING_IRQ if SMP
Vineet Guptacfdbc2e2013-01-18 15:12:20 +053023 select GENERIC_SMP_IDLE_THREAD
Mischa Jonkerf46121b2013-01-18 15:12:24 +053024 select HAVE_ARCH_KGDB
Vineet Gupta547f1122013-01-18 15:12:22 +053025 select HAVE_ARCH_TRACEHOOK
Vineet Gupta5e057422015-08-06 17:55:34 +053026 select HAVE_FUTEX_CMPXCHG
Gilad Ben-Yossef43689022013-01-22 16:48:45 +053027 select HAVE_IOREMAP_PROT
Vineet Gupta4d86dfb2013-01-22 17:03:59 +053028 select HAVE_KPROBES
29 select HAVE_KRETPROBES
Vineet Guptac121c502013-01-18 15:12:20 +053030 select HAVE_MEMBLOCK
Vineet Gupta854a0d92013-01-22 17:03:19 +053031 select HAVE_MOD_ARCH_SPECIFIC if ARC_DW2_UNWIND
Vineet Gupta769bc1f2013-01-22 17:02:38 +053032 select HAVE_OPROFILE
Vineet Gupta9c575642013-01-18 15:12:24 +053033 select HAVE_PERF_EVENTS
Vineet Gupta1b0ccb82016-01-01 15:12:54 +053034 select HANDLE_DOMAIN_IRQ
Vineet Gupta999159a2013-01-22 17:00:52 +053035 select IRQ_DOMAIN
Vineet Guptacfdbc2e2013-01-18 15:12:20 +053036 select MODULES_USE_ELF_RELA
Vineet Guptac121c502013-01-18 15:12:20 +053037 select NO_BOOTMEM
Vineet Gupta999159a2013-01-22 17:00:52 +053038 select OF
39 select OF_EARLY_FLATTREE
Alexey Brodkin1b10cb22016-04-26 19:29:34 +030040 select OF_RESERVED_MEM
Vineet Gupta9c575642013-01-18 15:12:24 +053041 select PERF_USE_VMALLOC
Dave Hansend1a1dc02013-07-01 13:04:42 -070042 select HAVE_DEBUG_STACKOVERFLOW
Alexey Brodkin32ed9a02016-04-26 19:29:33 +030043 select HAVE_GENERIC_DMA_COHERENT
Daniel Mentz27f3d2a2016-10-04 16:34:27 -070044 select HAVE_KERNEL_GZIP
45 select HAVE_KERNEL_LZMA
Vineet Guptacfdbc2e2013-01-18 15:12:20 +053046
Joao Pintoc1678ff2016-03-10 14:44:13 -060047config MIGHT_HAVE_PCI
48 bool
49
Vineet Gupta0dafafc2013-09-06 14:18:17 +053050config TRACE_IRQFLAGS_SUPPORT
51 def_bool y
52
53config LOCKDEP_SUPPORT
54 def_bool y
55
Vineet Guptacfdbc2e2013-01-18 15:12:20 +053056config SCHED_OMIT_FRAME_POINTER
57 def_bool y
58
59config GENERIC_CSUM
60 def_bool y
61
62config RWSEM_GENERIC_SPINLOCK
63 def_bool y
64
Vineet Gupta26f9d5f2016-04-18 10:49:56 +053065config ARCH_DISCONTIGMEM_ENABLE
Vineet Guptad140b9b2016-05-31 11:46:47 +053066 def_bool n
Vineet Gupta26f9d5f2016-04-18 10:49:56 +053067
Vineet Guptacfdbc2e2013-01-18 15:12:20 +053068config ARCH_FLATMEM_ENABLE
69 def_bool y
70
71config MMU
72 def_bool y
73
Uwe Kleine-Königce816fa2014-04-07 15:39:19 -070074config NO_IOPORT_MAP
Vineet Guptacfdbc2e2013-01-18 15:12:20 +053075 def_bool y
76
77config GENERIC_CALIBRATE_DELAY
78 def_bool y
79
80config GENERIC_HWEIGHT
81 def_bool y
82
Vineet Gupta44c8bb92013-01-18 15:12:23 +053083config STACKTRACE_SUPPORT
84 def_bool y
85 select STACKTRACE
86
Vineet Guptafe6c1b82014-07-08 18:43:47 +053087config HAVE_ARCH_TRANSPARENT_HUGEPAGE
88 def_bool y
89 depends on ARC_MMU_V4
90
Vineet Guptacfdbc2e2013-01-18 15:12:20 +053091source "init/Kconfig"
92source "kernel/Kconfig.freezer"
93
94menu "ARC Architecture Configuration"
95
Vineet Gupta93ad7002013-01-22 16:51:50 +053096menu "ARC Platform/SoC/Board"
Vineet Guptacfdbc2e2013-01-18 15:12:20 +053097
Vineet Guptafd155792015-02-20 19:12:18 +053098source "arch/arc/plat-sim/Kconfig"
Christian Ruppert072eb692013-04-12 08:40:59 +020099source "arch/arc/plat-tb10x/Kconfig"
Alexey Brodkin556cc1c2014-01-27 14:51:34 +0100100source "arch/arc/plat-axs10x/Kconfig"
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530101#New platform adds here
Noam Camus966657892015-10-16 16:52:43 +0300102source "arch/arc/plat-eznps/Kconfig"
Vineet Gupta93ad7002013-01-22 16:51:50 +0530103
Vineet Gupta53d98952013-01-18 15:12:25 +0530104endmenu
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530105
Vineet Gupta1f6ccff2013-05-13 18:30:41 +0530106choice
107 prompt "ARC Instruction Set"
108 default ISA_ARCOMPACT
109
110config ISA_ARCOMPACT
111 bool "ARCompact ISA"
Zhaoxiu Zengfff7fb02016-05-20 17:03:57 -0700112 select CPU_NO_EFFICIENT_FFS
Vineet Gupta1f6ccff2013-05-13 18:30:41 +0530113 help
114 The original ARC ISA of ARC600/700 cores
115
Vineet Gupta65bfbcd2015-03-09 14:01:08 +0530116config ISA_ARCV2
117 bool "ARC ISA v2"
Vineet Guptac4c9a042016-10-31 13:46:38 -0700118 select ARC_TIMERS_64BIT
Vineet Gupta65bfbcd2015-03-09 14:01:08 +0530119 help
120 ISA for the Next Generation ARC-HS cores
Vineet Gupta1f6ccff2013-05-13 18:30:41 +0530121
122endchoice
123
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530124menu "ARC CPU Configuration"
125
126choice
127 prompt "ARC Core"
Vineet Gupta1f6ccff2013-05-13 18:30:41 +0530128 default ARC_CPU_770 if ISA_ARCOMPACT
129 default ARC_CPU_HS if ISA_ARCV2
130
131if ISA_ARCOMPACT
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530132
133config ARC_CPU_750D
134 bool "ARC750D"
Vineet Gupta14a0abf2015-06-26 12:42:53 +0530135 select ARC_CANT_LLSC
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530136 help
137 Support for ARC750 core
138
139config ARC_CPU_770
140 bool "ARC770"
Vineet Gupta742f8af2013-11-07 14:47:16 +0530141 select ARC_HAS_SWAPE
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530142 help
143 Support for ARC770 core introduced with Rel 4.10 (Summer 2011)
144 This core has a bunch of cool new features:
145 -MMU-v3: Variable Page Sz (4k, 8k, 16k), bigger J-TLB (128x4)
146 Shared Address Spaces (for sharing TLB entires in MMU)
147 -Caches: New Prog Model, Region Flush
148 -Insns: endian swap, load-locked/store-conditional, time-stamp-ctr
149
Vineet Gupta1f6ccff2013-05-13 18:30:41 +0530150endif #ISA_ARCOMPACT
151
152config ARC_CPU_HS
153 bool "ARC-HS"
154 depends on ISA_ARCV2
155 help
156 Support for ARC HS38x Cores based on ARCv2 ISA
157 The notable features are:
158 - SMP configurations of upto 4 core with coherency
159 - Optional L2 Cache and IO-Coherency
160 - Revised Interrupt Architecture (multiple priorites, reg banks,
161 auto stack switch, auto regfile save/restore)
162 - MMUv4 (PIPT dcache, Huge Pages)
163 - Instructions for
164 * 64bit load/store: LDD, STD
165 * Hardware assisted divide/remainder: DIV, REM
166 * Function prologue/epilogue: ENTER_S, LEAVE_S
167 * IRQ enable/disable: CLRI, SETI
168 * pop count: FFS, FLS
169 * SETcc, BMSKN, XBFU...
170
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530171endchoice
172
173config CPU_BIG_ENDIAN
174 bool "Enable Big Endian Mode"
175 default n
176 help
177 Build kernel for Big Endian Mode of ARC CPU
178
Vineet Gupta41195d22013-01-18 15:12:23 +0530179config SMP
Vineet Gupta82fea5a2014-09-10 19:05:38 +0530180 bool "Symmetric Multi-Processing"
Vineet Gupta41195d22013-01-18 15:12:23 +0530181 default n
Vineet Gupta82fea5a2014-09-10 19:05:38 +0530182 select ARC_HAS_COH_CACHES if ISA_ARCV2
183 select ARC_MCIP if ISA_ARCV2
Vineet Gupta41195d22013-01-18 15:12:23 +0530184 help
Vineet Gupta82fea5a2014-09-10 19:05:38 +0530185 This enables support for systems with more than one CPU.
Vineet Gupta41195d22013-01-18 15:12:23 +0530186
187if SMP
188
189config ARC_HAS_COH_CACHES
190 def_bool n
191
Vineet Gupta41195d22013-01-18 15:12:23 +0530192config NR_CPUS
Noam Camus3aa4f802013-06-03 15:19:59 +0300193 int "Maximum number of CPUs (2-4096)"
194 range 2 4096
Vineet Gupta82fea5a2014-09-10 19:05:38 +0530195 default "4"
196
Vineet Gupta3971cdc2015-10-09 11:26:12 +0530197config ARC_SMP_HALT_ON_RESET
198 bool "Enable Halt-on-reset boot mode"
199 default y if ARC_UBOOT_SUPPORT
200 help
201 In SMP configuration cores can be configured as Halt-on-reset
202 or they could all start at same time. For Halt-on-reset, non
203 masters are parked until Master kicks them so they can start of
204 at designated entry point. For other case, all jump to common
205 entry point and spin wait for Master's signal.
206
Vineet Gupta82fea5a2014-09-10 19:05:38 +0530207endif #SMP
Vineet Gupta41195d22013-01-18 15:12:23 +0530208
Vineet Gupta3ce0fef2016-09-29 10:00:14 -0700209config ARC_MCIP
210 bool "ARConnect Multicore IP (MCIP) Support "
211 depends on ISA_ARCV2
212 default y if SMP
213 help
214 This IP block enables SMP in ARC-HS38 cores.
215 It provides for cross-core interrupts, multi-core debug
216 hardware semaphores, shared memory,....
217
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530218menuconfig ARC_CACHE
219 bool "Enable Cache Support"
220 default y
Vineet Gupta41195d22013-01-18 15:12:23 +0530221 # if SMP, cache enabled ONLY if ARC implementation has cache coherency
222 depends on !SMP || ARC_HAS_COH_CACHES
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530223
224if ARC_CACHE
225
226config ARC_CACHE_LINE_SHIFT
227 int "Cache Line Length (as power of 2)"
228 range 5 7
229 default "6"
230 help
231 Starting with ARC700 4.9, Cache line length is configurable,
232 This option specifies "N", with Line-len = 2 power N
233 So line lengths of 32, 64, 128 are specified by 5,6,7, respectively
234 Linux only supports same line lengths for I and D caches.
235
236config ARC_HAS_ICACHE
237 bool "Use Instruction Cache"
238 default y
239
240config ARC_HAS_DCACHE
241 bool "Use Data Cache"
242 default y
243
244config ARC_CACHE_PAGES
245 bool "Per Page Cache Control"
246 default y
247 depends on ARC_HAS_ICACHE || ARC_HAS_DCACHE
248 help
249 This can be used to over-ride the global I/D Cache Enable on a
250 per-page basis (but only for pages accessed via MMU such as
251 Kernel Virtual address or User Virtual Address)
252 TLB entries have a per-page Cache Enable Bit.
253 Note that Global I/D ENABLE + Per Page DISABLE works but corollary
254 Global DISABLE + Per Page ENABLE won't work
255
Vineet Gupta4102b532013-05-09 21:54:51 +0530256config ARC_CACHE_VIPT_ALIASING
257 bool "Support VIPT Aliasing D$"
Vineet Guptad1f317d2015-04-06 17:23:57 +0530258 depends on ARC_HAS_DCACHE && ISA_ARCOMPACT
Vineet Gupta4102b532013-05-09 21:54:51 +0530259 default n
260
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530261endif #ARC_CACHE
262
Vineet Gupta8b5850f2013-01-18 15:12:25 +0530263config ARC_HAS_ICCM
264 bool "Use ICCM"
265 help
266 Single Cycle RAMS to store Fast Path Code
267 default n
268
269config ARC_ICCM_SZ
270 int "ICCM Size in KB"
271 default "64"
272 depends on ARC_HAS_ICCM
273
274config ARC_HAS_DCCM
275 bool "Use DCCM"
276 help
277 Single Cycle RAMS to store Fast Path Data
278 default n
279
280config ARC_DCCM_SZ
281 int "DCCM Size in KB"
282 default "64"
283 depends on ARC_HAS_DCCM
284
285config ARC_DCCM_BASE
286 hex "DCCM map address"
287 default "0xA0000000"
288 depends on ARC_HAS_DCCM
289
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530290choice
Vineet Gupta1f6ccff2013-05-13 18:30:41 +0530291 prompt "MMU Version"
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530292 default ARC_MMU_V3 if ARC_CPU_770
293 default ARC_MMU_V2 if ARC_CPU_750D
Vineet Guptad7a512b2015-04-06 17:22:39 +0530294 default ARC_MMU_V4 if ARC_CPU_HS
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530295
Vineet Guptac583ee4f2015-09-29 16:01:13 +0530296if ISA_ARCOMPACT
297
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530298config ARC_MMU_V1
299 bool "MMU v1"
300 help
301 Orig ARC700 MMU
302
303config ARC_MMU_V2
304 bool "MMU v2"
305 help
306 Fixed the deficiency of v1 - possible thrashing in memcpy sceanrio
307 when 2 D-TLB and 1 I-TLB entries index into same 2way set.
308
309config ARC_MMU_V3
310 bool "MMU v3"
311 depends on ARC_CPU_770
312 help
313 Introduced with ARC700 4.10: New Features
314 Variable Page size (1k-16k), var JTLB size 128 x (2 or 4)
315 Shared Address Spaces (SASID)
316
Vineet Guptac583ee4f2015-09-29 16:01:13 +0530317endif
318
Vineet Guptad7a512b2015-04-06 17:22:39 +0530319config ARC_MMU_V4
320 bool "MMU v4"
321 depends on ISA_ARCV2
322
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530323endchoice
324
325
326choice
327 prompt "MMU Page Size"
328 default ARC_PAGE_SIZE_8K
329
330config ARC_PAGE_SIZE_8K
331 bool "8KB"
332 help
333 Choose between 8k vs 16k
334
335config ARC_PAGE_SIZE_16K
336 bool "16KB"
Alexey Brodkin450ed0d2015-07-16 21:45:17 +0300337 depends on ARC_MMU_V3 || ARC_MMU_V4
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530338
339config ARC_PAGE_SIZE_4K
340 bool "4KB"
Alexey Brodkin450ed0d2015-07-16 21:45:17 +0300341 depends on ARC_MMU_V3 || ARC_MMU_V4
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530342
343endchoice
344
Vineet Gupta37eda9d2016-02-10 06:52:07 +0530345choice
346 prompt "MMU Super Page Size"
347 depends on ISA_ARCV2 && TRANSPARENT_HUGEPAGE
348 default ARC_HUGEPAGE_2M
349
350config ARC_HUGEPAGE_2M
351 bool "2MB"
352
353config ARC_HUGEPAGE_16M
354 bool "16MB"
355
356endchoice
357
Vineet Gupta26f9d5f2016-04-18 10:49:56 +0530358config NODES_SHIFT
359 int "Maximum NUMA Nodes (as a power of 2)"
Noam Camus3528f842016-09-21 13:51:48 +0300360 default "0" if !DISCONTIGMEM
361 default "1" if DISCONTIGMEM
Vineet Gupta26f9d5f2016-04-18 10:49:56 +0530362 depends on NEED_MULTIPLE_NODES
363 ---help---
364 Accessing memory beyond 1GB (with or w/o PAE) requires 2 memory
365 zones.
366
Vineet Gupta1f6ccff2013-05-13 18:30:41 +0530367if ISA_ARCOMPACT
368
Vineet Gupta4788a592013-01-18 15:12:22 +0530369config ARC_COMPACT_IRQ_LEVELS
Vineet Gupta60f2b4b2016-05-30 19:21:22 +0530370 bool "Setup Timer IRQ as high Priority"
Vineet Gupta4788a592013-01-18 15:12:22 +0530371 default n
Vineet Gupta41195d22013-01-18 15:12:23 +0530372 # if SMP, LV2 enabled ONLY if ARC implementation has LV2 re-entrancy
Vineet Gupta60f2b4b2016-05-30 19:21:22 +0530373 depends on !SMP
Vineet Gupta4788a592013-01-18 15:12:22 +0530374
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530375config ARC_FPU_SAVE_RESTORE
376 bool "Enable FPU state persistence across context switch"
377 default n
378 help
379 Double Precision Floating Point unit had dedictaed regs which
380 need to be saved/restored across context-switch.
381 Note that ARC FPU is overly simplistic, unlike say x86, which has
382 hardware pieces to allow software to conditionally save/restore,
383 based on actual usage of FPU by a task. Thus our implemn does
384 this for all tasks in system.
385
Vineet Gupta1f6ccff2013-05-13 18:30:41 +0530386endif #ISA_ARCOMPACT
387
Vineet Guptafbf8e132013-03-30 15:07:47 +0530388config ARC_CANT_LLSC
389 def_bool n
390
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530391config ARC_HAS_LLSC
392 bool "Insn: LLOCK/SCOND (efficient atomic ops)"
393 default y
Vineet Gupta14a0abf2015-06-26 12:42:53 +0530394 depends on !ARC_CANT_LLSC
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530395
396config ARC_HAS_SWAPE
397 bool "Insn: SWAPE (endian-swap)"
398 default y
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530399
Vineet Gupta1f6ccff2013-05-13 18:30:41 +0530400if ISA_ARCV2
401
402config ARC_HAS_LL64
403 bool "Insn: 64bit LDD/STD"
404 help
405 Enable gcc to generate 64-bit load/store instructions
406 ISA mandates even/odd registers to allow encoding of two
407 dest operands with 2 possible source operands.
408 default y
409
Alexey Brodkind05a76a2015-07-16 21:45:38 +0300410config ARC_HAS_DIV_REM
411 bool "Insn: div, divu, rem, remu"
412 default y
413
Vineet Gupta1f6ccff2013-05-13 18:30:41 +0530414config ARC_NUMBER_OF_INTERRUPTS
415 int "Number of interrupts"
416 range 8 240
417 default 32
418 help
419 This defines the number of interrupts on the ARCv2HS core.
420 It affects the size of vector table.
421 The initial 8 IRQs are fixed (Timer, ICI etc) and although configurable
422 in hardware, it keep things simple for Linux to assume they are always
423 present.
424
425endif # ISA_ARCV2
426
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530427endmenu # "ARC CPU Configuration"
428
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530429config LINUX_LINK_BASE
430 hex "Linux Link Address"
431 default "0x80000000"
432 help
433 ARC700 divides the 32 bit phy address space into two equal halves
434 -Lower 2G (0 - 0x7FFF_FFFF ) is user virtual, translated by MMU
435 -Upper 2G (0x8000_0000 onwards) is untranslated, for kernel
436 Typically Linux kernel is linked at the start of untransalted addr,
437 hence the default value of 0x8zs.
438 However some customers have peripherals mapped at this addr, so
439 Linux needs to be scooted a bit.
440 If you don't know what the above means, leave this setting alone.
Vineet Guptaff1c0b62015-12-15 13:57:16 +0530441 This needs to match memory start address specified in Device Tree
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530442
Vineet Gupta45890f62015-03-09 18:53:49 +0530443config HIGHMEM
444 bool "High Memory Support"
Vineet Guptad140b9b2016-05-31 11:46:47 +0530445 select ARCH_DISCONTIGMEM_ENABLE
Vineet Gupta45890f62015-03-09 18:53:49 +0530446 help
447 With ARC 2G:2G address split, only upper 2G is directly addressable by
448 kernel. Enable this to potentially allow access to rest of 2G and PAE
449 in future
450
Vineet Gupta5a364c22015-02-06 18:44:57 +0300451config ARC_HAS_PAE40
452 bool "Support for the 40-bit Physical Address Extension"
453 default n
454 depends on ISA_ARCV2
Vineet Gupta5a364c22015-02-06 18:44:57 +0300455 help
456 Enable access to physical memory beyond 4G, only supported on
457 ARC cores with 40 bit Physical Addressing support
458
459config ARCH_PHYS_ADDR_T_64BIT
460 def_bool ARC_HAS_PAE40
461
462config ARCH_DMA_ADDR_T_64BIT
463 bool
464
Vineet Guptaf2e3d552016-03-16 16:38:57 +0530465config ARC_PLAT_NEEDS_PHYS_TO_DMA
466 bool
467
Noam Camus15ca68a2014-09-07 22:52:33 +0300468config ARC_KVADDR_SIZE
469 int "Kernel Virtaul Address Space size (MB)"
470 range 0 512
471 default "256"
472 help
473 The kernel address space is carved out of 256MB of translated address
474 space for catering to vmalloc, modules, pkmap, fixmap. This however may
475 not suffice vmalloc requirements of a 4K CPU EZChip system. So allow
476 this to be stretched to 512 MB (by extending into the reserved
477 kernel-user gutter)
478
Vineet Gupta080c3742013-02-11 19:52:57 +0530479config ARC_CURR_IN_REG
480 bool "Dedicate Register r25 for current_task pointer"
481 default y
482 help
483 This reserved Register R25 to point to Current Task in
484 kernel mode. This saves memory access for each such access
485
Vineet Gupta2e651ea2013-01-23 16:30:36 +0530486
Vineet Gupta1736a562014-09-08 11:18:15 +0530487config ARC_EMUL_UNALIGNED
Vineet Gupta2e651ea2013-01-23 16:30:36 +0530488 bool "Emulate unaligned memory access (userspace only)"
Vineet Gupta1f6ccff2013-05-13 18:30:41 +0530489 default N
Vineet Gupta2e651ea2013-01-23 16:30:36 +0530490 select SYSCTL_ARCH_UNALIGN_NO_WARN
491 select SYSCTL_ARCH_UNALIGN_ALLOW
Vineet Gupta1f6ccff2013-05-13 18:30:41 +0530492 depends on ISA_ARCOMPACT
Vineet Gupta2e651ea2013-01-23 16:30:36 +0530493 help
494 This enables misaligned 16 & 32 bit memory access from user space.
495 Use ONLY-IF-ABS-NECESSARY as it will be very slow and also can hide
496 potential bugs in code
497
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530498config HZ
499 int "Timer Frequency"
500 default 100
501
Vineet Guptacbe056f2013-01-18 15:12:25 +0530502config ARC_METAWARE_HLINK
503 bool "Support for Metaware debugger assisted Host access"
504 default n
505 help
506 This options allows a Linux userland apps to directly access
507 host file system (open/creat/read/write etc) with help from
508 Metaware Debugger. This can come in handy for Linux-host communication
509 when there is no real usable peripheral such as EMAC.
510
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530511menuconfig ARC_DBG
512 bool "ARC debugging"
513 default y
514
Vineet Guptaaa6083e2014-11-07 10:45:28 +0530515if ARC_DBG
516
Vineet Gupta854a0d92013-01-22 17:03:19 +0530517config ARC_DW2_UNWIND
518 bool "Enable DWARF specific kernel stack unwind"
Vineet Gupta854a0d92013-01-22 17:03:19 +0530519 default y
520 select KALLSYMS
521 help
522 Compiles the kernel with DWARF unwind information and can be used
523 to get stack backtraces.
524
525 If you say Y here the resulting kernel image will be slightly larger
526 but not slower, and it will give very useful debugging information.
527 If you don't debug the kernel, you can say N, but we may not be able
528 to solve problems without frame unwind information
529
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530530config ARC_DBG_TLB_PARANOIA
531 bool "Paranoia Checks in Low Level TLB Handlers"
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530532 default n
533
Vineet Guptaaa6083e2014-11-07 10:45:28 +0530534endif
535
Vineet Gupta036b2c52015-03-09 19:40:09 +0530536config ARC_UBOOT_SUPPORT
537 bool "Support uboot arg Handling"
538 default n
539 help
540 ARC Linux by default checks for uboot provided args as pointers to
541 external cmdline or DTB. This however breaks in absence of uboot,
542 when booting from Metaware debugger directly, as the registers are
543 not zeroed out on reset by mdb and/or ARCv2 based cores. The bogus
544 registers look like uboot args to kernel which then chokes.
545 So only enable the uboot arg checking/processing if users are sure
546 of uboot being in play.
547
Vineet Gupta999159a2013-01-22 17:00:52 +0530548config ARC_BUILTIN_DTB_NAME
549 string "Built in DTB"
550 help
551 Set the name of the DTB to embed in the vmlinux binary
552 Leaving it blank selects the minimal "skeleton" dtb
553
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530554source "kernel/Kconfig.preempt"
555
Vineet Gupta56288322013-04-06 14:16:20 +0530556menu "Executable file formats"
557source "fs/Kconfig.binfmt"
558endmenu
559
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530560endmenu # "ARC Architecture Configuration"
561
562source "mm/Kconfig"
Vineet Gupta37eda9d2016-02-10 06:52:07 +0530563
564config FORCE_MAX_ZONEORDER
565 int "Maximum zone order"
566 default "12" if ARC_HUGEPAGE_16M
567 default "11"
568
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530569source "net/Kconfig"
570source "drivers/Kconfig"
Joao Pintoc1678ff2016-03-10 14:44:13 -0600571
572menu "Bus Support"
573
574config PCI
575 bool "PCI support" if MIGHT_HAVE_PCI
576 help
577 PCI is the name of a bus system, i.e., the way the CPU talks to
578 the other stuff inside your box. Find out if your board/platform
579 has PCI.
580
581 Note: PCIe support for Synopsys Device will be available only
582 when HAPS DX is configured with PCIe RC bitmap. If you have PCI,
583 say Y, otherwise N.
584
585config PCI_SYSCALL
586 def_bool PCI
587
588source "drivers/pci/Kconfig"
Joao Pintoc1678ff2016-03-10 14:44:13 -0600589
590endmenu
591
Vineet Guptacfdbc2e2013-01-18 15:12:20 +0530592source "fs/Kconfig"
593source "arch/arc/Kconfig.debug"
594source "security/Kconfig"
595source "crypto/Kconfig"
596source "lib/Kconfig"
Alexey Brodkin996bad62014-10-29 15:26:25 +0300597source "kernel/power/Kconfig"