blob: 7ee0da6d0015ff06bd458e14e803cd372cbe3f2b [file] [log] [blame]
Claudiu Manoild4fd04042019-01-22 15:29:54 +02001/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
2/* Copyright 2017-2019 NXP */
3
4#include <linux/timer.h>
5#include <linux/pci.h>
6#include <linux/netdevice.h>
7#include <linux/etherdevice.h>
8#include <linux/dma-mapping.h>
9#include <linux/skbuff.h>
10#include <linux/ethtool.h>
11#include <linux/if_vlan.h>
12#include <linux/phy.h>
13
14#include "enetc_hw.h"
15
16#define ENETC_MAC_MAXFRM_SIZE 9600
17#define ENETC_MAX_MTU (ENETC_MAC_MAXFRM_SIZE - \
18 (ETH_FCS_LEN + ETH_HLEN + VLAN_HLEN))
19
20struct enetc_tx_swbd {
21 struct sk_buff *skb;
22 dma_addr_t dma;
23 u16 len;
Y.b. Lud3982312019-05-23 02:33:29 +000024 u8 is_dma_page:1;
25 u8 check_wb:1;
26 u8 do_tstamp:1;
Claudiu Manoild4fd04042019-01-22 15:29:54 +020027};
28
29#define ENETC_RX_MAXFRM_SIZE ENETC_MAC_MAXFRM_SIZE
30#define ENETC_RXB_TRUESIZE 2048 /* PAGE_SIZE >> 1 */
31#define ENETC_RXB_PAD NET_SKB_PAD /* add extra space if needed */
32#define ENETC_RXB_DMA_SIZE \
33 (SKB_WITH_OVERHEAD(ENETC_RXB_TRUESIZE) - ENETC_RXB_PAD)
34
35struct enetc_rx_swbd {
36 dma_addr_t dma;
37 struct page *page;
38 u16 page_offset;
39};
40
41struct enetc_ring_stats {
42 unsigned int packets;
43 unsigned int bytes;
44 unsigned int rx_alloc_errs;
45};
46
47#define ENETC_BDR_DEFAULT_SIZE 1024
48#define ENETC_DEFAULT_TX_WORK 256
49
50struct enetc_bdr {
51 struct device *dev; /* for DMA mapping */
52 struct net_device *ndev;
53 void *bd_base; /* points to Rx or Tx BD ring */
54 union {
55 void __iomem *tpir;
56 void __iomem *rcir;
57 };
58 u16 index;
59 int bd_count; /* # of BDs */
60 int next_to_use;
61 int next_to_clean;
62 union {
63 struct enetc_tx_swbd *tx_swbd;
64 struct enetc_rx_swbd *rx_swbd;
65 };
66 union {
67 void __iomem *tcir; /* Tx */
68 int next_to_alloc; /* Rx */
69 };
70 void __iomem *idr; /* Interrupt Detect Register pointer */
71
72 struct enetc_ring_stats stats;
73
74 dma_addr_t bd_dma_base;
75} ____cacheline_aligned_in_smp;
76
77static inline void enetc_bdr_idx_inc(struct enetc_bdr *bdr, int *i)
78{
79 if (unlikely(++*i == bdr->bd_count))
80 *i = 0;
81}
82
83static inline int enetc_bd_unused(struct enetc_bdr *bdr)
84{
85 if (bdr->next_to_clean > bdr->next_to_use)
86 return bdr->next_to_clean - bdr->next_to_use - 1;
87
88 return bdr->bd_count + bdr->next_to_clean - bdr->next_to_use - 1;
89}
90
91/* Control BD ring */
92#define ENETC_CBDR_DEFAULT_SIZE 64
93struct enetc_cbdr {
94 void *bd_base; /* points to Rx or Tx BD ring */
95 void __iomem *pir;
96 void __iomem *cir;
97
98 int bd_count; /* # of BDs */
99 int next_to_use;
100 int next_to_clean;
101
102 dma_addr_t bd_dma_base;
103};
104
105#define ENETC_TXBD(BDR, i) (&(((union enetc_tx_bd *)((BDR).bd_base))[i]))
106#define ENETC_RXBD(BDR, i) (&(((union enetc_rx_bd *)((BDR).bd_base))[i]))
107
Claudiu Manoilbeb74ac2019-01-22 15:29:56 +0200108struct enetc_msg_swbd {
109 void *vaddr;
110 dma_addr_t dma;
111 int size;
112};
113
Claudiu Manoild4fd04042019-01-22 15:29:54 +0200114#define ENETC_REV1 0x1
115enum enetc_errata {
116 ENETC_ERR_TXCSUM = BIT(0),
117 ENETC_ERR_VLAN_ISOL = BIT(1),
118 ENETC_ERR_UCMCSWP = BIT(2),
119};
120
Po Liu2e47cb42019-11-15 03:33:41 +0000121#define ENETC_SI_F_QBV BIT(0)
122
Claudiu Manoild4fd04042019-01-22 15:29:54 +0200123/* PCI IEP device data */
124struct enetc_si {
125 struct pci_dev *pdev;
126 struct enetc_hw hw;
127 enum enetc_errata errata;
128
129 struct net_device *ndev; /* back ref. */
130
131 struct enetc_cbdr cbd_ring;
132
133 int num_rx_rings; /* how many rings are available in the SI */
134 int num_tx_rings;
Claudiu Manoild3825632019-01-22 15:29:57 +0200135 int num_fs_entries;
136 int num_rss; /* number of RSS buckets */
Claudiu Manoild4fd04042019-01-22 15:29:54 +0200137 unsigned short pad;
Po Liu2e47cb42019-11-15 03:33:41 +0000138 int hw_features;
Claudiu Manoild4fd04042019-01-22 15:29:54 +0200139};
140
141#define ENETC_SI_ALIGN 32
142
143static inline void *enetc_si_priv(const struct enetc_si *si)
144{
145 return (char *)si + ALIGN(sizeof(struct enetc_si), ENETC_SI_ALIGN);
146}
147
148static inline bool enetc_si_is_pf(struct enetc_si *si)
149{
150 return !!(si->hw.port);
151}
152
153#define ENETC_MAX_NUM_TXQS 8
154#define ENETC_INT_NAME_MAX (IFNAMSIZ + 8)
155
156struct enetc_int_vector {
157 void __iomem *rbier;
158 void __iomem *tbier_base;
159 unsigned long tx_rings_map;
160 int count_tx_rings;
161 struct napi_struct napi;
162 char name[ENETC_INT_NAME_MAX];
163
164 struct enetc_bdr rx_ring ____cacheline_aligned_in_smp;
165 struct enetc_bdr tx_ring[0];
166};
167
Claudiu Manoild3825632019-01-22 15:29:57 +0200168struct enetc_cls_rule {
169 struct ethtool_rx_flow_spec fs;
170 int used;
171};
172
Claudiu Manoild4fd04042019-01-22 15:29:54 +0200173#define ENETC_MAX_BDR_INT 2 /* fixed to max # of available cpus */
174
Y.b. Lud3982312019-05-23 02:33:29 +0000175/* TODO: more hardware offloads */
176enum enetc_active_offloads {
177 ENETC_F_RX_TSTAMP = BIT(0),
178 ENETC_F_TX_TSTAMP = BIT(1),
Po Liu2e47cb42019-11-15 03:33:41 +0000179 ENETC_F_QBV = BIT(2),
Y.b. Lud3982312019-05-23 02:33:29 +0000180};
181
Claudiu Manoild4fd04042019-01-22 15:29:54 +0200182struct enetc_ndev_priv {
183 struct net_device *ndev;
184 struct device *dev; /* dma-mapping device */
185 struct enetc_si *si;
186
187 int bdr_int_num; /* number of Rx/Tx ring interrupts */
188 struct enetc_int_vector *int_vector[ENETC_MAX_BDR_INT];
189 u16 num_rx_rings, num_tx_rings;
190 u16 rx_bd_count, tx_bd_count;
191
192 u16 msg_enable;
Y.b. Lud3982312019-05-23 02:33:29 +0000193 int active_offloads;
Claudiu Manoild4fd04042019-01-22 15:29:54 +0200194
Po Liu2e47cb42019-11-15 03:33:41 +0000195 u32 speed; /* store speed for compare update pspeed */
196
Claudiu Manoild4fd04042019-01-22 15:29:54 +0200197 struct enetc_bdr *tx_ring[16];
198 struct enetc_bdr *rx_ring[16];
199
Claudiu Manoild3825632019-01-22 15:29:57 +0200200 struct enetc_cls_rule *cls_rules;
201
Claudiu Manoild4fd04042019-01-22 15:29:54 +0200202 struct device_node *phy_node;
203 phy_interface_t if_mode;
204};
205
Claudiu Manoilbeb74ac2019-01-22 15:29:56 +0200206/* Messaging */
207
208/* VF-PF set primary MAC address message format */
209struct enetc_msg_cmd_set_primary_mac {
210 struct enetc_msg_cmd_header header;
211 struct sockaddr mac;
212};
213
Claudiu Manoild4fd04042019-01-22 15:29:54 +0200214#define ENETC_CBD(R, i) (&(((struct enetc_cbd *)((R).bd_base))[i]))
215
216#define ENETC_CBDR_TIMEOUT 1000 /* usecs */
217
Y.b. Lu41514732019-05-23 02:33:33 +0000218/* PTP driver exports */
219extern int enetc_phc_index;
220
Claudiu Manoild4fd04042019-01-22 15:29:54 +0200221/* SI common */
222int enetc_pci_probe(struct pci_dev *pdev, const char *name, int sizeof_priv);
223void enetc_pci_remove(struct pci_dev *pdev);
224int enetc_alloc_msix(struct enetc_ndev_priv *priv);
225void enetc_free_msix(struct enetc_ndev_priv *priv);
226void enetc_get_si_caps(struct enetc_si *si);
227void enetc_init_si_rings_params(struct enetc_ndev_priv *priv);
228int enetc_alloc_si_resources(struct enetc_ndev_priv *priv);
229void enetc_free_si_resources(struct enetc_ndev_priv *priv);
230
231int enetc_open(struct net_device *ndev);
232int enetc_close(struct net_device *ndev);
233netdev_tx_t enetc_xmit(struct sk_buff *skb, struct net_device *ndev);
234struct net_device_stats *enetc_get_stats(struct net_device *ndev);
Claudiu Manoild3825632019-01-22 15:29:57 +0200235int enetc_set_features(struct net_device *ndev,
236 netdev_features_t features);
Y.b. Lud3982312019-05-23 02:33:29 +0000237int enetc_ioctl(struct net_device *ndev, struct ifreq *rq, int cmd);
Camelia Grozacbe9e832019-05-27 18:21:31 +0300238int enetc_setup_tc(struct net_device *ndev, enum tc_setup_type type,
239 void *type_data);
240
Claudiu Manoild4fd04042019-01-22 15:29:54 +0200241/* ethtool */
242void enetc_set_ethtool_ops(struct net_device *ndev);
243
244/* control buffer descriptor ring (CBDR) */
245int enetc_set_mac_flt_entry(struct enetc_si *si, int index,
246 char *mac_addr, int si_map);
247int enetc_clear_mac_flt_entry(struct enetc_si *si, int index);
Claudiu Manoild3825632019-01-22 15:29:57 +0200248int enetc_set_fs_entry(struct enetc_si *si, struct enetc_cmd_rfse *rfse,
249 int index);
250void enetc_set_rss_key(struct enetc_hw *hw, const u8 *bytes);
251int enetc_get_rss_table(struct enetc_si *si, u32 *table, int count);
252int enetc_set_rss_table(struct enetc_si *si, const u32 *table, int count);
Po Liu34c6adf2019-11-15 03:33:33 +0000253int enetc_send_cmd(struct enetc_si *si, struct enetc_cbd *cbd);
254
255#ifdef CONFIG_FSL_ENETC_QOS
256int enetc_setup_tc_taprio(struct net_device *ndev, void *type_data);
Po Liu2e47cb42019-11-15 03:33:41 +0000257void enetc_sched_speed_set(struct net_device *ndev);
Po Liuc4310472019-11-25 05:56:56 +0000258int enetc_setup_tc_cbs(struct net_device *ndev, void *type_data);
Po Liu34c6adf2019-11-15 03:33:33 +0000259#else
260#define enetc_setup_tc_taprio(ndev, type_data) -EOPNOTSUPP
Po Liu2e47cb42019-11-15 03:33:41 +0000261#define enetc_sched_speed_set(ndev) (void)0
Po Liuc4310472019-11-25 05:56:56 +0000262#define enetc_setup_tc_cbs(ndev, type_data) -EOPNOTSUPP
Po Liu34c6adf2019-11-15 03:33:33 +0000263#endif