Thomas Gleixner | ec8f24b | 2019-05-19 13:07:45 +0100 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0-only |
James Liao | 2886c84 | 2016-08-19 13:34:49 +0800 | [diff] [blame] | 2 | # |
Sean Wang | 16a1ac1 | 2017-12-20 14:42:58 +0800 | [diff] [blame] | 3 | # MediaTek Clock Drivers |
James Liao | 2886c84 | 2016-08-19 13:34:49 +0800 | [diff] [blame] | 4 | # |
Sean Wang | 16a1ac1 | 2017-12-20 14:42:58 +0800 | [diff] [blame] | 5 | menu "Clock driver for MediaTek SoC" |
| 6 | depends on ARCH_MEDIATEK || COMPILE_TEST |
| 7 | |
James Liao | 2886c84 | 2016-08-19 13:34:49 +0800 | [diff] [blame] | 8 | config COMMON_CLK_MEDIATEK |
| 9 | bool |
Sean Wang | bc27360 | 2018-01-05 16:14:06 +0800 | [diff] [blame] | 10 | select RESET_CONTROLLER |
Masahiro Yamada | a7f7f62 | 2020-06-14 01:50:22 +0900 | [diff] [blame] | 11 | help |
Sean Wang | 16a1ac1 | 2017-12-20 14:42:58 +0800 | [diff] [blame] | 12 | MediaTek SoCs' clock support. |
James Liao | 2886c84 | 2016-08-19 13:34:49 +0800 | [diff] [blame] | 13 | |
Shunli Wang | e986211 | 2016-11-04 15:43:05 +0800 | [diff] [blame] | 14 | config COMMON_CLK_MT2701 |
Sean Wang | 16a1ac1 | 2017-12-20 14:42:58 +0800 | [diff] [blame] | 15 | bool "Clock driver for MediaTek MT2701" |
Jean Delvare | 6e9c0d5 | 2017-01-24 13:07:04 +0100 | [diff] [blame] | 16 | depends on (ARCH_MEDIATEK && ARM) || COMPILE_TEST |
Shunli Wang | e986211 | 2016-11-04 15:43:05 +0800 | [diff] [blame] | 17 | select COMMON_CLK_MEDIATEK |
Jean Delvare | 6e9c0d5 | 2017-01-24 13:07:04 +0100 | [diff] [blame] | 18 | default ARCH_MEDIATEK && ARM |
Masahiro Yamada | a7f7f62 | 2020-06-14 01:50:22 +0900 | [diff] [blame] | 19 | help |
Sean Wang | 16a1ac1 | 2017-12-20 14:42:58 +0800 | [diff] [blame] | 20 | This driver supports MediaTek MT2701 basic clocks. |
Shunli Wang | e986211 | 2016-11-04 15:43:05 +0800 | [diff] [blame] | 21 | |
| 22 | config COMMON_CLK_MT2701_MMSYS |
Sean Wang | 16a1ac1 | 2017-12-20 14:42:58 +0800 | [diff] [blame] | 23 | bool "Clock driver for MediaTek MT2701 mmsys" |
Jean Delvare | 6e9c0d5 | 2017-01-24 13:07:04 +0100 | [diff] [blame] | 24 | depends on COMMON_CLK_MT2701 |
Masahiro Yamada | a7f7f62 | 2020-06-14 01:50:22 +0900 | [diff] [blame] | 25 | help |
Sean Wang | 16a1ac1 | 2017-12-20 14:42:58 +0800 | [diff] [blame] | 26 | This driver supports MediaTek MT2701 mmsys clocks. |
Shunli Wang | e986211 | 2016-11-04 15:43:05 +0800 | [diff] [blame] | 27 | |
| 28 | config COMMON_CLK_MT2701_IMGSYS |
Sean Wang | 16a1ac1 | 2017-12-20 14:42:58 +0800 | [diff] [blame] | 29 | bool "Clock driver for MediaTek MT2701 imgsys" |
Jean Delvare | 6e9c0d5 | 2017-01-24 13:07:04 +0100 | [diff] [blame] | 30 | depends on COMMON_CLK_MT2701 |
Masahiro Yamada | a7f7f62 | 2020-06-14 01:50:22 +0900 | [diff] [blame] | 31 | help |
Sean Wang | 16a1ac1 | 2017-12-20 14:42:58 +0800 | [diff] [blame] | 32 | This driver supports MediaTek MT2701 imgsys clocks. |
Shunli Wang | e986211 | 2016-11-04 15:43:05 +0800 | [diff] [blame] | 33 | |
| 34 | config COMMON_CLK_MT2701_VDECSYS |
Sean Wang | 16a1ac1 | 2017-12-20 14:42:58 +0800 | [diff] [blame] | 35 | bool "Clock driver for MediaTek MT2701 vdecsys" |
Jean Delvare | 6e9c0d5 | 2017-01-24 13:07:04 +0100 | [diff] [blame] | 36 | depends on COMMON_CLK_MT2701 |
Masahiro Yamada | a7f7f62 | 2020-06-14 01:50:22 +0900 | [diff] [blame] | 37 | help |
Sean Wang | 16a1ac1 | 2017-12-20 14:42:58 +0800 | [diff] [blame] | 38 | This driver supports MediaTek MT2701 vdecsys clocks. |
Shunli Wang | e986211 | 2016-11-04 15:43:05 +0800 | [diff] [blame] | 39 | |
| 40 | config COMMON_CLK_MT2701_HIFSYS |
Sean Wang | 16a1ac1 | 2017-12-20 14:42:58 +0800 | [diff] [blame] | 41 | bool "Clock driver for MediaTek MT2701 hifsys" |
Jean Delvare | 6e9c0d5 | 2017-01-24 13:07:04 +0100 | [diff] [blame] | 42 | depends on COMMON_CLK_MT2701 |
Masahiro Yamada | a7f7f62 | 2020-06-14 01:50:22 +0900 | [diff] [blame] | 43 | help |
Sean Wang | 16a1ac1 | 2017-12-20 14:42:58 +0800 | [diff] [blame] | 44 | This driver supports MediaTek MT2701 hifsys clocks. |
Shunli Wang | e986211 | 2016-11-04 15:43:05 +0800 | [diff] [blame] | 45 | |
| 46 | config COMMON_CLK_MT2701_ETHSYS |
Sean Wang | 16a1ac1 | 2017-12-20 14:42:58 +0800 | [diff] [blame] | 47 | bool "Clock driver for MediaTek MT2701 ethsys" |
Jean Delvare | 6e9c0d5 | 2017-01-24 13:07:04 +0100 | [diff] [blame] | 48 | depends on COMMON_CLK_MT2701 |
Masahiro Yamada | a7f7f62 | 2020-06-14 01:50:22 +0900 | [diff] [blame] | 49 | help |
Sean Wang | 16a1ac1 | 2017-12-20 14:42:58 +0800 | [diff] [blame] | 50 | This driver supports MediaTek MT2701 ethsys clocks. |
Shunli Wang | e986211 | 2016-11-04 15:43:05 +0800 | [diff] [blame] | 51 | |
| 52 | config COMMON_CLK_MT2701_BDPSYS |
Sean Wang | 16a1ac1 | 2017-12-20 14:42:58 +0800 | [diff] [blame] | 53 | bool "Clock driver for MediaTek MT2701 bdpsys" |
Jean Delvare | 6e9c0d5 | 2017-01-24 13:07:04 +0100 | [diff] [blame] | 54 | depends on COMMON_CLK_MT2701 |
Masahiro Yamada | a7f7f62 | 2020-06-14 01:50:22 +0900 | [diff] [blame] | 55 | help |
Sean Wang | 16a1ac1 | 2017-12-20 14:42:58 +0800 | [diff] [blame] | 56 | This driver supports MediaTek MT2701 bdpsys clocks. |
Shunli Wang | e986211 | 2016-11-04 15:43:05 +0800 | [diff] [blame] | 57 | |
Ryder Lee | b572f63 | 2018-03-20 11:16:52 +0800 | [diff] [blame] | 58 | config COMMON_CLK_MT2701_AUDSYS |
| 59 | bool "Clock driver for Mediatek MT2701 audsys" |
| 60 | depends on COMMON_CLK_MT2701 |
Masahiro Yamada | a7f7f62 | 2020-06-14 01:50:22 +0900 | [diff] [blame] | 61 | help |
Ryder Lee | b572f63 | 2018-03-20 11:16:52 +0800 | [diff] [blame] | 62 | This driver supports Mediatek MT2701 audsys clocks. |
| 63 | |
Sean Wang | a11ca68 | 2018-04-27 16:14:46 +0800 | [diff] [blame] | 64 | config COMMON_CLK_MT2701_G3DSYS |
| 65 | bool "Clock driver for MediaTek MT2701 g3dsys" |
| 66 | depends on COMMON_CLK_MT2701 |
Masahiro Yamada | a7f7f62 | 2020-06-14 01:50:22 +0900 | [diff] [blame] | 67 | help |
Sean Wang | a11ca68 | 2018-04-27 16:14:46 +0800 | [diff] [blame] | 68 | This driver supports MediaTek MT2701 g3dsys clocks. |
| 69 | |
weiyi.lu@mediatek.com | e2f744a | 2017-10-23 12:10:34 +0800 | [diff] [blame] | 70 | config COMMON_CLK_MT2712 |
Sean Wang | 16a1ac1 | 2017-12-20 14:42:58 +0800 | [diff] [blame] | 71 | bool "Clock driver for MediaTek MT2712" |
weiyi.lu@mediatek.com | e2f744a | 2017-10-23 12:10:34 +0800 | [diff] [blame] | 72 | depends on (ARCH_MEDIATEK && ARM64) || COMPILE_TEST |
| 73 | select COMMON_CLK_MEDIATEK |
| 74 | default ARCH_MEDIATEK && ARM64 |
Masahiro Yamada | a7f7f62 | 2020-06-14 01:50:22 +0900 | [diff] [blame] | 75 | help |
Sean Wang | 16a1ac1 | 2017-12-20 14:42:58 +0800 | [diff] [blame] | 76 | This driver supports MediaTek MT2712 basic clocks. |
weiyi.lu@mediatek.com | e2f744a | 2017-10-23 12:10:34 +0800 | [diff] [blame] | 77 | |
| 78 | config COMMON_CLK_MT2712_BDPSYS |
Sean Wang | 16a1ac1 | 2017-12-20 14:42:58 +0800 | [diff] [blame] | 79 | bool "Clock driver for MediaTek MT2712 bdpsys" |
weiyi.lu@mediatek.com | e2f744a | 2017-10-23 12:10:34 +0800 | [diff] [blame] | 80 | depends on COMMON_CLK_MT2712 |
Masahiro Yamada | a7f7f62 | 2020-06-14 01:50:22 +0900 | [diff] [blame] | 81 | help |
Sean Wang | 16a1ac1 | 2017-12-20 14:42:58 +0800 | [diff] [blame] | 82 | This driver supports MediaTek MT2712 bdpsys clocks. |
weiyi.lu@mediatek.com | e2f744a | 2017-10-23 12:10:34 +0800 | [diff] [blame] | 83 | |
| 84 | config COMMON_CLK_MT2712_IMGSYS |
Sean Wang | 16a1ac1 | 2017-12-20 14:42:58 +0800 | [diff] [blame] | 85 | bool "Clock driver for MediaTek MT2712 imgsys" |
weiyi.lu@mediatek.com | e2f744a | 2017-10-23 12:10:34 +0800 | [diff] [blame] | 86 | depends on COMMON_CLK_MT2712 |
Masahiro Yamada | a7f7f62 | 2020-06-14 01:50:22 +0900 | [diff] [blame] | 87 | help |
Sean Wang | 16a1ac1 | 2017-12-20 14:42:58 +0800 | [diff] [blame] | 88 | This driver supports MediaTek MT2712 imgsys clocks. |
weiyi.lu@mediatek.com | e2f744a | 2017-10-23 12:10:34 +0800 | [diff] [blame] | 89 | |
| 90 | config COMMON_CLK_MT2712_JPGDECSYS |
Sean Wang | 16a1ac1 | 2017-12-20 14:42:58 +0800 | [diff] [blame] | 91 | bool "Clock driver for MediaTek MT2712 jpgdecsys" |
weiyi.lu@mediatek.com | e2f744a | 2017-10-23 12:10:34 +0800 | [diff] [blame] | 92 | depends on COMMON_CLK_MT2712 |
Masahiro Yamada | a7f7f62 | 2020-06-14 01:50:22 +0900 | [diff] [blame] | 93 | help |
Sean Wang | 16a1ac1 | 2017-12-20 14:42:58 +0800 | [diff] [blame] | 94 | This driver supports MediaTek MT2712 jpgdecsys clocks. |
weiyi.lu@mediatek.com | e2f744a | 2017-10-23 12:10:34 +0800 | [diff] [blame] | 95 | |
| 96 | config COMMON_CLK_MT2712_MFGCFG |
Sean Wang | 16a1ac1 | 2017-12-20 14:42:58 +0800 | [diff] [blame] | 97 | bool "Clock driver for MediaTek MT2712 mfgcfg" |
weiyi.lu@mediatek.com | e2f744a | 2017-10-23 12:10:34 +0800 | [diff] [blame] | 98 | depends on COMMON_CLK_MT2712 |
Masahiro Yamada | a7f7f62 | 2020-06-14 01:50:22 +0900 | [diff] [blame] | 99 | help |
Sean Wang | 16a1ac1 | 2017-12-20 14:42:58 +0800 | [diff] [blame] | 100 | This driver supports MediaTek MT2712 mfgcfg clocks. |
weiyi.lu@mediatek.com | e2f744a | 2017-10-23 12:10:34 +0800 | [diff] [blame] | 101 | |
| 102 | config COMMON_CLK_MT2712_MMSYS |
Sean Wang | 16a1ac1 | 2017-12-20 14:42:58 +0800 | [diff] [blame] | 103 | bool "Clock driver for MediaTek MT2712 mmsys" |
weiyi.lu@mediatek.com | e2f744a | 2017-10-23 12:10:34 +0800 | [diff] [blame] | 104 | depends on COMMON_CLK_MT2712 |
Masahiro Yamada | a7f7f62 | 2020-06-14 01:50:22 +0900 | [diff] [blame] | 105 | help |
Sean Wang | 16a1ac1 | 2017-12-20 14:42:58 +0800 | [diff] [blame] | 106 | This driver supports MediaTek MT2712 mmsys clocks. |
weiyi.lu@mediatek.com | e2f744a | 2017-10-23 12:10:34 +0800 | [diff] [blame] | 107 | |
| 108 | config COMMON_CLK_MT2712_VDECSYS |
Sean Wang | 16a1ac1 | 2017-12-20 14:42:58 +0800 | [diff] [blame] | 109 | bool "Clock driver for MediaTek MT2712 vdecsys" |
weiyi.lu@mediatek.com | e2f744a | 2017-10-23 12:10:34 +0800 | [diff] [blame] | 110 | depends on COMMON_CLK_MT2712 |
Masahiro Yamada | a7f7f62 | 2020-06-14 01:50:22 +0900 | [diff] [blame] | 111 | help |
Sean Wang | 16a1ac1 | 2017-12-20 14:42:58 +0800 | [diff] [blame] | 112 | This driver supports MediaTek MT2712 vdecsys clocks. |
weiyi.lu@mediatek.com | e2f744a | 2017-10-23 12:10:34 +0800 | [diff] [blame] | 113 | |
| 114 | config COMMON_CLK_MT2712_VENCSYS |
Sean Wang | 16a1ac1 | 2017-12-20 14:42:58 +0800 | [diff] [blame] | 115 | bool "Clock driver for MediaTek MT2712 vencsys" |
weiyi.lu@mediatek.com | e2f744a | 2017-10-23 12:10:34 +0800 | [diff] [blame] | 116 | depends on COMMON_CLK_MT2712 |
Masahiro Yamada | a7f7f62 | 2020-06-14 01:50:22 +0900 | [diff] [blame] | 117 | help |
Sean Wang | 16a1ac1 | 2017-12-20 14:42:58 +0800 | [diff] [blame] | 118 | This driver supports MediaTek MT2712 vencsys clocks. |
weiyi.lu@mediatek.com | e2f744a | 2017-10-23 12:10:34 +0800 | [diff] [blame] | 119 | |
Owen Chen | 1aca993 | 2020-02-21 17:52:22 +0800 | [diff] [blame] | 120 | config COMMON_CLK_MT6765 |
| 121 | bool "Clock driver for MediaTek MT6765" |
| 122 | depends on (ARCH_MEDIATEK && ARM64) || COMPILE_TEST |
| 123 | select COMMON_CLK_MEDIATEK |
| 124 | default ARCH_MEDIATEK && ARM64 |
| 125 | help |
| 126 | This driver supports MediaTek MT6765 basic clocks. |
| 127 | |
| 128 | config COMMON_CLK_MT6765_AUDIOSYS |
| 129 | bool "Clock driver for MediaTek MT6765 audiosys" |
| 130 | depends on COMMON_CLK_MT6765 |
| 131 | help |
| 132 | This driver supports MediaTek MT6765 audiosys clocks. |
| 133 | |
| 134 | config COMMON_CLK_MT6765_CAMSYS |
| 135 | bool "Clock driver for MediaTek MT6765 camsys" |
| 136 | depends on COMMON_CLK_MT6765 |
| 137 | help |
| 138 | This driver supports MediaTek MT6765 camsys clocks. |
| 139 | |
| 140 | config COMMON_CLK_MT6765_GCESYS |
| 141 | bool "Clock driver for MediaTek MT6765 gcesys" |
| 142 | depends on COMMON_CLK_MT6765 |
| 143 | help |
| 144 | This driver supports MediaTek MT6765 gcesys clocks. |
| 145 | |
| 146 | config COMMON_CLK_MT6765_MMSYS |
| 147 | bool "Clock driver for MediaTek MT6765 mmsys" |
| 148 | depends on COMMON_CLK_MT6765 |
| 149 | help |
| 150 | This driver supports MediaTek MT6765 mmsys clocks. |
| 151 | |
| 152 | config COMMON_CLK_MT6765_IMGSYS |
| 153 | bool "Clock driver for MediaTek MT6765 imgsys" |
| 154 | depends on COMMON_CLK_MT6765 |
| 155 | help |
| 156 | This driver supports MediaTek MT6765 imgsys clocks. |
| 157 | |
| 158 | config COMMON_CLK_MT6765_VCODECSYS |
| 159 | bool "Clock driver for MediaTek MT6765 vcodecsys" |
| 160 | depends on COMMON_CLK_MT6765 |
| 161 | help |
| 162 | This driver supports MediaTek MT6765 vcodecsys clocks. |
| 163 | |
| 164 | config COMMON_CLK_MT6765_MFGSYS |
| 165 | bool "Clock driver for MediaTek MT6765 mfgsys" |
| 166 | depends on COMMON_CLK_MT6765 |
| 167 | help |
| 168 | This driver supports MediaTek MT6765 mfgsys clocks. |
| 169 | |
| 170 | config COMMON_CLK_MT6765_MIPI0ASYS |
| 171 | bool "Clock driver for MediaTek MT6765 mipi0asys" |
| 172 | depends on COMMON_CLK_MT6765 |
| 173 | help |
| 174 | This driver supports MediaTek MT6765 mipi0asys clocks. |
| 175 | |
| 176 | config COMMON_CLK_MT6765_MIPI0BSYS |
| 177 | bool "Clock driver for MediaTek MT6765 mipi0bsys" |
| 178 | depends on COMMON_CLK_MT6765 |
| 179 | help |
| 180 | This driver supports MediaTek MT6765 mipi0bsys clocks. |
| 181 | |
| 182 | config COMMON_CLK_MT6765_MIPI1ASYS |
| 183 | bool "Clock driver for MediaTek MT6765 mipi1asys" |
| 184 | depends on COMMON_CLK_MT6765 |
| 185 | help |
| 186 | This driver supports MediaTek MT6765 mipi1asys clocks. |
| 187 | |
| 188 | config COMMON_CLK_MT6765_MIPI1BSYS |
| 189 | bool "Clock driver for MediaTek MT6765 mipi1bsys" |
| 190 | depends on COMMON_CLK_MT6765 |
| 191 | help |
| 192 | This driver supports MediaTek MT6765 mipi1bsys clocks. |
| 193 | |
| 194 | config COMMON_CLK_MT6765_MIPI2ASYS |
| 195 | bool "Clock driver for MediaTek MT6765 mipi2asys" |
| 196 | depends on COMMON_CLK_MT6765 |
| 197 | help |
| 198 | This driver supports MediaTek MT6765 mipi2asys clocks. |
| 199 | |
| 200 | config COMMON_CLK_MT6765_MIPI2BSYS |
| 201 | bool "Clock driver for MediaTek MT6765 mipi2bsys" |
| 202 | depends on COMMON_CLK_MT6765 |
| 203 | help |
| 204 | This driver supports MediaTek MT6765 mipi2bsys clocks. |
| 205 | |
mtk01761 | 710774e | 2019-08-19 17:21:41 +0800 | [diff] [blame] | 206 | config COMMON_CLK_MT6779 |
| 207 | bool "Clock driver for MediaTek MT6779" |
| 208 | depends on (ARCH_MEDIATEK && ARM64) || COMPILE_TEST |
| 209 | select COMMON_CLK_MEDIATEK |
| 210 | default ARCH_MEDIATEK && ARM64 |
| 211 | help |
| 212 | This driver supports MediaTek MT6779 basic clocks. |
| 213 | |
| 214 | config COMMON_CLK_MT6779_MMSYS |
| 215 | bool "Clock driver for MediaTek MT6779 mmsys" |
| 216 | depends on COMMON_CLK_MT6779 |
| 217 | help |
| 218 | This driver supports MediaTek MT6779 mmsys clocks. |
| 219 | |
| 220 | config COMMON_CLK_MT6779_IMGSYS |
| 221 | bool "Clock driver for MediaTek MT6779 imgsys" |
| 222 | depends on COMMON_CLK_MT6779 |
| 223 | help |
| 224 | This driver supports MediaTek MT6779 imgsys clocks. |
| 225 | |
| 226 | config COMMON_CLK_MT6779_IPESYS |
| 227 | bool "Clock driver for MediaTek MT6779 ipesys" |
| 228 | depends on COMMON_CLK_MT6779 |
| 229 | help |
| 230 | This driver supports MediaTek MT6779 ipesys clocks. |
| 231 | |
| 232 | config COMMON_CLK_MT6779_CAMSYS |
| 233 | bool "Clock driver for MediaTek MT6779 camsys" |
| 234 | depends on COMMON_CLK_MT6779 |
| 235 | help |
| 236 | This driver supports MediaTek MT6779 camsys clocks. |
| 237 | |
| 238 | config COMMON_CLK_MT6779_VDECSYS |
| 239 | bool "Clock driver for MediaTek MT6779 vdecsys" |
| 240 | depends on COMMON_CLK_MT6779 |
| 241 | help |
| 242 | This driver supports MediaTek MT6779 vdecsys clocks. |
| 243 | |
| 244 | config COMMON_CLK_MT6779_VENCSYS |
| 245 | bool "Clock driver for MediaTek MT6779 vencsys" |
| 246 | depends on COMMON_CLK_MT6779 |
| 247 | help |
| 248 | This driver supports MediaTek MT6779 vencsys clocks. |
| 249 | |
| 250 | config COMMON_CLK_MT6779_MFGCFG |
| 251 | bool "Clock driver for MediaTek MT6779 mfgcfg" |
| 252 | depends on COMMON_CLK_MT6779 |
| 253 | help |
| 254 | This driver supports MediaTek MT6779 mfgcfg clocks. |
| 255 | |
| 256 | config COMMON_CLK_MT6779_AUDSYS |
| 257 | bool "Clock driver for Mediatek MT6779 audsys" |
| 258 | depends on COMMON_CLK_MT6779 |
| 259 | help |
| 260 | This driver supports Mediatek MT6779 audsys clocks. |
| 261 | |
Kevin-CW Chen | 96596aa | 2017-04-08 09:20:30 +0800 | [diff] [blame] | 262 | config COMMON_CLK_MT6797 |
Krzysztof Kozlowski | 333d2d1 | 2019-11-21 04:18:55 +0100 | [diff] [blame] | 263 | bool "Clock driver for MediaTek MT6797" |
| 264 | depends on (ARCH_MEDIATEK && ARM64) || COMPILE_TEST |
| 265 | select COMMON_CLK_MEDIATEK |
| 266 | default ARCH_MEDIATEK && ARM64 |
Masahiro Yamada | a7f7f62 | 2020-06-14 01:50:22 +0900 | [diff] [blame] | 267 | help |
Krzysztof Kozlowski | 333d2d1 | 2019-11-21 04:18:55 +0100 | [diff] [blame] | 268 | This driver supports MediaTek MT6797 basic clocks. |
Kevin-CW Chen | 96596aa | 2017-04-08 09:20:30 +0800 | [diff] [blame] | 269 | |
| 270 | config COMMON_CLK_MT6797_MMSYS |
Krzysztof Kozlowski | 333d2d1 | 2019-11-21 04:18:55 +0100 | [diff] [blame] | 271 | bool "Clock driver for MediaTek MT6797 mmsys" |
| 272 | depends on COMMON_CLK_MT6797 |
Masahiro Yamada | a7f7f62 | 2020-06-14 01:50:22 +0900 | [diff] [blame] | 273 | help |
Krzysztof Kozlowski | 333d2d1 | 2019-11-21 04:18:55 +0100 | [diff] [blame] | 274 | This driver supports MediaTek MT6797 mmsys clocks. |
Kevin-CW Chen | 96596aa | 2017-04-08 09:20:30 +0800 | [diff] [blame] | 275 | |
| 276 | config COMMON_CLK_MT6797_IMGSYS |
Krzysztof Kozlowski | 333d2d1 | 2019-11-21 04:18:55 +0100 | [diff] [blame] | 277 | bool "Clock driver for MediaTek MT6797 imgsys" |
| 278 | depends on COMMON_CLK_MT6797 |
Masahiro Yamada | a7f7f62 | 2020-06-14 01:50:22 +0900 | [diff] [blame] | 279 | help |
Krzysztof Kozlowski | 333d2d1 | 2019-11-21 04:18:55 +0100 | [diff] [blame] | 280 | This driver supports MediaTek MT6797 imgsys clocks. |
Kevin-CW Chen | 96596aa | 2017-04-08 09:20:30 +0800 | [diff] [blame] | 281 | |
| 282 | config COMMON_CLK_MT6797_VDECSYS |
Krzysztof Kozlowski | 333d2d1 | 2019-11-21 04:18:55 +0100 | [diff] [blame] | 283 | bool "Clock driver for MediaTek MT6797 vdecsys" |
| 284 | depends on COMMON_CLK_MT6797 |
Masahiro Yamada | a7f7f62 | 2020-06-14 01:50:22 +0900 | [diff] [blame] | 285 | help |
Krzysztof Kozlowski | 333d2d1 | 2019-11-21 04:18:55 +0100 | [diff] [blame] | 286 | This driver supports MediaTek MT6797 vdecsys clocks. |
Kevin-CW Chen | 96596aa | 2017-04-08 09:20:30 +0800 | [diff] [blame] | 287 | |
| 288 | config COMMON_CLK_MT6797_VENCSYS |
Krzysztof Kozlowski | 333d2d1 | 2019-11-21 04:18:55 +0100 | [diff] [blame] | 289 | bool "Clock driver for MediaTek MT6797 vencsys" |
| 290 | depends on COMMON_CLK_MT6797 |
Masahiro Yamada | a7f7f62 | 2020-06-14 01:50:22 +0900 | [diff] [blame] | 291 | help |
Krzysztof Kozlowski | 333d2d1 | 2019-11-21 04:18:55 +0100 | [diff] [blame] | 292 | This driver supports MediaTek MT6797 vencsys clocks. |
Kevin-CW Chen | 96596aa | 2017-04-08 09:20:30 +0800 | [diff] [blame] | 293 | |
Sean Wang | 2fc0a50 | 2017-10-05 11:50:24 +0800 | [diff] [blame] | 294 | config COMMON_CLK_MT7622 |
| 295 | bool "Clock driver for MediaTek MT7622" |
| 296 | depends on ARCH_MEDIATEK || COMPILE_TEST |
| 297 | select COMMON_CLK_MEDIATEK |
| 298 | default ARCH_MEDIATEK |
Masahiro Yamada | a7f7f62 | 2020-06-14 01:50:22 +0900 | [diff] [blame] | 299 | help |
Sean Wang | 2fc0a50 | 2017-10-05 11:50:24 +0800 | [diff] [blame] | 300 | This driver supports MediaTek MT7622 basic clocks and clocks |
| 301 | required for various periperals found on MediaTek. |
| 302 | |
| 303 | config COMMON_CLK_MT7622_ETHSYS |
| 304 | bool "Clock driver for MediaTek MT7622 ETHSYS" |
| 305 | depends on COMMON_CLK_MT7622 |
Masahiro Yamada | a7f7f62 | 2020-06-14 01:50:22 +0900 | [diff] [blame] | 306 | help |
Sean Wang | 2fc0a50 | 2017-10-05 11:50:24 +0800 | [diff] [blame] | 307 | This driver add support for clocks for Ethernet and SGMII |
| 308 | required on MediaTek MT7622 SoC. |
| 309 | |
| 310 | config COMMON_CLK_MT7622_HIFSYS |
| 311 | bool "Clock driver for MediaTek MT7622 HIFSYS" |
| 312 | depends on COMMON_CLK_MT7622 |
Masahiro Yamada | a7f7f62 | 2020-06-14 01:50:22 +0900 | [diff] [blame] | 313 | help |
Sean Wang | 2fc0a50 | 2017-10-05 11:50:24 +0800 | [diff] [blame] | 314 | This driver supports MediaTek MT7622 HIFSYS clocks providing |
| 315 | to PCI-E and USB. |
| 316 | |
| 317 | config COMMON_CLK_MT7622_AUDSYS |
| 318 | bool "Clock driver for MediaTek MT7622 AUDSYS" |
| 319 | depends on COMMON_CLK_MT7622 |
Masahiro Yamada | a7f7f62 | 2020-06-14 01:50:22 +0900 | [diff] [blame] | 320 | help |
Sean Wang | 2fc0a50 | 2017-10-05 11:50:24 +0800 | [diff] [blame] | 321 | This driver supports MediaTek MT7622 AUDSYS clocks providing |
| 322 | to audio consumers such as I2S and TDM. |
| 323 | |
Ryder Lee | 3b5e748 | 2018-11-05 16:43:55 +0800 | [diff] [blame] | 324 | config COMMON_CLK_MT7629 |
| 325 | bool "Clock driver for MediaTek MT7629" |
| 326 | depends on (ARCH_MEDIATEK && ARM) || COMPILE_TEST |
| 327 | select COMMON_CLK_MEDIATEK |
| 328 | default ARCH_MEDIATEK && ARM |
Masahiro Yamada | a7f7f62 | 2020-06-14 01:50:22 +0900 | [diff] [blame] | 329 | help |
Ryder Lee | 3b5e748 | 2018-11-05 16:43:55 +0800 | [diff] [blame] | 330 | This driver supports MediaTek MT7629 basic clocks and clocks |
| 331 | required for various periperals found on MediaTek. |
| 332 | |
| 333 | config COMMON_CLK_MT7629_ETHSYS |
| 334 | bool "Clock driver for MediaTek MT7629 ETHSYS" |
| 335 | depends on COMMON_CLK_MT7629 |
Masahiro Yamada | a7f7f62 | 2020-06-14 01:50:22 +0900 | [diff] [blame] | 336 | help |
Ryder Lee | 3b5e748 | 2018-11-05 16:43:55 +0800 | [diff] [blame] | 337 | This driver add support for clocks for Ethernet and SGMII |
| 338 | required on MediaTek MT7629 SoC. |
| 339 | |
| 340 | config COMMON_CLK_MT7629_HIFSYS |
| 341 | bool "Clock driver for MediaTek MT7629 HIFSYS" |
| 342 | depends on COMMON_CLK_MT7629 |
Masahiro Yamada | a7f7f62 | 2020-06-14 01:50:22 +0900 | [diff] [blame] | 343 | help |
Ryder Lee | 3b5e748 | 2018-11-05 16:43:55 +0800 | [diff] [blame] | 344 | This driver supports MediaTek MT7629 HIFSYS clocks providing |
| 345 | to PCI-E and USB. |
| 346 | |
James Liao | 2886c84 | 2016-08-19 13:34:49 +0800 | [diff] [blame] | 347 | config COMMON_CLK_MT8135 |
Sean Wang | 16a1ac1 | 2017-12-20 14:42:58 +0800 | [diff] [blame] | 348 | bool "Clock driver for MediaTek MT8135" |
Jean Delvare | 3d21a4b | 2017-01-24 13:09:12 +0100 | [diff] [blame] | 349 | depends on (ARCH_MEDIATEK && ARM) || COMPILE_TEST |
James Liao | 2886c84 | 2016-08-19 13:34:49 +0800 | [diff] [blame] | 350 | select COMMON_CLK_MEDIATEK |
Jean Delvare | 3d21a4b | 2017-01-24 13:09:12 +0100 | [diff] [blame] | 351 | default ARCH_MEDIATEK && ARM |
Masahiro Yamada | a7f7f62 | 2020-06-14 01:50:22 +0900 | [diff] [blame] | 352 | help |
Sean Wang | 16a1ac1 | 2017-12-20 14:42:58 +0800 | [diff] [blame] | 353 | This driver supports MediaTek MT8135 clocks. |
James Liao | 2886c84 | 2016-08-19 13:34:49 +0800 | [diff] [blame] | 354 | |
| 355 | config COMMON_CLK_MT8173 |
Sean Wang | 16a1ac1 | 2017-12-20 14:42:58 +0800 | [diff] [blame] | 356 | bool "Clock driver for MediaTek MT8173" |
Jean Delvare | 234d511 | 2016-10-14 14:44:13 +0200 | [diff] [blame] | 357 | depends on ARCH_MEDIATEK || COMPILE_TEST |
James Liao | 2886c84 | 2016-08-19 13:34:49 +0800 | [diff] [blame] | 358 | select COMMON_CLK_MEDIATEK |
| 359 | default ARCH_MEDIATEK |
Masahiro Yamada | a7f7f62 | 2020-06-14 01:50:22 +0900 | [diff] [blame] | 360 | help |
Sean Wang | 16a1ac1 | 2017-12-20 14:42:58 +0800 | [diff] [blame] | 361 | This driver supports MediaTek MT8173 clocks. |
Weiyi Lu | acddfc2 | 2019-03-05 13:05:45 +0800 | [diff] [blame] | 362 | |
Matthias Brugger | 1303270 | 2020-03-25 18:31:21 +0100 | [diff] [blame] | 363 | config COMMON_CLK_MT8173_MMSYS |
| 364 | bool "Clock driver for MediaTek MT8173 mmsys" |
| 365 | depends on COMMON_CLK_MT8173 |
| 366 | default COMMON_CLK_MT8173 |
| 367 | help |
| 368 | This driver supports MediaTek MT8173 mmsys clocks. |
| 369 | |
Weiyi Lu | acddfc2 | 2019-03-05 13:05:45 +0800 | [diff] [blame] | 370 | config COMMON_CLK_MT8183 |
| 371 | bool "Clock driver for MediaTek MT8183" |
| 372 | depends on (ARCH_MEDIATEK && ARM64) || COMPILE_TEST |
| 373 | select COMMON_CLK_MEDIATEK |
| 374 | default ARCH_MEDIATEK && ARM64 |
| 375 | help |
| 376 | This driver supports MediaTek MT8183 basic clocks. |
| 377 | |
| 378 | config COMMON_CLK_MT8183_AUDIOSYS |
| 379 | bool "Clock driver for MediaTek MT8183 audiosys" |
| 380 | depends on COMMON_CLK_MT8183 |
| 381 | help |
| 382 | This driver supports MediaTek MT8183 audiosys clocks. |
| 383 | |
| 384 | config COMMON_CLK_MT8183_CAMSYS |
| 385 | bool "Clock driver for MediaTek MT8183 camsys" |
| 386 | depends on COMMON_CLK_MT8183 |
| 387 | help |
| 388 | This driver supports MediaTek MT8183 camsys clocks. |
| 389 | |
| 390 | config COMMON_CLK_MT8183_IMGSYS |
| 391 | bool "Clock driver for MediaTek MT8183 imgsys" |
| 392 | depends on COMMON_CLK_MT8183 |
| 393 | help |
| 394 | This driver supports MediaTek MT8183 imgsys clocks. |
| 395 | |
| 396 | config COMMON_CLK_MT8183_IPU_CORE0 |
| 397 | bool "Clock driver for MediaTek MT8183 ipu_core0" |
| 398 | depends on COMMON_CLK_MT8183 |
| 399 | help |
| 400 | This driver supports MediaTek MT8183 ipu_core0 clocks. |
| 401 | |
| 402 | config COMMON_CLK_MT8183_IPU_CORE1 |
| 403 | bool "Clock driver for MediaTek MT8183 ipu_core1" |
| 404 | depends on COMMON_CLK_MT8183 |
| 405 | help |
| 406 | This driver supports MediaTek MT8183 ipu_core1 clocks. |
| 407 | |
| 408 | config COMMON_CLK_MT8183_IPU_ADL |
| 409 | bool "Clock driver for MediaTek MT8183 ipu_adl" |
| 410 | depends on COMMON_CLK_MT8183 |
| 411 | help |
| 412 | This driver supports MediaTek MT8183 ipu_adl clocks. |
| 413 | |
| 414 | config COMMON_CLK_MT8183_IPU_CONN |
| 415 | bool "Clock driver for MediaTek MT8183 ipu_conn" |
| 416 | depends on COMMON_CLK_MT8183 |
| 417 | help |
| 418 | This driver supports MediaTek MT8183 ipu_conn clocks. |
| 419 | |
| 420 | config COMMON_CLK_MT8183_MFGCFG |
| 421 | bool "Clock driver for MediaTek MT8183 mfgcfg" |
| 422 | depends on COMMON_CLK_MT8183 |
| 423 | help |
| 424 | This driver supports MediaTek MT8183 mfgcfg clocks. |
| 425 | |
| 426 | config COMMON_CLK_MT8183_MMSYS |
| 427 | bool "Clock driver for MediaTek MT8183 mmsys" |
| 428 | depends on COMMON_CLK_MT8183 |
| 429 | help |
| 430 | This driver supports MediaTek MT8183 mmsys clocks. |
| 431 | |
| 432 | config COMMON_CLK_MT8183_VDECSYS |
| 433 | bool "Clock driver for MediaTek MT8183 vdecsys" |
| 434 | depends on COMMON_CLK_MT8183 |
| 435 | help |
| 436 | This driver supports MediaTek MT8183 vdecsys clocks. |
| 437 | |
| 438 | config COMMON_CLK_MT8183_VENCSYS |
| 439 | bool "Clock driver for MediaTek MT8183 vencsys" |
| 440 | depends on COMMON_CLK_MT8183 |
| 441 | help |
| 442 | This driver supports MediaTek MT8183 vencsys clocks. |
| 443 | |
Fabien Parent | db077fe | 2019-03-23 22:16:02 +0100 | [diff] [blame] | 444 | config COMMON_CLK_MT8516 |
| 445 | bool "Clock driver for MediaTek MT8516" |
| 446 | depends on ARCH_MEDIATEK || COMPILE_TEST |
| 447 | select COMMON_CLK_MEDIATEK |
| 448 | default ARCH_MEDIATEK |
| 449 | help |
| 450 | This driver supports MediaTek MT8516 clocks. |
| 451 | |
Fabien Parent | 0fd4939 | 2019-05-02 14:18:43 +0200 | [diff] [blame] | 452 | config COMMON_CLK_MT8516_AUDSYS |
| 453 | bool "Clock driver for MediaTek MT8516 audsys" |
| 454 | depends on COMMON_CLK_MT8516 |
| 455 | help |
| 456 | This driver supports MediaTek MT8516 audsys clocks. |
| 457 | |
Sean Wang | 16a1ac1 | 2017-12-20 14:42:58 +0800 | [diff] [blame] | 458 | endmenu |