Greg Kroah-Hartman | b244131 | 2017-11-01 15:07:57 +0100 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0 |
John Crispin | ae2b5bb | 2013-01-20 22:05:30 +0100 | [diff] [blame] | 2 | if RALINK |
3 | |||||
John Crispin | 1f2acc5 | 2013-08-08 13:08:06 +0200 | [diff] [blame] | 4 | config CLKEVT_RT3352 |
5 | bool | ||||
6 | depends on SOC_RT305X || SOC_MT7620 | ||||
7 | default y | ||||
Daniel Lezcano | bb0eb05 | 2017-05-26 19:34:11 +0200 | [diff] [blame] | 8 | select TIMER_OF |
John Crispin | 1f2acc5 | 2013-08-08 13:08:06 +0200 | [diff] [blame] | 9 | select CLKSRC_MMIO |
10 | |||||
John Crispin | a7b7aad | 2015-02-23 06:17:33 +0100 | [diff] [blame] | 11 | config RALINK_ILL_ACC |
12 | bool | ||||
13 | depends on SOC_RT305X | ||||
14 | default y | ||||
15 | |||||
John Crispin | 2761f83 | 2016-01-04 20:23:54 +0100 | [diff] [blame] | 16 | config IRQ_INTC |
17 | bool | ||||
18 | default y | ||||
John Crispin | 1df7add | 2016-01-04 20:23:55 +0100 | [diff] [blame] | 19 | depends on !SOC_MT7621 |
John Crispin | 2761f83 | 2016-01-04 20:23:54 +0100 | [diff] [blame] | 20 | |
John Crispin | ae2b5bb | 2013-01-20 22:05:30 +0100 | [diff] [blame] | 21 | choice |
22 | prompt "Ralink SoC selection" | ||||
23 | default SOC_RT305X | ||||
24 | help | ||||
25 | Select Ralink MIPS SoC type. | ||||
26 | |||||
John Crispin | 80fb55a | 2013-01-27 09:17:20 +0100 | [diff] [blame] | 27 | config SOC_RT288X |
28 | bool "RT288x" | ||||
Florian Fainelli | 930beb5 | 2014-01-14 09:54:38 -0800 | [diff] [blame] | 29 | select MIPS_L1_CACHE_SHIFT_4 |
Christoph Hellwig | eb01d42 | 2018-11-15 20:05:32 +0100 | [diff] [blame] | 30 | select HAVE_PCI |
John Crispin | 80fb55a | 2013-01-27 09:17:20 +0100 | [diff] [blame] | 31 | |
John Crispin | ae2b5bb | 2013-01-20 22:05:30 +0100 | [diff] [blame] | 32 | config SOC_RT305X |
33 | bool "RT305x" | ||||
John Crispin | ae2b5bb | 2013-01-20 22:05:30 +0100 | [diff] [blame] | 34 | |
John Crispin | 293840b | 2013-01-27 09:39:02 +0100 | [diff] [blame] | 35 | config SOC_RT3883 |
36 | bool "RT3883" | ||||
Christoph Hellwig | eb01d42 | 2018-11-15 20:05:32 +0100 | [diff] [blame] | 37 | select HAVE_PCI |
John Crispin | 293840b | 2013-01-27 09:39:02 +0100 | [diff] [blame] | 38 | |
John Crispin | 594bde6 | 2013-03-21 17:49:02 +0100 | [diff] [blame] | 39 | config SOC_MT7620 |
John Crispin | 53263a1 | 2014-10-08 23:30:24 +0200 | [diff] [blame] | 40 | bool "MT7620/8" |
Stefan Roese | 0b15394 | 2018-12-17 10:47:48 +0100 | [diff] [blame] | 41 | select CPU_MIPSR2_IRQ_VI |
Christoph Hellwig | eb01d42 | 2018-11-15 20:05:32 +0100 | [diff] [blame] | 42 | select HAVE_PCI |
John Crispin | 594bde6 | 2013-03-21 17:49:02 +0100 | [diff] [blame] | 43 | |
John Crispin | 1df7add | 2016-01-04 20:23:55 +0100 | [diff] [blame] | 44 | config SOC_MT7621 |
45 | bool "MT7621" | ||||
46 | select MIPS_CPU_SCACHE | ||||
47 | select SYS_SUPPORTS_MULTITHREADING | ||||
48 | select SYS_SUPPORTS_SMP | ||||
49 | select SYS_SUPPORTS_MIPS_CPS | ||||
John Crispin | 0772471 | 2016-12-20 19:12:45 +0100 | [diff] [blame] | 50 | select SYS_SUPPORTS_HIGHMEM |
John Crispin | 1df7add | 2016-01-04 20:23:55 +0100 | [diff] [blame] | 51 | select MIPS_GIC |
52 | select COMMON_CLK | ||||
53 | select CLKSRC_MIPS_GIC | ||||
Sergio Paracuellos | 3b2fa0c | 2019-10-19 10:12:33 +0200 | [diff] [blame] | 54 | select HAVE_PCI if PCI_MT7621 |
John Crispin | ae2b5bb | 2013-01-20 22:05:30 +0100 | [diff] [blame] | 55 | endchoice |
56 | |||||
57 | choice | ||||
58 | prompt "Devicetree selection" | ||||
59 | default DTB_RT_NONE | ||||
60 | help | ||||
61 | Select the devicetree. | ||||
62 | |||||
63 | config DTB_RT_NONE | ||||
64 | bool "None" | ||||
65 | |||||
John Crispin | d99e19c | 2013-04-12 06:27:37 +0000 | [diff] [blame] | 66 | config DTB_RT2880_EVAL |
67 | bool "RT2880 eval kit" | ||||
68 | depends on SOC_RT288X | ||||
Andrew Bresticker | 011eeec | 2014-08-21 13:04:26 -0700 | [diff] [blame] | 69 | select BUILTIN_DTB |
John Crispin | d99e19c | 2013-04-12 06:27:37 +0000 | [diff] [blame] | 70 | |
John Crispin | ae2b5bb | 2013-01-20 22:05:30 +0100 | [diff] [blame] | 71 | config DTB_RT305X_EVAL |
72 | bool "RT305x eval kit" | ||||
73 | depends on SOC_RT305X | ||||
Andrew Bresticker | 011eeec | 2014-08-21 13:04:26 -0700 | [diff] [blame] | 74 | select BUILTIN_DTB |
John Crispin | ae2b5bb | 2013-01-20 22:05:30 +0100 | [diff] [blame] | 75 | |
John Crispin | 6fbfe90e | 2013-04-12 06:27:39 +0000 | [diff] [blame] | 76 | config DTB_RT3883_EVAL |
77 | bool "RT3883 eval kit" | ||||
78 | depends on SOC_RT3883 | ||||
Andrew Bresticker | 011eeec | 2014-08-21 13:04:26 -0700 | [diff] [blame] | 79 | select BUILTIN_DTB |
John Crispin | 6fbfe90e | 2013-04-12 06:27:39 +0000 | [diff] [blame] | 80 | |
John Crispin | 9d50094 | 2013-04-12 06:27:41 +0000 | [diff] [blame] | 81 | config DTB_MT7620A_EVAL |
82 | bool "MT7620A eval kit" | ||||
83 | depends on SOC_MT7620 | ||||
Andrew Bresticker | 011eeec | 2014-08-21 13:04:26 -0700 | [diff] [blame] | 84 | select BUILTIN_DTB |
John Crispin | 9d50094 | 2013-04-12 06:27:41 +0000 | [diff] [blame] | 85 | |
Harvey Hunt | 323ac96 | 2017-08-21 11:55:30 +0100 | [diff] [blame] | 86 | config DTB_OMEGA2P |
87 | bool "Onion Omega2+" | ||||
88 | depends on SOC_MT7620 | ||||
89 | select BUILTIN_DTB | ||||
90 | |||||
Harvey Hunt | d48faef | 2017-08-21 11:54:46 +0100 | [diff] [blame] | 91 | config DTB_VOCORE2 |
92 | bool "VoCore2" | ||||
93 | depends on SOC_MT7620 | ||||
94 | select BUILTIN_DTB | ||||
95 | |||||
John Crispin | ae2b5bb | 2013-01-20 22:05:30 +0100 | [diff] [blame] | 96 | endchoice |
97 | |||||
98 | endif |