blob: 3a184d13887bed41fe4ba391bb81aecdea16ce07 [file] [log] [blame]
Greg Kroah-Hartmanb2441312017-11-01 15:07:57 +01001// SPDX-License-Identifier: GPL-2.0
Shawn Guo3143bbb2012-07-07 23:12:03 +08002/dts-v1/;
Lothar Waßmannbc3875f2013-09-19 08:59:48 +02003#include "imx28.dtsi"
Shawn Guo3143bbb2012-07-07 23:12:03 +08004
5/ {
6 model = "Bluegiga APX4 Development Kit";
7 compatible = "bluegiga,apx4devkit", "fsl,imx28";
8
Marco Franchiad00e082018-01-24 11:22:14 -02009 memory@40000000 {
Fabio Estevam32018d12018-11-26 10:08:56 -020010 device_type = "memory";
Shawn Guo3143bbb2012-07-07 23:12:03 +080011 reg = <0x40000000 0x04000000>;
12 };
13
14 apb@80000000 {
15 apbh@80000000 {
Lauri Hintsala3317d992012-07-10 10:08:07 +030016 gpmi-nand@8000c000 {
17 pinctrl-names = "default";
18 pinctrl-0 = <&gpmi_pins_a &gpmi_status_cfg>;
19 status = "okay";
20 };
21
Rob Herring5a2ecf02018-09-13 13:12:29 -050022 ssp0: spi@80010000 {
Shawn Guo3143bbb2012-07-07 23:12:03 +080023 compatible = "fsl,imx28-mmc";
24 pinctrl-names = "default";
Lauri Hintsala1eb73ca2012-07-10 10:08:09 +030025 pinctrl-0 = <&mmc0_4bit_pins_a &mmc0_sck_cfg>;
26 bus-width = <4>;
Shawn Guo3143bbb2012-07-07 23:12:03 +080027 status = "okay";
28 };
29
Rob Herring5a2ecf02018-09-13 13:12:29 -050030 ssp2: spi@80014000 {
Lauri Hintsala557763b2012-07-10 10:08:10 +030031 compatible = "fsl,imx28-mmc";
32 pinctrl-names = "default";
33 pinctrl-0 = <&mmc2_4bit_pins_apx4 &mmc2_sck_cfg_apx4>;
34 bus-width = <4>;
35 status = "okay";
36 };
37
Shawn Guo3143bbb2012-07-07 23:12:03 +080038 pinctrl@80018000 {
39 pinctrl-names = "default";
40 pinctrl-0 = <&hog_pins_a>;
41
Fabio Estevame0e35b42012-08-22 13:25:31 -030042 hog_pins_a: hog@0 {
Shawn Guo3143bbb2012-07-07 23:12:03 +080043 reg = <0>;
44 fsl,pinmux-ids = <
Lothar Waßmannbc3875f2013-09-19 08:59:48 +020045 MX28_PAD_GPMI_CE1N__GPIO_0_17
46 MX28_PAD_GPMI_RDY1__GPIO_0_21
47 MX28_PAD_SSP2_MISO__GPIO_2_18
48 MX28_PAD_SSP2_SS0__AUART3_TX /* was: 0x2131 - MX28_PAD_SSP2_SS0__GPIO_2_19 */
49 MX28_PAD_PWM3__GPIO_3_28
50 MX28_PAD_LCD_RESET__GPIO_3_30
51 MX28_PAD_JTAG_RTCK__GPIO_4_20
Shawn Guo3143bbb2012-07-07 23:12:03 +080052 >;
Lothar Waßmann4191c342013-09-22 14:02:59 +080053 fsl,drive-strength = <MXS_DRIVE_4mA>;
54 fsl,voltage = <MXS_VOLTAGE_HIGH>;
55 fsl,pull-up = <MXS_PULL_DISABLE>;
Shawn Guo3143bbb2012-07-07 23:12:03 +080056 };
Lauri Hintsalad8bb8232012-07-10 10:08:08 +030057
58 lcdif_pins_apx4: lcdif-apx4@0 {
59 reg = <0>;
60 fsl,pinmux-ids = <
Lothar Waßmannbc3875f2013-09-19 08:59:48 +020061 MX28_PAD_LCD_RD_E__LCD_VSYNC
62 MX28_PAD_LCD_WR_RWN__LCD_HSYNC
63 MX28_PAD_LCD_RS__LCD_DOTCLK
64 MX28_PAD_LCD_CS__LCD_ENABLE
Lauri Hintsalad8bb8232012-07-10 10:08:08 +030065 >;
Lothar Waßmann4191c342013-09-22 14:02:59 +080066 fsl,drive-strength = <MXS_DRIVE_4mA>;
67 fsl,voltage = <MXS_VOLTAGE_HIGH>;
68 fsl,pull-up = <MXS_PULL_DISABLE>;
Lauri Hintsalad8bb8232012-07-10 10:08:08 +030069 };
Lauri Hintsala557763b2012-07-10 10:08:10 +030070
71 mmc2_4bit_pins_apx4: mmc2-4bit-apx4@0 {
72 reg = <0>;
73 fsl,pinmux-ids = <
Lothar Waßmannbc3875f2013-09-19 08:59:48 +020074 MX28_PAD_SSP0_DATA4__SSP2_D0
75 MX28_PAD_SSP0_DATA5__SSP2_D3
76 MX28_PAD_SSP0_DATA6__SSP2_CMD
77 MX28_PAD_SSP0_DATA7__SSP2_SCK
78 MX28_PAD_SSP2_SS1__SSP2_D1
79 MX28_PAD_SSP2_SS2__SSP2_D2
Lauri Hintsala557763b2012-07-10 10:08:10 +030080 >;
Lothar Waßmann4191c342013-09-22 14:02:59 +080081 fsl,drive-strength = <MXS_DRIVE_8mA>;
82 fsl,voltage = <MXS_VOLTAGE_HIGH>;
83 fsl,pull-up = <MXS_PULL_ENABLE>;
Lauri Hintsala557763b2012-07-10 10:08:10 +030084 };
85
Fabio Estevam50224272017-12-27 12:04:37 -020086 mmc2_sck_cfg_apx4: mmc2-sck-cfg-apx4@0 {
87 reg = <0>;
Lauri Hintsala557763b2012-07-10 10:08:10 +030088 fsl,pinmux-ids = <
Lothar Waßmannbc3875f2013-09-19 08:59:48 +020089 MX28_PAD_SSP0_DATA7__SSP2_SCK
Lauri Hintsala557763b2012-07-10 10:08:10 +030090 >;
Lothar Waßmann4191c342013-09-22 14:02:59 +080091 fsl,drive-strength = <MXS_DRIVE_12mA>;
92 fsl,pull-up = <MXS_PULL_DISABLE>;
Lauri Hintsala557763b2012-07-10 10:08:10 +030093 };
Lauri Hintsalad8bb8232012-07-10 10:08:08 +030094 };
95
96 lcdif@80030000 {
97 pinctrl-names = "default";
98 pinctrl-0 = <&lcdif_24bit_pins_a
99 &lcdif_pins_apx4>;
Fabio Estevamd46c2dc2014-09-04 22:31:18 -0300100 display = <&display0>;
Lauri Hintsalad8bb8232012-07-10 10:08:08 +0300101 status = "okay";
Shawn Guo0d9f8212013-03-14 11:37:15 +0800102
Fabio Estevamd46c2dc2014-09-04 22:31:18 -0300103 display0: display0 {
Shawn Guo0d9f8212013-03-14 11:37:15 +0800104 bits-per-pixel = <32>;
105 bus-width = <24>;
106
107 display-timings {
108 native-mode = <&timing0>;
109 timing0: timing0 {
110 clock-frequency = <30000000>;
111 hactive = <800>;
112 vactive = <480>;
113 hback-porch = <88>;
114 hfront-porch = <40>;
115 vback-porch = <32>;
116 vfront-porch = <13>;
117 hsync-len = <48>;
118 vsync-len = <3>;
119 hsync-active = <1>;
120 vsync-active = <1>;
121 de-active = <1>;
122 pixelclk-active = <0>;
123 };
124 };
125 };
Shawn Guo3143bbb2012-07-07 23:12:03 +0800126 };
127 };
128
129 apbx@80040000 {
130 saif0: saif@80042000 {
131 pinctrl-names = "default";
132 pinctrl-0 = <&saif0_pins_a>;
133 status = "okay";
134 };
135
136 saif1: saif@80046000 {
137 pinctrl-names = "default";
138 pinctrl-0 = <&saif1_pins_a>;
139 fsl,saif-master = <&saif0>;
140 status = "okay";
141 };
142
143 i2c0: i2c@80058000 {
144 pinctrl-names = "default";
145 pinctrl-0 = <&i2c0_pins_a>;
146 status = "okay";
147
Rob Herring8dccafa2017-10-13 12:54:51 -0500148 sgtl5000: codec@a {
Shawn Guo3143bbb2012-07-07 23:12:03 +0800149 compatible = "fsl,sgtl5000";
150 reg = <0x0a>;
Rob Herringb08d2fb2018-03-01 14:25:33 -0600151 #sound-dai-cells = <0>;
Shawn Guo3143bbb2012-07-07 23:12:03 +0800152 VDDA-supply = <&reg_3p3v>;
153 VDDIO-supply = <&reg_3p3v>;
Shawn Guo66acaf32013-07-01 15:46:05 +0800154 clocks = <&saif0>;
Shawn Guo3143bbb2012-07-07 23:12:03 +0800155 };
156
157 pcf8563: rtc@51 {
158 compatible = "phg,pcf8563";
159 reg = <0x51>;
160 };
161 };
162
163 duart: serial@80074000 {
164 pinctrl-names = "default";
165 pinctrl-0 = <&duart_pins_a>;
166 status = "okay";
167 };
168
169 auart0: serial@8006a000 {
170 pinctrl-names = "default";
171 pinctrl-0 = <&auart0_pins_a>;
172 status = "okay";
173 };
174
175 auart1: serial@8006c000 {
176 pinctrl-names = "default";
177 pinctrl-0 = <&auart1_2pins_a>;
178 status = "okay";
179 };
180
181 auart2: serial@8006e000 {
182 pinctrl-names = "default";
183 pinctrl-0 = <&auart2_2pins_a>;
184 status = "okay";
185 };
Shawn Guo3143bbb2012-07-07 23:12:03 +0800186 };
187 };
188
189 ahb@80080000 {
190 mac0: ethernet@800f0000 {
191 phy-mode = "rmii";
192 pinctrl-names = "default";
193 pinctrl-0 = <&mac0_pins_a>;
194 status = "okay";
195 };
196 };
197
198 regulators {
199 compatible = "simple-bus";
Shawn Guo352d3182014-02-07 23:18:30 +0800200 #address-cells = <1>;
201 #size-cells = <0>;
Shawn Guo3143bbb2012-07-07 23:12:03 +0800202
Shawn Guo352d3182014-02-07 23:18:30 +0800203 reg_3p3v: regulator@0 {
Shawn Guo3143bbb2012-07-07 23:12:03 +0800204 compatible = "regulator-fixed";
Shawn Guo352d3182014-02-07 23:18:30 +0800205 reg = <0>;
Shawn Guo3143bbb2012-07-07 23:12:03 +0800206 regulator-name = "3P3V";
207 regulator-min-microvolt = <3300000>;
208 regulator-max-microvolt = <3300000>;
209 regulator-always-on;
210 };
211 };
212
213 sound {
214 compatible = "bluegiga,apx4devkit-sgtl5000",
215 "fsl,mxs-audio-sgtl5000";
216 model = "apx4devkit-sgtl5000";
217 saif-controllers = <&saif0 &saif1>;
218 audio-codec = <&sgtl5000>;
219 };
220
221 leds {
222 compatible = "gpio-leds";
223
224 user {
225 label = "Heartbeat";
226 gpios = <&gpio3 28 0>;
227 linux,default-trigger = "heartbeat";
228 };
229 };
230};