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Catalin Marinasc1cc1552012-03-05 11:49:27 +00001/*
2 * Based on arch/arm/mm/mmu.c
3 *
4 * Copyright (C) 1995-2005 Russell King
5 * Copyright (C) 2012 ARM Ltd.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
Jisheng Zhang5a9e3e12016-08-15 14:45:46 +080020#include <linux/cache.h>
Catalin Marinasc1cc1552012-03-05 11:49:27 +000021#include <linux/export.h>
22#include <linux/kernel.h>
23#include <linux/errno.h>
24#include <linux/init.h>
Takahiro Akashi98d2e152017-04-03 11:24:34 +090025#include <linux/ioport.h>
26#include <linux/kexec.h>
Ard Biesheuvel61bd93c2015-06-01 13:40:32 +020027#include <linux/libfdt.h>
Catalin Marinasc1cc1552012-03-05 11:49:27 +000028#include <linux/mman.h>
29#include <linux/nodemask.h>
30#include <linux/memblock.h>
31#include <linux/fs.h>
Catalin Marinas2475ff92012-10-23 14:55:08 +010032#include <linux/io.h>
Laura Abbott2077be62017-01-10 13:35:49 -080033#include <linux/mm.h>
Tobias Klauser6efd8492017-05-15 13:40:20 +020034#include <linux/vmalloc.h>
Catalin Marinasc1cc1552012-03-05 11:49:27 +000035
Mark Rutland21ab99c2016-01-25 11:44:56 +000036#include <asm/barrier.h>
Catalin Marinasc1cc1552012-03-05 11:49:27 +000037#include <asm/cputype.h>
Laura Abbottaf86e592014-11-21 21:50:42 +000038#include <asm/fixmap.h>
Mark Rutland068a17a2016-01-25 11:45:12 +000039#include <asm/kasan.h>
Suzuki K. Pouloseb433dce2015-10-19 14:19:28 +010040#include <asm/kernel-pgtable.h>
Catalin Marinasc1cc1552012-03-05 11:49:27 +000041#include <asm/sections.h>
42#include <asm/setup.h>
43#include <asm/sizes.h>
44#include <asm/tlb.h>
Jungseok Leec79b954b2014-05-12 18:40:51 +090045#include <asm/memblock.h>
Catalin Marinasc1cc1552012-03-05 11:49:27 +000046#include <asm/mmu_context.h>
Laura Abbott1404d6f2016-10-27 09:27:34 -070047#include <asm/ptdump.h>
Chintan Pandyaec28bb92018-06-06 12:31:21 +053048#include <asm/tlbflush.h>
Catalin Marinasc1cc1552012-03-05 11:49:27 +000049
Ard Biesheuvelc0951362017-03-09 21:52:07 +010050#define NO_BLOCK_MAPPINGS BIT(0)
Ard Biesheuveld27cfa12017-03-09 21:52:09 +010051#define NO_CONT_MAPPINGS BIT(1)
Ard Biesheuvelc0951362017-03-09 21:52:07 +010052
Ard Biesheuveldd006da2015-03-19 16:42:27 +000053u64 idmap_t0sz = TCR_T0SZ(VA_BITS);
Kristina Martsenkofa2a8442017-12-13 17:07:24 +000054u64 idmap_ptrs_per_pgd = PTRS_PER_PGD;
Ard Biesheuveldd006da2015-03-19 16:42:27 +000055
Jisheng Zhang5a9e3e12016-08-15 14:45:46 +080056u64 kimage_voffset __ro_after_init;
Ard Biesheuvela7f8de12016-02-16 13:52:42 +010057EXPORT_SYMBOL(kimage_voffset);
58
Catalin Marinasc1cc1552012-03-05 11:49:27 +000059/*
60 * Empty_zero_page is a special page that is used for zero-initialized data
61 * and COW.
62 */
Mark Rutland5227cfa2016-01-25 11:44:57 +000063unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)] __page_aligned_bss;
Catalin Marinasc1cc1552012-03-05 11:49:27 +000064EXPORT_SYMBOL(empty_zero_page);
65
Ard Biesheuvelf9040772016-02-16 13:52:40 +010066static pte_t bm_pte[PTRS_PER_PTE] __page_aligned_bss;
67static pmd_t bm_pmd[PTRS_PER_PMD] __page_aligned_bss __maybe_unused;
68static pud_t bm_pud[PTRS_PER_PUD] __page_aligned_bss __maybe_unused;
69
Jun Yao2330b7c2018-09-24 17:15:02 +010070static DEFINE_SPINLOCK(swapper_pgdir_lock);
71
72void set_swapper_pgd(pgd_t *pgdp, pgd_t pgd)
73{
74 pgd_t *fixmap_pgdp;
75
76 spin_lock(&swapper_pgdir_lock);
James Morse26a6f872018-10-10 15:43:22 +010077 fixmap_pgdp = pgd_set_fixmap(__pa_symbol(pgdp));
Jun Yao2330b7c2018-09-24 17:15:02 +010078 WRITE_ONCE(*fixmap_pgdp, pgd);
79 /*
80 * We need dsb(ishst) here to ensure the page-table-walker sees
81 * our new entry before set_p?d() returns. The fixmap's
82 * flush_tlb_kernel_range() via clear_fixmap() does this for us.
83 */
84 pgd_clear_fixmap();
85 spin_unlock(&swapper_pgdir_lock);
86}
87
Catalin Marinasc1cc1552012-03-05 11:49:27 +000088pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
89 unsigned long size, pgprot_t vma_prot)
90{
91 if (!pfn_valid(pfn))
92 return pgprot_noncached(vma_prot);
93 else if (file->f_flags & O_SYNC)
94 return pgprot_writecombine(vma_prot);
95 return vma_prot;
96}
97EXPORT_SYMBOL(phys_mem_access_prot);
98
Mark Rutlandf4710442016-01-25 11:45:08 +000099static phys_addr_t __init early_pgtable_alloc(void)
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000100{
Suzuki K. Poulose71423922015-11-20 17:45:40 +0000101 phys_addr_t phys;
102 void *ptr;
103
Mike Rapoport9a8dd702018-10-30 15:07:59 -0700104 phys = memblock_phys_alloc(PAGE_SIZE, PAGE_SIZE);
Mark Rutlandf4710442016-01-25 11:45:08 +0000105
106 /*
107 * The FIX_{PGD,PUD,PMD} slots may be in active use, but the FIX_PTE
108 * slot will be free, so we can (ab)use the FIX_PTE slot to initialise
109 * any level of table.
110 */
111 ptr = pte_set_fixmap(phys);
112
Mark Rutland21ab99c2016-01-25 11:44:56 +0000113 memset(ptr, 0, PAGE_SIZE);
114
Mark Rutlandf4710442016-01-25 11:45:08 +0000115 /*
116 * Implicit barriers also ensure the zeroed page is visible to the page
117 * table walker
118 */
119 pte_clear_fixmap();
120
121 return phys;
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000122}
123
Ard Biesheuvele98216b2016-10-21 12:22:56 +0100124static bool pgattr_change_is_safe(u64 old, u64 new)
125{
126 /*
127 * The following mapping attributes may be updated in live
128 * kernel mappings without the need for break-before-make.
129 */
Ard Biesheuvel753e8ab2018-02-23 18:04:48 +0000130 static const pteval_t mask = PTE_PXN | PTE_RDONLY | PTE_WRITE | PTE_NG;
Ard Biesheuvele98216b2016-10-21 12:22:56 +0100131
Ard Biesheuvel141d1492017-03-09 21:52:06 +0100132 /* creating or taking down mappings is always safe */
133 if (old == 0 || new == 0)
134 return true;
135
136 /* live contiguous mappings may not be manipulated at all */
137 if ((old | new) & PTE_CONT)
138 return false;
139
Ard Biesheuvel753e8ab2018-02-23 18:04:48 +0000140 /* Transitioning from Non-Global to Global is unsafe */
141 if (old & ~new & PTE_NG)
142 return false;
Will Deacon4e602052018-01-29 11:59:54 +0000143
Ard Biesheuvel141d1492017-03-09 21:52:06 +0100144 return ((old ^ new) & ~mask) == 0;
Ard Biesheuvele98216b2016-10-21 12:22:56 +0100145}
146
Will Deacon20a004e2018-02-15 11:14:56 +0000147static void init_pte(pmd_t *pmdp, unsigned long addr, unsigned long end,
Ard Biesheuveld27cfa12017-03-09 21:52:09 +0100148 phys_addr_t phys, pgprot_t prot)
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000149{
Will Deacon20a004e2018-02-15 11:14:56 +0000150 pte_t *ptep;
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000151
Will Deacon20a004e2018-02-15 11:14:56 +0000152 ptep = pte_set_fixmap_offset(pmdp, addr);
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000153 do {
Will Deacon20a004e2018-02-15 11:14:56 +0000154 pte_t old_pte = READ_ONCE(*ptep);
Ard Biesheuvele98216b2016-10-21 12:22:56 +0100155
Will Deacon20a004e2018-02-15 11:14:56 +0000156 set_pte(ptep, pfn_pte(__phys_to_pfn(phys), prot));
Ard Biesheuvele98216b2016-10-21 12:22:56 +0100157
158 /*
159 * After the PTE entry has been populated once, we
160 * only allow updates to the permission attributes.
161 */
Will Deacon20a004e2018-02-15 11:14:56 +0000162 BUG_ON(!pgattr_change_is_safe(pte_val(old_pte),
163 READ_ONCE(pte_val(*ptep))));
Ard Biesheuvele98216b2016-10-21 12:22:56 +0100164
Ard Biesheuvele393cf42017-03-09 21:52:04 +0100165 phys += PAGE_SIZE;
Will Deacon20a004e2018-02-15 11:14:56 +0000166 } while (ptep++, addr += PAGE_SIZE, addr != end);
Mark Rutlandf4710442016-01-25 11:45:08 +0000167
168 pte_clear_fixmap();
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000169}
170
Will Deacon20a004e2018-02-15 11:14:56 +0000171static void alloc_init_cont_pte(pmd_t *pmdp, unsigned long addr,
Ard Biesheuveld27cfa12017-03-09 21:52:09 +0100172 unsigned long end, phys_addr_t phys,
173 pgprot_t prot,
174 phys_addr_t (*pgtable_alloc)(void),
175 int flags)
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000176{
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000177 unsigned long next;
Will Deacon20a004e2018-02-15 11:14:56 +0000178 pmd_t pmd = READ_ONCE(*pmdp);
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000179
Will Deacon20a004e2018-02-15 11:14:56 +0000180 BUG_ON(pmd_sect(pmd));
181 if (pmd_none(pmd)) {
Ard Biesheuveld27cfa12017-03-09 21:52:09 +0100182 phys_addr_t pte_phys;
Laura Abbott132233a2016-02-05 16:24:46 -0800183 BUG_ON(!pgtable_alloc);
Ard Biesheuveld27cfa12017-03-09 21:52:09 +0100184 pte_phys = pgtable_alloc();
Will Deacon20a004e2018-02-15 11:14:56 +0000185 __pmd_populate(pmdp, pte_phys, PMD_TYPE_TABLE);
186 pmd = READ_ONCE(*pmdp);
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000187 }
Will Deacon20a004e2018-02-15 11:14:56 +0000188 BUG_ON(pmd_bad(pmd));
Ard Biesheuveld27cfa12017-03-09 21:52:09 +0100189
190 do {
191 pgprot_t __prot = prot;
192
193 next = pte_cont_addr_end(addr, end);
194
195 /* use a contiguous mapping if the range is suitably aligned */
196 if ((((addr | next | phys) & ~CONT_PTE_MASK) == 0) &&
197 (flags & NO_CONT_MAPPINGS) == 0)
198 __prot = __pgprot(pgprot_val(prot) | PTE_CONT);
199
Will Deacon20a004e2018-02-15 11:14:56 +0000200 init_pte(pmdp, addr, next, phys, __prot);
Ard Biesheuveld27cfa12017-03-09 21:52:09 +0100201
202 phys += next - addr;
203 } while (addr = next, addr != end);
204}
205
Will Deacon20a004e2018-02-15 11:14:56 +0000206static void init_pmd(pud_t *pudp, unsigned long addr, unsigned long end,
Ard Biesheuveld27cfa12017-03-09 21:52:09 +0100207 phys_addr_t phys, pgprot_t prot,
208 phys_addr_t (*pgtable_alloc)(void), int flags)
209{
210 unsigned long next;
Will Deacon20a004e2018-02-15 11:14:56 +0000211 pmd_t *pmdp;
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000212
Will Deacon20a004e2018-02-15 11:14:56 +0000213 pmdp = pmd_set_fixmap_offset(pudp, addr);
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000214 do {
Will Deacon20a004e2018-02-15 11:14:56 +0000215 pmd_t old_pmd = READ_ONCE(*pmdp);
Ard Biesheuvele98216b2016-10-21 12:22:56 +0100216
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000217 next = pmd_addr_end(addr, end);
Ard Biesheuvele98216b2016-10-21 12:22:56 +0100218
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000219 /* try section mapping first */
Laura Abbott83863f22016-02-05 16:24:47 -0800220 if (((addr | next | phys) & ~SECTION_MASK) == 0 &&
Ard Biesheuvelc0951362017-03-09 21:52:07 +0100221 (flags & NO_BLOCK_MAPPINGS) == 0) {
Will Deacon20a004e2018-02-15 11:14:56 +0000222 pmd_set_huge(pmdp, phys, prot);
Ard Biesheuvele98216b2016-10-21 12:22:56 +0100223
Catalin Marinasa55f9922014-02-04 16:01:31 +0000224 /*
Ard Biesheuvele98216b2016-10-21 12:22:56 +0100225 * After the PMD entry has been populated once, we
226 * only allow updates to the permission attributes.
Catalin Marinasa55f9922014-02-04 16:01:31 +0000227 */
Ard Biesheuvele98216b2016-10-21 12:22:56 +0100228 BUG_ON(!pgattr_change_is_safe(pmd_val(old_pmd),
Will Deacon20a004e2018-02-15 11:14:56 +0000229 READ_ONCE(pmd_val(*pmdp))));
Catalin Marinasa55f9922014-02-04 16:01:31 +0000230 } else {
Will Deacon20a004e2018-02-15 11:14:56 +0000231 alloc_init_cont_pte(pmdp, addr, next, phys, prot,
Ard Biesheuveld27cfa12017-03-09 21:52:09 +0100232 pgtable_alloc, flags);
Ard Biesheuvele98216b2016-10-21 12:22:56 +0100233
234 BUG_ON(pmd_val(old_pmd) != 0 &&
Will Deacon20a004e2018-02-15 11:14:56 +0000235 pmd_val(old_pmd) != READ_ONCE(pmd_val(*pmdp)));
Catalin Marinasa55f9922014-02-04 16:01:31 +0000236 }
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000237 phys += next - addr;
Will Deacon20a004e2018-02-15 11:14:56 +0000238 } while (pmdp++, addr = next, addr != end);
Mark Rutlandf4710442016-01-25 11:45:08 +0000239
240 pmd_clear_fixmap();
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000241}
242
Will Deacon20a004e2018-02-15 11:14:56 +0000243static void alloc_init_cont_pmd(pud_t *pudp, unsigned long addr,
Ard Biesheuveld27cfa12017-03-09 21:52:09 +0100244 unsigned long end, phys_addr_t phys,
245 pgprot_t prot,
246 phys_addr_t (*pgtable_alloc)(void), int flags)
247{
248 unsigned long next;
Will Deacon20a004e2018-02-15 11:14:56 +0000249 pud_t pud = READ_ONCE(*pudp);
Ard Biesheuveld27cfa12017-03-09 21:52:09 +0100250
251 /*
252 * Check for initial section mappings in the pgd/pud.
253 */
Will Deacon20a004e2018-02-15 11:14:56 +0000254 BUG_ON(pud_sect(pud));
255 if (pud_none(pud)) {
Ard Biesheuveld27cfa12017-03-09 21:52:09 +0100256 phys_addr_t pmd_phys;
257 BUG_ON(!pgtable_alloc);
258 pmd_phys = pgtable_alloc();
Will Deacon20a004e2018-02-15 11:14:56 +0000259 __pud_populate(pudp, pmd_phys, PUD_TYPE_TABLE);
260 pud = READ_ONCE(*pudp);
Ard Biesheuveld27cfa12017-03-09 21:52:09 +0100261 }
Will Deacon20a004e2018-02-15 11:14:56 +0000262 BUG_ON(pud_bad(pud));
Ard Biesheuveld27cfa12017-03-09 21:52:09 +0100263
264 do {
265 pgprot_t __prot = prot;
266
267 next = pmd_cont_addr_end(addr, end);
268
269 /* use a contiguous mapping if the range is suitably aligned */
270 if ((((addr | next | phys) & ~CONT_PMD_MASK) == 0) &&
271 (flags & NO_CONT_MAPPINGS) == 0)
272 __prot = __pgprot(pgprot_val(prot) | PTE_CONT);
273
Will Deacon20a004e2018-02-15 11:14:56 +0000274 init_pmd(pudp, addr, next, phys, __prot, pgtable_alloc, flags);
Ard Biesheuveld27cfa12017-03-09 21:52:09 +0100275
276 phys += next - addr;
277 } while (addr = next, addr != end);
278}
279
Laura Abbottda141702015-01-21 17:36:06 -0800280static inline bool use_1G_block(unsigned long addr, unsigned long next,
281 unsigned long phys)
282{
283 if (PAGE_SHIFT != 12)
284 return false;
285
286 if (((addr | next | phys) & ~PUD_MASK) != 0)
287 return false;
288
289 return true;
290}
291
Will Deacon20a004e2018-02-15 11:14:56 +0000292static void alloc_init_pud(pgd_t *pgdp, unsigned long addr, unsigned long end,
293 phys_addr_t phys, pgprot_t prot,
294 phys_addr_t (*pgtable_alloc)(void),
295 int flags)
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000296{
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000297 unsigned long next;
Will Deacon20a004e2018-02-15 11:14:56 +0000298 pud_t *pudp;
299 pgd_t pgd = READ_ONCE(*pgdp);
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000300
Will Deacon20a004e2018-02-15 11:14:56 +0000301 if (pgd_none(pgd)) {
Laura Abbott132233a2016-02-05 16:24:46 -0800302 phys_addr_t pud_phys;
303 BUG_ON(!pgtable_alloc);
304 pud_phys = pgtable_alloc();
Will Deacon20a004e2018-02-15 11:14:56 +0000305 __pgd_populate(pgdp, pud_phys, PUD_TYPE_TABLE);
306 pgd = READ_ONCE(*pgdp);
Jungseok Leec79b954b2014-05-12 18:40:51 +0900307 }
Will Deacon20a004e2018-02-15 11:14:56 +0000308 BUG_ON(pgd_bad(pgd));
Jungseok Leec79b954b2014-05-12 18:40:51 +0900309
Will Deacon20a004e2018-02-15 11:14:56 +0000310 pudp = pud_set_fixmap_offset(pgdp, addr);
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000311 do {
Will Deacon20a004e2018-02-15 11:14:56 +0000312 pud_t old_pud = READ_ONCE(*pudp);
Ard Biesheuvele98216b2016-10-21 12:22:56 +0100313
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000314 next = pud_addr_end(addr, end);
Steve Capper206a2a72014-05-06 14:02:27 +0100315
316 /*
317 * For 4K granule only, attempt to put down a 1GB block
318 */
Ard Biesheuvelc0951362017-03-09 21:52:07 +0100319 if (use_1G_block(addr, next, phys) &&
320 (flags & NO_BLOCK_MAPPINGS) == 0) {
Will Deacon20a004e2018-02-15 11:14:56 +0000321 pud_set_huge(pudp, phys, prot);
Steve Capper206a2a72014-05-06 14:02:27 +0100322
323 /*
Ard Biesheuvele98216b2016-10-21 12:22:56 +0100324 * After the PUD entry has been populated once, we
325 * only allow updates to the permission attributes.
Steve Capper206a2a72014-05-06 14:02:27 +0100326 */
Ard Biesheuvele98216b2016-10-21 12:22:56 +0100327 BUG_ON(!pgattr_change_is_safe(pud_val(old_pud),
Will Deacon20a004e2018-02-15 11:14:56 +0000328 READ_ONCE(pud_val(*pudp))));
Steve Capper206a2a72014-05-06 14:02:27 +0100329 } else {
Will Deacon20a004e2018-02-15 11:14:56 +0000330 alloc_init_cont_pmd(pudp, addr, next, phys, prot,
Ard Biesheuveld27cfa12017-03-09 21:52:09 +0100331 pgtable_alloc, flags);
Ard Biesheuvele98216b2016-10-21 12:22:56 +0100332
333 BUG_ON(pud_val(old_pud) != 0 &&
Will Deacon20a004e2018-02-15 11:14:56 +0000334 pud_val(old_pud) != READ_ONCE(pud_val(*pudp)));
Steve Capper206a2a72014-05-06 14:02:27 +0100335 }
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000336 phys += next - addr;
Will Deacon20a004e2018-02-15 11:14:56 +0000337 } while (pudp++, addr = next, addr != end);
Mark Rutlandf4710442016-01-25 11:45:08 +0000338
339 pud_clear_fixmap();
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000340}
341
Ard Biesheuvel40f87d32016-06-29 14:51:30 +0200342static void __create_pgd_mapping(pgd_t *pgdir, phys_addr_t phys,
343 unsigned long virt, phys_addr_t size,
344 pgprot_t prot,
345 phys_addr_t (*pgtable_alloc)(void),
Ard Biesheuvelc0951362017-03-09 21:52:07 +0100346 int flags)
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000347{
348 unsigned long addr, length, end, next;
Will Deacon20a004e2018-02-15 11:14:56 +0000349 pgd_t *pgdp = pgd_offset_raw(pgdir, virt);
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000350
Mark Rutlandcc5d2b32015-11-23 13:26:19 +0000351 /*
352 * If the virtual and physical address don't have the same offset
353 * within a page, we cannot map the region as the caller expects.
354 */
355 if (WARN_ON((phys ^ virt) & ~PAGE_MASK))
356 return;
357
Mark Rutland9c4e08a2015-11-23 13:26:20 +0000358 phys &= PAGE_MASK;
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000359 addr = virt & PAGE_MASK;
360 length = PAGE_ALIGN(size + (virt & ~PAGE_MASK));
361
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000362 end = addr + length;
363 do {
364 next = pgd_addr_end(addr, end);
Will Deacon20a004e2018-02-15 11:14:56 +0000365 alloc_init_pud(pgdp, addr, next, phys, prot, pgtable_alloc,
Ard Biesheuvelc0951362017-03-09 21:52:07 +0100366 flags);
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000367 phys += next - addr;
Will Deacon20a004e2018-02-15 11:14:56 +0000368 } while (pgdp++, addr = next, addr != end);
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000369}
370
Ard Biesheuvel1378dc32016-07-22 19:32:25 +0200371static phys_addr_t pgd_pgtable_alloc(void)
Laura Abbottda141702015-01-21 17:36:06 -0800372{
Mark Rutland21ab99c2016-01-25 11:44:56 +0000373 void *ptr = (void *)__get_free_page(PGALLOC_GFP);
Ard Biesheuvel1378dc32016-07-22 19:32:25 +0200374 if (!ptr || !pgtable_page_ctor(virt_to_page(ptr)))
375 BUG();
Mark Rutland21ab99c2016-01-25 11:44:56 +0000376
377 /* Ensure the zeroed page is visible to the page table walker */
378 dsb(ishst);
Mark Rutlandf4710442016-01-25 11:45:08 +0000379 return __pa(ptr);
Laura Abbottda141702015-01-21 17:36:06 -0800380}
381
Laura Abbott132233a2016-02-05 16:24:46 -0800382/*
383 * This function can only be used to modify existing table entries,
384 * without allocating new levels of table. Note that this permits the
385 * creation of new section or page entries.
386 */
387static void __init create_mapping_noalloc(phys_addr_t phys, unsigned long virt,
Laura Abbottda141702015-01-21 17:36:06 -0800388 phys_addr_t size, pgprot_t prot)
Mark Salterd7ecbdd2014-03-12 12:28:06 -0400389{
390 if (virt < VMALLOC_START) {
391 pr_warn("BUG: not creating mapping for %pa at 0x%016lx - outside kernel range\n",
392 &phys, virt);
393 return;
394 }
Ard Biesheuveld27cfa12017-03-09 21:52:09 +0100395 __create_pgd_mapping(init_mm.pgd, phys, virt, size, prot, NULL,
396 NO_CONT_MAPPINGS);
Mark Salterd7ecbdd2014-03-12 12:28:06 -0400397}
398
Ard Biesheuvel8ce837c2014-10-20 15:42:07 +0200399void __init create_pgd_mapping(struct mm_struct *mm, phys_addr_t phys,
400 unsigned long virt, phys_addr_t size,
Ard Biesheuvelf14c66c2016-10-21 12:22:57 +0100401 pgprot_t prot, bool page_mappings_only)
Ard Biesheuvel8ce837c2014-10-20 15:42:07 +0200402{
Ard Biesheuvelc0951362017-03-09 21:52:07 +0100403 int flags = 0;
404
Ard Biesheuvel1378dc32016-07-22 19:32:25 +0200405 BUG_ON(mm == &init_mm);
406
Ard Biesheuvelc0951362017-03-09 21:52:07 +0100407 if (page_mappings_only)
Ard Biesheuveld27cfa12017-03-09 21:52:09 +0100408 flags = NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS;
Ard Biesheuvelc0951362017-03-09 21:52:07 +0100409
Mark Rutland11509a32016-01-25 11:45:10 +0000410 __create_pgd_mapping(mm->pgd, phys, virt, size, prot,
Ard Biesheuvelc0951362017-03-09 21:52:07 +0100411 pgd_pgtable_alloc, flags);
Mark Salterd7ecbdd2014-03-12 12:28:06 -0400412}
413
Ard Biesheuvelaa8c09b2017-03-09 21:52:00 +0100414static void update_mapping_prot(phys_addr_t phys, unsigned long virt,
415 phys_addr_t size, pgprot_t prot)
Laura Abbottda141702015-01-21 17:36:06 -0800416{
417 if (virt < VMALLOC_START) {
Ard Biesheuvelaa8c09b2017-03-09 21:52:00 +0100418 pr_warn("BUG: not updating mapping for %pa at 0x%016lx - outside kernel range\n",
Laura Abbottda141702015-01-21 17:36:06 -0800419 &phys, virt);
420 return;
421 }
422
Ard Biesheuveld27cfa12017-03-09 21:52:09 +0100423 __create_pgd_mapping(init_mm.pgd, phys, virt, size, prot, NULL,
424 NO_CONT_MAPPINGS);
Ard Biesheuvelaa8c09b2017-03-09 21:52:00 +0100425
426 /* flush the TLBs after updating live kernel mappings */
427 flush_tlb_kernel_range(virt, virt + size);
Laura Abbottda141702015-01-21 17:36:06 -0800428}
429
Will Deacon20a004e2018-02-15 11:14:56 +0000430static void __init __map_memblock(pgd_t *pgdp, phys_addr_t start,
Takahiro Akashi98d2e152017-04-03 11:24:34 +0900431 phys_addr_t end, pgprot_t prot, int flags)
Laura Abbottda141702015-01-21 17:36:06 -0800432{
Will Deacon20a004e2018-02-15 11:14:56 +0000433 __create_pgd_mapping(pgdp, start, __phys_to_virt(start), end - start,
Takahiro Akashi98d2e152017-04-03 11:24:34 +0900434 prot, early_pgtable_alloc, flags);
Laura Abbottda141702015-01-21 17:36:06 -0800435}
Laura Abbottda141702015-01-21 17:36:06 -0800436
Ard Biesheuvel5ea53062017-03-09 21:52:01 +0100437void __init mark_linear_text_alias_ro(void)
438{
439 /*
440 * Remove the write permissions from the linear alias of .text/.rodata
441 */
442 update_mapping_prot(__pa_symbol(_text), (unsigned long)lm_alias(_text),
443 (unsigned long)__init_begin - (unsigned long)_text,
444 PAGE_KERNEL_RO);
445}
446
Will Deacon20a004e2018-02-15 11:14:56 +0000447static void __init map_mem(pgd_t *pgdp)
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000448{
Takahiro Akashi98d2e152017-04-03 11:24:34 +0900449 phys_addr_t kernel_start = __pa_symbol(_text);
450 phys_addr_t kernel_end = __pa_symbol(__init_begin);
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000451 struct memblock_region *reg;
Takahiro Akashi98d2e152017-04-03 11:24:34 +0900452 int flags = 0;
453
454 if (debug_pagealloc_enabled())
455 flags = NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS;
456
457 /*
458 * Take care not to create a writable alias for the
459 * read-only text and rodata sections of the kernel image.
460 * So temporarily mark them as NOMAP to skip mappings in
461 * the following for-loop
462 */
463 memblock_mark_nomap(kernel_start, kernel_end - kernel_start);
464#ifdef CONFIG_KEXEC_CORE
465 if (crashk_res.end)
466 memblock_mark_nomap(crashk_res.start,
467 resource_size(&crashk_res));
468#endif
Steve Capperf6bc87c2013-04-30 11:00:33 +0100469
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000470 /* map all the memory banks */
471 for_each_memblock(memory, reg) {
472 phys_addr_t start = reg->base;
473 phys_addr_t end = start + reg->size;
474
475 if (start >= end)
476 break;
Ard Biesheuvel68709f42015-11-30 13:28:16 +0100477 if (memblock_is_nomap(reg))
478 continue;
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000479
Will Deacon20a004e2018-02-15 11:14:56 +0000480 __map_memblock(pgdp, start, end, PAGE_KERNEL, flags);
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000481 }
Takahiro Akashi98d2e152017-04-03 11:24:34 +0900482
483 /*
484 * Map the linear alias of the [_text, __init_begin) interval
485 * as non-executable now, and remove the write permission in
486 * mark_linear_text_alias_ro() below (which will be called after
487 * alternative patching has completed). This makes the contents
488 * of the region accessible to subsystems such as hibernate,
489 * but protects it from inadvertent modification or execution.
490 * Note that contiguous mappings cannot be remapped in this way,
491 * so we should avoid them here.
492 */
Will Deacon20a004e2018-02-15 11:14:56 +0000493 __map_memblock(pgdp, kernel_start, kernel_end,
Takahiro Akashi98d2e152017-04-03 11:24:34 +0900494 PAGE_KERNEL, NO_CONT_MAPPINGS);
495 memblock_clear_nomap(kernel_start, kernel_end - kernel_start);
496
497#ifdef CONFIG_KEXEC_CORE
498 /*
499 * Use page-level mappings here so that we can shrink the region
500 * in page granularity and put back unused memory to buddy system
501 * through /sys/kernel/kexec_crash_size interface.
502 */
503 if (crashk_res.end) {
Will Deacon20a004e2018-02-15 11:14:56 +0000504 __map_memblock(pgdp, crashk_res.start, crashk_res.end + 1,
Takahiro Akashi98d2e152017-04-03 11:24:34 +0900505 PAGE_KERNEL,
506 NO_BLOCK_MAPPINGS | NO_CONT_MAPPINGS);
507 memblock_clear_nomap(crashk_res.start,
508 resource_size(&crashk_res));
509 }
510#endif
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000511}
512
Laura Abbottda141702015-01-21 17:36:06 -0800513void mark_rodata_ro(void)
514{
Jeremy Linton2f39b5f2016-02-19 11:50:32 -0600515 unsigned long section_size;
Ard Biesheuvelf9040772016-02-16 13:52:40 +0100516
Jeremy Linton2f39b5f2016-02-19 11:50:32 -0600517 /*
Ard Biesheuvel9fdc14c52016-06-23 15:53:17 +0200518 * mark .rodata as read only. Use __init_begin rather than __end_rodata
519 * to cover NOTES and EXCEPTION_TABLE.
Jeremy Linton2f39b5f2016-02-19 11:50:32 -0600520 */
Ard Biesheuvel9fdc14c52016-06-23 15:53:17 +0200521 section_size = (unsigned long)__init_begin - (unsigned long)__start_rodata;
Ard Biesheuvelaa8c09b2017-03-09 21:52:00 +0100522 update_mapping_prot(__pa_symbol(__start_rodata), (unsigned long)__start_rodata,
Jeremy Linton2f39b5f2016-02-19 11:50:32 -0600523 section_size, PAGE_KERNEL_RO);
Ard Biesheuvele98216b2016-10-21 12:22:56 +0100524
Laura Abbott1404d6f2016-10-27 09:27:34 -0700525 debug_checkwx();
Laura Abbottda141702015-01-21 17:36:06 -0800526}
Laura Abbottda141702015-01-21 17:36:06 -0800527
Will Deacon20a004e2018-02-15 11:14:56 +0000528static void __init map_kernel_segment(pgd_t *pgdp, void *va_start, void *va_end,
Ard Biesheuveld27cfa12017-03-09 21:52:09 +0100529 pgprot_t prot, struct vm_struct *vma,
Will Deacon92bbd162017-07-24 11:46:09 +0100530 int flags, unsigned long vm_flags)
Mark Rutland068a17a2016-01-25 11:45:12 +0000531{
Laura Abbott2077be62017-01-10 13:35:49 -0800532 phys_addr_t pa_start = __pa_symbol(va_start);
Mark Rutland068a17a2016-01-25 11:45:12 +0000533 unsigned long size = va_end - va_start;
534
535 BUG_ON(!PAGE_ALIGNED(pa_start));
536 BUG_ON(!PAGE_ALIGNED(size));
537
Will Deacon20a004e2018-02-15 11:14:56 +0000538 __create_pgd_mapping(pgdp, pa_start, (unsigned long)va_start, size, prot,
Ard Biesheuveld27cfa12017-03-09 21:52:09 +0100539 early_pgtable_alloc, flags);
Ard Biesheuvelf9040772016-02-16 13:52:40 +0100540
Will Deacon92bbd162017-07-24 11:46:09 +0100541 if (!(vm_flags & VM_NO_GUARD))
542 size += PAGE_SIZE;
543
Ard Biesheuvelf9040772016-02-16 13:52:40 +0100544 vma->addr = va_start;
545 vma->phys_addr = pa_start;
546 vma->size = size;
Will Deacon92bbd162017-07-24 11:46:09 +0100547 vma->flags = VM_MAP | vm_flags;
Ard Biesheuvelf9040772016-02-16 13:52:40 +0100548 vma->caller = __builtin_return_address(0);
549
550 vm_area_add_early(vma);
Mark Rutland068a17a2016-01-25 11:45:12 +0000551}
552
Ard Biesheuvel28b066d2017-03-09 21:52:02 +0100553static int __init parse_rodata(char *arg)
554{
555 return strtobool(arg, &rodata_enabled);
556}
557early_param("rodata", parse_rodata);
558
Will Deacon51a00482017-11-14 14:14:17 +0000559#ifdef CONFIG_UNMAP_KERNEL_AT_EL0
560static int __init map_entry_trampoline(void)
561{
Will Deacon51a00482017-11-14 14:14:17 +0000562 pgprot_t prot = rodata_enabled ? PAGE_KERNEL_ROX : PAGE_KERNEL_EXEC;
563 phys_addr_t pa_start = __pa_symbol(__entry_tramp_text_start);
564
565 /* The trampoline is always mapped and can therefore be global */
566 pgprot_val(prot) &= ~PTE_NG;
567
568 /* Map only the text into the trampoline page table */
569 memset(tramp_pg_dir, 0, PGD_SIZE);
570 __create_pgd_mapping(tramp_pg_dir, pa_start, TRAMP_VALIAS, PAGE_SIZE,
571 prot, pgd_pgtable_alloc, 0);
572
Will Deacon6c27c402017-12-06 11:24:02 +0000573 /* Map both the text and data into the kernel page table */
Will Deacon51a00482017-11-14 14:14:17 +0000574 __set_fixmap(FIX_ENTRY_TRAMP_TEXT, pa_start, prot);
Will Deacon6c27c402017-12-06 11:24:02 +0000575 if (IS_ENABLED(CONFIG_RANDOMIZE_BASE)) {
576 extern char __entry_tramp_data_start[];
577
578 __set_fixmap(FIX_ENTRY_TRAMP_DATA,
579 __pa_symbol(__entry_tramp_data_start),
580 PAGE_KERNEL_RO);
581 }
582
Will Deacon51a00482017-11-14 14:14:17 +0000583 return 0;
584}
585core_initcall(map_entry_trampoline);
586#endif
587
Mark Rutland068a17a2016-01-25 11:45:12 +0000588/*
589 * Create fine-grained mappings for the kernel.
590 */
Will Deacon20a004e2018-02-15 11:14:56 +0000591static void __init map_kernel(pgd_t *pgdp)
Mark Rutland068a17a2016-01-25 11:45:12 +0000592{
Ard Biesheuvel2ebe088b2017-03-09 21:52:03 +0100593 static struct vm_struct vmlinux_text, vmlinux_rodata, vmlinux_inittext,
594 vmlinux_initdata, vmlinux_data;
Mark Rutland068a17a2016-01-25 11:45:12 +0000595
Ard Biesheuvel28b066d2017-03-09 21:52:02 +0100596 /*
597 * External debuggers may need to write directly to the text
598 * mapping to install SW breakpoints. Allow this (only) when
599 * explicitly requested with rodata=off.
600 */
601 pgprot_t text_prot = rodata_enabled ? PAGE_KERNEL_ROX : PAGE_KERNEL_EXEC;
602
Ard Biesheuveld27cfa12017-03-09 21:52:09 +0100603 /*
604 * Only rodata will be remapped with different permissions later on,
605 * all other segments are allowed to use contiguous mappings.
606 */
Will Deacon20a004e2018-02-15 11:14:56 +0000607 map_kernel_segment(pgdp, _text, _etext, text_prot, &vmlinux_text, 0,
Will Deacon92bbd162017-07-24 11:46:09 +0100608 VM_NO_GUARD);
Will Deacon20a004e2018-02-15 11:14:56 +0000609 map_kernel_segment(pgdp, __start_rodata, __inittext_begin, PAGE_KERNEL,
Will Deacon92bbd162017-07-24 11:46:09 +0100610 &vmlinux_rodata, NO_CONT_MAPPINGS, VM_NO_GUARD);
Will Deacon20a004e2018-02-15 11:14:56 +0000611 map_kernel_segment(pgdp, __inittext_begin, __inittext_end, text_prot,
Will Deacon92bbd162017-07-24 11:46:09 +0100612 &vmlinux_inittext, 0, VM_NO_GUARD);
Will Deacon20a004e2018-02-15 11:14:56 +0000613 map_kernel_segment(pgdp, __initdata_begin, __initdata_end, PAGE_KERNEL,
Will Deacon92bbd162017-07-24 11:46:09 +0100614 &vmlinux_initdata, 0, VM_NO_GUARD);
Will Deacon20a004e2018-02-15 11:14:56 +0000615 map_kernel_segment(pgdp, _data, _end, PAGE_KERNEL, &vmlinux_data, 0, 0);
Mark Rutland068a17a2016-01-25 11:45:12 +0000616
Will Deacon20a004e2018-02-15 11:14:56 +0000617 if (!READ_ONCE(pgd_val(*pgd_offset_raw(pgdp, FIXADDR_START)))) {
Ard Biesheuvelf9040772016-02-16 13:52:40 +0100618 /*
619 * The fixmap falls in a separate pgd to the kernel, and doesn't
620 * live in the carveout for the swapper_pg_dir. We can simply
621 * re-use the existing dir for the fixmap.
622 */
Will Deacon20a004e2018-02-15 11:14:56 +0000623 set_pgd(pgd_offset_raw(pgdp, FIXADDR_START),
624 READ_ONCE(*pgd_offset_k(FIXADDR_START)));
Ard Biesheuvelf9040772016-02-16 13:52:40 +0100625 } else if (CONFIG_PGTABLE_LEVELS > 3) {
626 /*
627 * The fixmap shares its top level pgd entry with the kernel
628 * mapping. This can really only occur when we are running
629 * with 16k/4 levels, so we can simply reuse the pud level
630 * entry instead.
631 */
632 BUG_ON(!IS_ENABLED(CONFIG_ARM64_16K_PAGES));
Will Deacon20a004e2018-02-15 11:14:56 +0000633 pud_populate(&init_mm,
634 pud_set_fixmap_offset(pgdp, FIXADDR_START),
Kristina Martsenko19338302017-12-13 17:07:20 +0000635 lm_alias(bm_pmd));
Ard Biesheuvelf9040772016-02-16 13:52:40 +0100636 pud_clear_fixmap();
637 } else {
638 BUG();
639 }
Mark Rutland068a17a2016-01-25 11:45:12 +0000640
Will Deacon20a004e2018-02-15 11:14:56 +0000641 kasan_copy_shadow(pgdp);
Mark Rutland068a17a2016-01-25 11:45:12 +0000642}
643
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000644/*
645 * paging_init() sets up the page tables, initialises the zone memory
646 * maps and sets up the zero page.
647 */
648void __init paging_init(void)
649{
Jun Yao2330b7c2018-09-24 17:15:02 +0100650 pgd_t *pgdp = pgd_set_fixmap(__pa_symbol(swapper_pg_dir));
Mark Rutland068a17a2016-01-25 11:45:12 +0000651
Will Deacon20a004e2018-02-15 11:14:56 +0000652 map_kernel(pgdp);
653 map_mem(pgdp);
Mark Rutland068a17a2016-01-25 11:45:12 +0000654
Mark Rutland068a17a2016-01-25 11:45:12 +0000655 pgd_clear_fixmap();
Mark Rutland068a17a2016-01-25 11:45:12 +0000656
Mark Rutland068a17a2016-01-25 11:45:12 +0000657 cpu_replace_ttbr1(lm_alias(swapper_pg_dir));
Jun Yao2b5548b2018-09-24 15:47:49 +0100658 init_mm.pgd = swapper_pg_dir;
Mark Rutland068a17a2016-01-25 11:45:12 +0000659
Jun Yao2b5548b2018-09-24 15:47:49 +0100660 memblock_free(__pa_symbol(init_pg_dir),
661 __pa_symbol(init_pg_end) - __pa_symbol(init_pg_dir));
Ard Biesheuvel24cc61d2018-11-07 15:16:06 +0100662
663 memblock_allow_resize();
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000664}
665
666/*
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000667 * Check whether a kernel address is valid (derived from arch/x86/).
668 */
669int kern_addr_valid(unsigned long addr)
670{
Will Deacon20a004e2018-02-15 11:14:56 +0000671 pgd_t *pgdp;
672 pud_t *pudp, pud;
673 pmd_t *pmdp, pmd;
674 pte_t *ptep, pte;
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000675
676 if ((((long)addr) >> VA_BITS) != -1UL)
677 return 0;
678
Will Deacon20a004e2018-02-15 11:14:56 +0000679 pgdp = pgd_offset_k(addr);
680 if (pgd_none(READ_ONCE(*pgdp)))
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000681 return 0;
682
Will Deacon20a004e2018-02-15 11:14:56 +0000683 pudp = pud_offset(pgdp, addr);
684 pud = READ_ONCE(*pudp);
685 if (pud_none(pud))
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000686 return 0;
687
Will Deacon20a004e2018-02-15 11:14:56 +0000688 if (pud_sect(pud))
689 return pfn_valid(pud_pfn(pud));
Steve Capper206a2a72014-05-06 14:02:27 +0100690
Will Deacon20a004e2018-02-15 11:14:56 +0000691 pmdp = pmd_offset(pudp, addr);
692 pmd = READ_ONCE(*pmdp);
693 if (pmd_none(pmd))
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000694 return 0;
695
Will Deacon20a004e2018-02-15 11:14:56 +0000696 if (pmd_sect(pmd))
697 return pfn_valid(pmd_pfn(pmd));
Dave Andersonda6e4cb2014-04-15 18:53:24 +0100698
Will Deacon20a004e2018-02-15 11:14:56 +0000699 ptep = pte_offset_kernel(pmdp, addr);
700 pte = READ_ONCE(*ptep);
701 if (pte_none(pte))
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000702 return 0;
703
Will Deacon20a004e2018-02-15 11:14:56 +0000704 return pfn_valid(pte_pfn(pte));
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000705}
706#ifdef CONFIG_SPARSEMEM_VMEMMAP
Suzuki K. Pouloseb433dce2015-10-19 14:19:28 +0100707#if !ARM64_SWAPPER_USES_SECTION_MAPS
Christoph Hellwig7b73d972017-12-29 08:53:54 +0100708int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node,
709 struct vmem_altmap *altmap)
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000710{
Johannes Weiner0aad8182013-04-29 15:07:50 -0700711 return vmemmap_populate_basepages(start, end, node);
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000712}
Suzuki K. Pouloseb433dce2015-10-19 14:19:28 +0100713#else /* !ARM64_SWAPPER_USES_SECTION_MAPS */
Christoph Hellwig7b73d972017-12-29 08:53:54 +0100714int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node,
715 struct vmem_altmap *altmap)
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000716{
Johannes Weiner0aad8182013-04-29 15:07:50 -0700717 unsigned long addr = start;
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000718 unsigned long next;
Will Deacon20a004e2018-02-15 11:14:56 +0000719 pgd_t *pgdp;
720 pud_t *pudp;
721 pmd_t *pmdp;
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000722
723 do {
724 next = pmd_addr_end(addr, end);
725
Will Deacon20a004e2018-02-15 11:14:56 +0000726 pgdp = vmemmap_pgd_populate(addr, node);
727 if (!pgdp)
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000728 return -ENOMEM;
729
Will Deacon20a004e2018-02-15 11:14:56 +0000730 pudp = vmemmap_pud_populate(pgdp, addr, node);
731 if (!pudp)
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000732 return -ENOMEM;
733
Will Deacon20a004e2018-02-15 11:14:56 +0000734 pmdp = pmd_offset(pudp, addr);
735 if (pmd_none(READ_ONCE(*pmdp))) {
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000736 void *p = NULL;
737
738 p = vmemmap_alloc_block_buf(PMD_SIZE, node);
739 if (!p)
740 return -ENOMEM;
741
Will Deacon20a004e2018-02-15 11:14:56 +0000742 pmd_set_huge(pmdp, __pa(p), __pgprot(PROT_SECT_NORMAL));
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000743 } else
Will Deacon20a004e2018-02-15 11:14:56 +0000744 vmemmap_verify((pte_t *)pmdp, node, addr, next);
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000745 } while (addr = next, addr != end);
746
747 return 0;
748}
749#endif /* CONFIG_ARM64_64K_PAGES */
Christoph Hellwig24b6d412017-12-29 08:53:56 +0100750void vmemmap_free(unsigned long start, unsigned long end,
751 struct vmem_altmap *altmap)
Tang Chen01975182013-02-22 16:33:08 -0800752{
753}
Catalin Marinasc1cc1552012-03-05 11:49:27 +0000754#endif /* CONFIG_SPARSEMEM_VMEMMAP */
Laura Abbottaf86e592014-11-21 21:50:42 +0000755
Laura Abbottaf86e592014-11-21 21:50:42 +0000756static inline pud_t * fixmap_pud(unsigned long addr)
757{
Will Deacon20a004e2018-02-15 11:14:56 +0000758 pgd_t *pgdp = pgd_offset_k(addr);
759 pgd_t pgd = READ_ONCE(*pgdp);
Laura Abbottaf86e592014-11-21 21:50:42 +0000760
Will Deacon20a004e2018-02-15 11:14:56 +0000761 BUG_ON(pgd_none(pgd) || pgd_bad(pgd));
Laura Abbottaf86e592014-11-21 21:50:42 +0000762
Will Deacon20a004e2018-02-15 11:14:56 +0000763 return pud_offset_kimg(pgdp, addr);
Laura Abbottaf86e592014-11-21 21:50:42 +0000764}
765
766static inline pmd_t * fixmap_pmd(unsigned long addr)
767{
Will Deacon20a004e2018-02-15 11:14:56 +0000768 pud_t *pudp = fixmap_pud(addr);
769 pud_t pud = READ_ONCE(*pudp);
Laura Abbottaf86e592014-11-21 21:50:42 +0000770
Will Deacon20a004e2018-02-15 11:14:56 +0000771 BUG_ON(pud_none(pud) || pud_bad(pud));
Laura Abbottaf86e592014-11-21 21:50:42 +0000772
Will Deacon20a004e2018-02-15 11:14:56 +0000773 return pmd_offset_kimg(pudp, addr);
Laura Abbottaf86e592014-11-21 21:50:42 +0000774}
775
776static inline pte_t * fixmap_pte(unsigned long addr)
777{
Ard Biesheuvel157962f2016-02-16 13:52:38 +0100778 return &bm_pte[pte_index(addr)];
Laura Abbottaf86e592014-11-21 21:50:42 +0000779}
780
Laura Abbott2077be62017-01-10 13:35:49 -0800781/*
782 * The p*d_populate functions call virt_to_phys implicitly so they can't be used
783 * directly on kernel symbols (bm_p*d). This function is called too early to use
784 * lm_alias so __p*d_populate functions must be used to populate with the
785 * physical address from __pa_symbol.
786 */
Laura Abbottaf86e592014-11-21 21:50:42 +0000787void __init early_fixmap_init(void)
788{
Will Deacon20a004e2018-02-15 11:14:56 +0000789 pgd_t *pgdp, pgd;
790 pud_t *pudp;
791 pmd_t *pmdp;
Laura Abbottaf86e592014-11-21 21:50:42 +0000792 unsigned long addr = FIXADDR_START;
793
Will Deacon20a004e2018-02-15 11:14:56 +0000794 pgdp = pgd_offset_k(addr);
795 pgd = READ_ONCE(*pgdp);
Ard Biesheuvelf80fb3a2016-01-26 14:12:01 +0100796 if (CONFIG_PGTABLE_LEVELS > 3 &&
Will Deacon20a004e2018-02-15 11:14:56 +0000797 !(pgd_none(pgd) || pgd_page_paddr(pgd) == __pa_symbol(bm_pud))) {
Ard Biesheuvelf9040772016-02-16 13:52:40 +0100798 /*
799 * We only end up here if the kernel mapping and the fixmap
800 * share the top level pgd entry, which should only happen on
801 * 16k/4 levels configurations.
802 */
803 BUG_ON(!IS_ENABLED(CONFIG_ARM64_16K_PAGES));
Will Deacon20a004e2018-02-15 11:14:56 +0000804 pudp = pud_offset_kimg(pgdp, addr);
Ard Biesheuvelf9040772016-02-16 13:52:40 +0100805 } else {
Will Deacon20a004e2018-02-15 11:14:56 +0000806 if (pgd_none(pgd))
807 __pgd_populate(pgdp, __pa_symbol(bm_pud), PUD_TYPE_TABLE);
808 pudp = fixmap_pud(addr);
Ard Biesheuvelf9040772016-02-16 13:52:40 +0100809 }
Will Deacon20a004e2018-02-15 11:14:56 +0000810 if (pud_none(READ_ONCE(*pudp)))
811 __pud_populate(pudp, __pa_symbol(bm_pmd), PMD_TYPE_TABLE);
812 pmdp = fixmap_pmd(addr);
813 __pmd_populate(pmdp, __pa_symbol(bm_pte), PMD_TYPE_TABLE);
Laura Abbottaf86e592014-11-21 21:50:42 +0000814
815 /*
816 * The boot-ioremap range spans multiple pmds, for which
Ard Biesheuvel157962f2016-02-16 13:52:38 +0100817 * we are not prepared:
Laura Abbottaf86e592014-11-21 21:50:42 +0000818 */
819 BUILD_BUG_ON((__fix_to_virt(FIX_BTMAP_BEGIN) >> PMD_SHIFT)
820 != (__fix_to_virt(FIX_BTMAP_END) >> PMD_SHIFT));
821
Will Deacon20a004e2018-02-15 11:14:56 +0000822 if ((pmdp != fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN)))
823 || pmdp != fixmap_pmd(fix_to_virt(FIX_BTMAP_END))) {
Laura Abbottaf86e592014-11-21 21:50:42 +0000824 WARN_ON(1);
Will Deacon20a004e2018-02-15 11:14:56 +0000825 pr_warn("pmdp %p != %p, %p\n",
826 pmdp, fixmap_pmd(fix_to_virt(FIX_BTMAP_BEGIN)),
Laura Abbottaf86e592014-11-21 21:50:42 +0000827 fixmap_pmd(fix_to_virt(FIX_BTMAP_END)));
828 pr_warn("fix_to_virt(FIX_BTMAP_BEGIN): %08lx\n",
829 fix_to_virt(FIX_BTMAP_BEGIN));
830 pr_warn("fix_to_virt(FIX_BTMAP_END): %08lx\n",
831 fix_to_virt(FIX_BTMAP_END));
832
833 pr_warn("FIX_BTMAP_END: %d\n", FIX_BTMAP_END);
834 pr_warn("FIX_BTMAP_BEGIN: %d\n", FIX_BTMAP_BEGIN);
835 }
836}
837
James Morse18b4b272017-11-06 18:44:26 +0000838/*
839 * Unusually, this is also called in IRQ context (ghes_iounmap_irq) so if we
840 * ever need to use IPIs for TLB broadcasting, then we're in trouble here.
841 */
Laura Abbottaf86e592014-11-21 21:50:42 +0000842void __set_fixmap(enum fixed_addresses idx,
843 phys_addr_t phys, pgprot_t flags)
844{
845 unsigned long addr = __fix_to_virt(idx);
Will Deacon20a004e2018-02-15 11:14:56 +0000846 pte_t *ptep;
Laura Abbottaf86e592014-11-21 21:50:42 +0000847
Mark Rutlandb63dbef2015-03-04 13:27:35 +0000848 BUG_ON(idx <= FIX_HOLE || idx >= __end_of_fixed_addresses);
Laura Abbottaf86e592014-11-21 21:50:42 +0000849
Will Deacon20a004e2018-02-15 11:14:56 +0000850 ptep = fixmap_pte(addr);
Laura Abbottaf86e592014-11-21 21:50:42 +0000851
852 if (pgprot_val(flags)) {
Will Deacon20a004e2018-02-15 11:14:56 +0000853 set_pte(ptep, pfn_pte(phys >> PAGE_SHIFT, flags));
Laura Abbottaf86e592014-11-21 21:50:42 +0000854 } else {
Will Deacon20a004e2018-02-15 11:14:56 +0000855 pte_clear(&init_mm, addr, ptep);
Laura Abbottaf86e592014-11-21 21:50:42 +0000856 flush_tlb_kernel_range(addr, addr+PAGE_SIZE);
857 }
858}
Ard Biesheuvel61bd93c2015-06-01 13:40:32 +0200859
Ard Biesheuvelf80fb3a2016-01-26 14:12:01 +0100860void *__init __fixmap_remap_fdt(phys_addr_t dt_phys, int *size, pgprot_t prot)
Ard Biesheuvel61bd93c2015-06-01 13:40:32 +0200861{
862 const u64 dt_virt_base = __fix_to_virt(FIX_FDT);
Ard Biesheuvelf80fb3a2016-01-26 14:12:01 +0100863 int offset;
Ard Biesheuvel61bd93c2015-06-01 13:40:32 +0200864 void *dt_virt;
865
866 /*
867 * Check whether the physical FDT address is set and meets the minimum
868 * alignment requirement. Since we are relying on MIN_FDT_ALIGN to be
Ard Biesheuvel04a84812016-08-01 13:29:31 +0200869 * at least 8 bytes so that we can always access the magic and size
870 * fields of the FDT header after mapping the first chunk, double check
871 * here if that is indeed the case.
Ard Biesheuvel61bd93c2015-06-01 13:40:32 +0200872 */
873 BUILD_BUG_ON(MIN_FDT_ALIGN < 8);
874 if (!dt_phys || dt_phys % MIN_FDT_ALIGN)
875 return NULL;
876
877 /*
878 * Make sure that the FDT region can be mapped without the need to
879 * allocate additional translation table pages, so that it is safe
Laura Abbott132233a2016-02-05 16:24:46 -0800880 * to call create_mapping_noalloc() this early.
Ard Biesheuvel61bd93c2015-06-01 13:40:32 +0200881 *
882 * On 64k pages, the FDT will be mapped using PTEs, so we need to
883 * be in the same PMD as the rest of the fixmap.
884 * On 4k pages, we'll use section mappings for the FDT so we only
885 * have to be in the same PUD.
886 */
887 BUILD_BUG_ON(dt_virt_base % SZ_2M);
888
Suzuki K. Pouloseb433dce2015-10-19 14:19:28 +0100889 BUILD_BUG_ON(__fix_to_virt(FIX_FDT_END) >> SWAPPER_TABLE_SHIFT !=
890 __fix_to_virt(FIX_BTMAP_BEGIN) >> SWAPPER_TABLE_SHIFT);
Ard Biesheuvel61bd93c2015-06-01 13:40:32 +0200891
Suzuki K. Pouloseb433dce2015-10-19 14:19:28 +0100892 offset = dt_phys % SWAPPER_BLOCK_SIZE;
Ard Biesheuvel61bd93c2015-06-01 13:40:32 +0200893 dt_virt = (void *)dt_virt_base + offset;
894
895 /* map the first chunk so we can read the size from the header */
Laura Abbott132233a2016-02-05 16:24:46 -0800896 create_mapping_noalloc(round_down(dt_phys, SWAPPER_BLOCK_SIZE),
897 dt_virt_base, SWAPPER_BLOCK_SIZE, prot);
Ard Biesheuvel61bd93c2015-06-01 13:40:32 +0200898
Ard Biesheuvel04a84812016-08-01 13:29:31 +0200899 if (fdt_magic(dt_virt) != FDT_MAGIC)
Ard Biesheuvel61bd93c2015-06-01 13:40:32 +0200900 return NULL;
901
Ard Biesheuvelf80fb3a2016-01-26 14:12:01 +0100902 *size = fdt_totalsize(dt_virt);
903 if (*size > MAX_FDT_SIZE)
Ard Biesheuvel61bd93c2015-06-01 13:40:32 +0200904 return NULL;
905
Ard Biesheuvelf80fb3a2016-01-26 14:12:01 +0100906 if (offset + *size > SWAPPER_BLOCK_SIZE)
Laura Abbott132233a2016-02-05 16:24:46 -0800907 create_mapping_noalloc(round_down(dt_phys, SWAPPER_BLOCK_SIZE), dt_virt_base,
Ard Biesheuvelf80fb3a2016-01-26 14:12:01 +0100908 round_up(offset + *size, SWAPPER_BLOCK_SIZE), prot);
909
910 return dt_virt;
911}
912
913void *__init fixmap_remap_fdt(phys_addr_t dt_phys)
914{
915 void *dt_virt;
916 int size;
917
918 dt_virt = __fixmap_remap_fdt(dt_phys, &size, PAGE_KERNEL_RO);
919 if (!dt_virt)
920 return NULL;
Ard Biesheuvel61bd93c2015-06-01 13:40:32 +0200921
922 memblock_reserve(dt_phys, size);
Ard Biesheuvel61bd93c2015-06-01 13:40:32 +0200923 return dt_virt;
924}
Ard Biesheuvel324420b2016-02-16 13:52:35 +0100925
926int __init arch_ioremap_pud_supported(void)
927{
928 /* only 4k granule supports level 1 block mappings */
929 return IS_ENABLED(CONFIG_ARM64_4K_PAGES);
930}
931
932int __init arch_ioremap_pmd_supported(void)
933{
934 return 1;
935}
936
Will Deacon20a004e2018-02-15 11:14:56 +0000937int pud_set_huge(pud_t *pudp, phys_addr_t phys, pgprot_t prot)
Ard Biesheuvel324420b2016-02-16 13:52:35 +0100938{
Kristina Martsenko19338302017-12-13 17:07:20 +0000939 pgprot_t sect_prot = __pgprot(PUD_TYPE_SECT |
940 pgprot_val(mk_sect_prot(prot)));
Laura Abbott82034c22018-05-23 11:43:46 -0700941 pud_t new_pud = pfn_pud(__phys_to_pfn(phys), sect_prot);
Will Deacon15122ee2018-02-21 12:59:27 +0000942
Laura Abbott82034c22018-05-23 11:43:46 -0700943 /* Only allow permission changes for now */
944 if (!pgattr_change_is_safe(READ_ONCE(pud_val(*pudp)),
945 pud_val(new_pud)))
Will Deacon15122ee2018-02-21 12:59:27 +0000946 return 0;
947
Ard Biesheuvel324420b2016-02-16 13:52:35 +0100948 BUG_ON(phys & ~PUD_MASK);
Laura Abbott82034c22018-05-23 11:43:46 -0700949 set_pud(pudp, new_pud);
Ard Biesheuvel324420b2016-02-16 13:52:35 +0100950 return 1;
951}
952
Will Deacon20a004e2018-02-15 11:14:56 +0000953int pmd_set_huge(pmd_t *pmdp, phys_addr_t phys, pgprot_t prot)
Ard Biesheuvel324420b2016-02-16 13:52:35 +0100954{
Kristina Martsenko19338302017-12-13 17:07:20 +0000955 pgprot_t sect_prot = __pgprot(PMD_TYPE_SECT |
956 pgprot_val(mk_sect_prot(prot)));
Laura Abbott82034c22018-05-23 11:43:46 -0700957 pmd_t new_pmd = pfn_pmd(__phys_to_pfn(phys), sect_prot);
Will Deacon15122ee2018-02-21 12:59:27 +0000958
Laura Abbott82034c22018-05-23 11:43:46 -0700959 /* Only allow permission changes for now */
960 if (!pgattr_change_is_safe(READ_ONCE(pmd_val(*pmdp)),
961 pmd_val(new_pmd)))
Will Deacon15122ee2018-02-21 12:59:27 +0000962 return 0;
963
Ard Biesheuvel324420b2016-02-16 13:52:35 +0100964 BUG_ON(phys & ~PMD_MASK);
Laura Abbott82034c22018-05-23 11:43:46 -0700965 set_pmd(pmdp, new_pmd);
Ard Biesheuvel324420b2016-02-16 13:52:35 +0100966 return 1;
967}
968
Will Deacon20a004e2018-02-15 11:14:56 +0000969int pud_clear_huge(pud_t *pudp)
Ard Biesheuvel324420b2016-02-16 13:52:35 +0100970{
Will Deacon20a004e2018-02-15 11:14:56 +0000971 if (!pud_sect(READ_ONCE(*pudp)))
Ard Biesheuvel324420b2016-02-16 13:52:35 +0100972 return 0;
Will Deacon20a004e2018-02-15 11:14:56 +0000973 pud_clear(pudp);
Ard Biesheuvel324420b2016-02-16 13:52:35 +0100974 return 1;
975}
976
Will Deacon20a004e2018-02-15 11:14:56 +0000977int pmd_clear_huge(pmd_t *pmdp)
Ard Biesheuvel324420b2016-02-16 13:52:35 +0100978{
Will Deacon20a004e2018-02-15 11:14:56 +0000979 if (!pmd_sect(READ_ONCE(*pmdp)))
Ard Biesheuvel324420b2016-02-16 13:52:35 +0100980 return 0;
Will Deacon20a004e2018-02-15 11:14:56 +0000981 pmd_clear(pmdp);
Ard Biesheuvel324420b2016-02-16 13:52:35 +0100982 return 1;
983}
Toshi Kanib6bdb752018-03-22 16:17:20 -0700984
Chintan Pandyaec28bb92018-06-06 12:31:21 +0530985int pmd_free_pte_page(pmd_t *pmdp, unsigned long addr)
Toshi Kanib6bdb752018-03-22 16:17:20 -0700986{
Chintan Pandyaec28bb92018-06-06 12:31:21 +0530987 pte_t *table;
988 pmd_t pmd;
989
990 pmd = READ_ONCE(*pmdp);
991
Mark Rutlandfac880c2018-09-05 17:38:57 +0100992 if (!pmd_present(pmd))
993 return 1;
994 if (!pmd_table(pmd)) {
Chintan Pandyaec28bb92018-06-06 12:31:21 +0530995 VM_WARN_ON(!pmd_table(pmd));
996 return 1;
997 }
998
999 table = pte_offset_kernel(pmdp, addr);
1000 pmd_clear(pmdp);
1001 __flush_tlb_kernel_pgtable(addr);
1002 pte_free_kernel(NULL, table);
1003 return 1;
Toshi Kanib6bdb752018-03-22 16:17:20 -07001004}
1005
Chintan Pandyaec28bb92018-06-06 12:31:21 +05301006int pud_free_pmd_page(pud_t *pudp, unsigned long addr)
Toshi Kanib6bdb752018-03-22 16:17:20 -07001007{
Chintan Pandyaec28bb92018-06-06 12:31:21 +05301008 pmd_t *table;
1009 pmd_t *pmdp;
1010 pud_t pud;
1011 unsigned long next, end;
1012
1013 pud = READ_ONCE(*pudp);
1014
Mark Rutlandfac880c2018-09-05 17:38:57 +01001015 if (!pud_present(pud))
1016 return 1;
1017 if (!pud_table(pud)) {
Chintan Pandyaec28bb92018-06-06 12:31:21 +05301018 VM_WARN_ON(!pud_table(pud));
1019 return 1;
1020 }
1021
1022 table = pmd_offset(pudp, addr);
1023 pmdp = table;
1024 next = addr;
1025 end = addr + PUD_SIZE;
1026 do {
1027 pmd_free_pte_page(pmdp, next);
1028 } while (pmdp++, next += PMD_SIZE, next != end);
1029
1030 pud_clear(pudp);
1031 __flush_tlb_kernel_pgtable(addr);
1032 pmd_free(NULL, table);
1033 return 1;
Toshi Kanib6bdb752018-03-22 16:17:20 -07001034}