Thomas Gleixner | 9ab65af | 2019-05-19 15:51:37 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 2 | /* |
| 3 | * Copyright(c) 2004 - 2006 Intel Corporation. All rights reserved. |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | /* |
| 7 | * This code implements the DMA subsystem. It provides a HW-neutral interface |
| 8 | * for other kernel code to use asynchronous memory copy capabilities, |
| 9 | * if present, and allows different HW DMA drivers to register as providing |
| 10 | * this capability. |
| 11 | * |
| 12 | * Due to the fact we are accelerating what is already a relatively fast |
| 13 | * operation, the code goes to great lengths to avoid additional overhead, |
| 14 | * such as locking. |
| 15 | * |
| 16 | * LOCKING: |
| 17 | * |
Dan Williams | aa1e6f1 | 2009-01-06 11:38:17 -0700 | [diff] [blame] | 18 | * The subsystem keeps a global list of dma_device structs it is protected by a |
| 19 | * mutex, dma_list_mutex. |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 20 | * |
Dan Williams | f27c580 | 2009-01-06 11:38:18 -0700 | [diff] [blame] | 21 | * A subsystem can get access to a channel by calling dmaengine_get() followed |
| 22 | * by dma_find_channel(), or if it has need for an exclusive channel it can call |
| 23 | * dma_request_channel(). Once a channel is allocated a reference is taken |
| 24 | * against its corresponding driver to disable removal. |
| 25 | * |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 26 | * Each device has a channels list, which runs unlocked but is never modified |
| 27 | * once the device is registered, it's just setup by the driver. |
| 28 | * |
Mauro Carvalho Chehab | 44348e8a | 2018-06-14 12:34:32 -0300 | [diff] [blame] | 29 | * See Documentation/driver-api/dmaengine for more details |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 30 | */ |
| 31 | |
Joe Perches | 6343325 | 2012-07-18 09:51:28 -0700 | [diff] [blame] | 32 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
| 33 | |
Peter Ujfalusi | a8135d0 | 2015-12-14 22:47:40 +0200 | [diff] [blame] | 34 | #include <linux/platform_device.h> |
Alexey Dobriyan | b7f080c | 2011-06-16 11:01:34 +0000 | [diff] [blame] | 35 | #include <linux/dma-mapping.h> |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 36 | #include <linux/init.h> |
| 37 | #include <linux/module.h> |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 38 | #include <linux/mm.h> |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 39 | #include <linux/device.h> |
| 40 | #include <linux/dmaengine.h> |
| 41 | #include <linux/hardirq.h> |
| 42 | #include <linux/spinlock.h> |
| 43 | #include <linux/percpu.h> |
| 44 | #include <linux/rcupdate.h> |
| 45 | #include <linux/mutex.h> |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 46 | #include <linux/jiffies.h> |
Dan Williams | 2ba0562 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 47 | #include <linux/rculist.h> |
Dan Williams | 864498a | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 48 | #include <linux/idr.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 49 | #include <linux/slab.h> |
Andy Shevchenko | 4e82f5d | 2013-04-09 14:05:44 +0300 | [diff] [blame] | 50 | #include <linux/acpi.h> |
| 51 | #include <linux/acpi_dma.h> |
Jon Hunter | 9a6cecc | 2012-09-14 17:41:57 -0500 | [diff] [blame] | 52 | #include <linux/of_dma.h> |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 53 | #include <linux/mempool.h> |
Anshuman Khandual | 98fa15f | 2019-03-05 15:42:58 -0800 | [diff] [blame] | 54 | #include <linux/numa.h> |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 55 | |
| 56 | static DEFINE_MUTEX(dma_list_mutex); |
Matthew Wilcox | adc064c | 2016-12-15 08:57:51 -0800 | [diff] [blame] | 57 | static DEFINE_IDA(dma_ida); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 58 | static LIST_HEAD(dma_device_list); |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 59 | static long dmaengine_ref_count; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 60 | |
| 61 | /* --- sysfs implementation --- */ |
| 62 | |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 63 | /** |
Geert Uytterhoeven | fe33338 | 2019-06-07 13:30:39 +0200 | [diff] [blame] | 64 | * dev_to_dma_chan - convert a device pointer to its sysfs container object |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 65 | * @dev - device node |
| 66 | * |
| 67 | * Must be called under dma_list_mutex |
| 68 | */ |
| 69 | static struct dma_chan *dev_to_dma_chan(struct device *dev) |
| 70 | { |
| 71 | struct dma_chan_dev *chan_dev; |
| 72 | |
| 73 | chan_dev = container_of(dev, typeof(*chan_dev), device); |
| 74 | return chan_dev->chan; |
| 75 | } |
| 76 | |
Greg Kroah-Hartman | 58b267d | 2013-07-24 15:05:08 -0700 | [diff] [blame] | 77 | static ssize_t memcpy_count_show(struct device *dev, |
| 78 | struct device_attribute *attr, char *buf) |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 79 | { |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 80 | struct dma_chan *chan; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 81 | unsigned long count = 0; |
| 82 | int i; |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 83 | int err; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 84 | |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 85 | mutex_lock(&dma_list_mutex); |
| 86 | chan = dev_to_dma_chan(dev); |
| 87 | if (chan) { |
| 88 | for_each_possible_cpu(i) |
| 89 | count += per_cpu_ptr(chan->local, i)->memcpy_count; |
| 90 | err = sprintf(buf, "%lu\n", count); |
| 91 | } else |
| 92 | err = -ENODEV; |
| 93 | mutex_unlock(&dma_list_mutex); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 94 | |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 95 | return err; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 96 | } |
Greg Kroah-Hartman | 58b267d | 2013-07-24 15:05:08 -0700 | [diff] [blame] | 97 | static DEVICE_ATTR_RO(memcpy_count); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 98 | |
Greg Kroah-Hartman | 58b267d | 2013-07-24 15:05:08 -0700 | [diff] [blame] | 99 | static ssize_t bytes_transferred_show(struct device *dev, |
| 100 | struct device_attribute *attr, char *buf) |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 101 | { |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 102 | struct dma_chan *chan; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 103 | unsigned long count = 0; |
| 104 | int i; |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 105 | int err; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 106 | |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 107 | mutex_lock(&dma_list_mutex); |
| 108 | chan = dev_to_dma_chan(dev); |
| 109 | if (chan) { |
| 110 | for_each_possible_cpu(i) |
| 111 | count += per_cpu_ptr(chan->local, i)->bytes_transferred; |
| 112 | err = sprintf(buf, "%lu\n", count); |
| 113 | } else |
| 114 | err = -ENODEV; |
| 115 | mutex_unlock(&dma_list_mutex); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 116 | |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 117 | return err; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 118 | } |
Greg Kroah-Hartman | 58b267d | 2013-07-24 15:05:08 -0700 | [diff] [blame] | 119 | static DEVICE_ATTR_RO(bytes_transferred); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 120 | |
Greg Kroah-Hartman | 58b267d | 2013-07-24 15:05:08 -0700 | [diff] [blame] | 121 | static ssize_t in_use_show(struct device *dev, struct device_attribute *attr, |
| 122 | char *buf) |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 123 | { |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 124 | struct dma_chan *chan; |
| 125 | int err; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 126 | |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 127 | mutex_lock(&dma_list_mutex); |
| 128 | chan = dev_to_dma_chan(dev); |
| 129 | if (chan) |
| 130 | err = sprintf(buf, "%d\n", chan->client_count); |
| 131 | else |
| 132 | err = -ENODEV; |
| 133 | mutex_unlock(&dma_list_mutex); |
| 134 | |
| 135 | return err; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 136 | } |
Greg Kroah-Hartman | 58b267d | 2013-07-24 15:05:08 -0700 | [diff] [blame] | 137 | static DEVICE_ATTR_RO(in_use); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 138 | |
Greg Kroah-Hartman | 58b267d | 2013-07-24 15:05:08 -0700 | [diff] [blame] | 139 | static struct attribute *dma_dev_attrs[] = { |
| 140 | &dev_attr_memcpy_count.attr, |
| 141 | &dev_attr_bytes_transferred.attr, |
| 142 | &dev_attr_in_use.attr, |
| 143 | NULL, |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 144 | }; |
Greg Kroah-Hartman | 58b267d | 2013-07-24 15:05:08 -0700 | [diff] [blame] | 145 | ATTRIBUTE_GROUPS(dma_dev); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 146 | |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 147 | static void chan_dev_release(struct device *dev) |
| 148 | { |
| 149 | struct dma_chan_dev *chan_dev; |
| 150 | |
| 151 | chan_dev = container_of(dev, typeof(*chan_dev), device); |
Dan Williams | 864498a | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 152 | if (atomic_dec_and_test(chan_dev->idr_ref)) { |
Matthew Wilcox | 485258b | 2018-06-18 15:41:48 -0400 | [diff] [blame] | 153 | ida_free(&dma_ida, chan_dev->dev_id); |
Dan Williams | 864498a | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 154 | kfree(chan_dev->idr_ref); |
| 155 | } |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 156 | kfree(chan_dev); |
| 157 | } |
| 158 | |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 159 | static struct class dma_devclass = { |
Tony Jones | 891f78e | 2007-09-25 02:03:03 +0200 | [diff] [blame] | 160 | .name = "dma", |
Greg Kroah-Hartman | 58b267d | 2013-07-24 15:05:08 -0700 | [diff] [blame] | 161 | .dev_groups = dma_dev_groups, |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 162 | .dev_release = chan_dev_release, |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 163 | }; |
| 164 | |
| 165 | /* --- client and device registration --- */ |
| 166 | |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 167 | #define dma_device_satisfies_mask(device, mask) \ |
| 168 | __dma_device_satisfies_mask((device), &(mask)) |
Dan Williams | d379b01 | 2007-07-09 11:56:42 -0700 | [diff] [blame] | 169 | static int |
Lars-Peter Clausen | a53e28d | 2013-03-25 13:23:52 +0100 | [diff] [blame] | 170 | __dma_device_satisfies_mask(struct dma_device *device, |
| 171 | const dma_cap_mask_t *want) |
Dan Williams | d379b01 | 2007-07-09 11:56:42 -0700 | [diff] [blame] | 172 | { |
| 173 | dma_cap_mask_t has; |
| 174 | |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 175 | bitmap_and(has.bits, want->bits, device->cap_mask.bits, |
Dan Williams | d379b01 | 2007-07-09 11:56:42 -0700 | [diff] [blame] | 176 | DMA_TX_TYPE_END); |
| 177 | return bitmap_equal(want->bits, has.bits, DMA_TX_TYPE_END); |
| 178 | } |
| 179 | |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 180 | static struct module *dma_chan_to_owner(struct dma_chan *chan) |
| 181 | { |
| 182 | return chan->device->dev->driver->owner; |
| 183 | } |
| 184 | |
| 185 | /** |
| 186 | * balance_ref_count - catch up the channel reference count |
| 187 | * @chan - channel to balance ->client_count versus dmaengine_ref_count |
| 188 | * |
| 189 | * balance_ref_count must be called under dma_list_mutex |
| 190 | */ |
| 191 | static void balance_ref_count(struct dma_chan *chan) |
| 192 | { |
| 193 | struct module *owner = dma_chan_to_owner(chan); |
| 194 | |
| 195 | while (chan->client_count < dmaengine_ref_count) { |
| 196 | __module_get(owner); |
| 197 | chan->client_count++; |
| 198 | } |
| 199 | } |
| 200 | |
| 201 | /** |
| 202 | * dma_chan_get - try to grab a dma channel's parent driver module |
| 203 | * @chan - channel to grab |
| 204 | * |
| 205 | * Must be called under dma_list_mutex |
| 206 | */ |
| 207 | static int dma_chan_get(struct dma_chan *chan) |
| 208 | { |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 209 | struct module *owner = dma_chan_to_owner(chan); |
Maxime Ripard | d2f4f99 | 2014-11-17 14:41:58 +0100 | [diff] [blame] | 210 | int ret; |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 211 | |
Maxime Ripard | d2f4f99 | 2014-11-17 14:41:58 +0100 | [diff] [blame] | 212 | /* The channel is already in use, update client count */ |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 213 | if (chan->client_count) { |
| 214 | __module_get(owner); |
Maxime Ripard | d2f4f99 | 2014-11-17 14:41:58 +0100 | [diff] [blame] | 215 | goto out; |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 216 | } |
| 217 | |
Maxime Ripard | d2f4f99 | 2014-11-17 14:41:58 +0100 | [diff] [blame] | 218 | if (!try_module_get(owner)) |
| 219 | return -ENODEV; |
| 220 | |
| 221 | /* allocate upon first client reference */ |
Maxime Ripard | c4b54a6 | 2014-11-17 14:41:59 +0100 | [diff] [blame] | 222 | if (chan->device->device_alloc_chan_resources) { |
| 223 | ret = chan->device->device_alloc_chan_resources(chan); |
| 224 | if (ret < 0) |
| 225 | goto err_out; |
| 226 | } |
Maxime Ripard | d2f4f99 | 2014-11-17 14:41:58 +0100 | [diff] [blame] | 227 | |
| 228 | if (!dma_has_cap(DMA_PRIVATE, chan->device->cap_mask)) |
| 229 | balance_ref_count(chan); |
| 230 | |
| 231 | out: |
| 232 | chan->client_count++; |
| 233 | return 0; |
| 234 | |
| 235 | err_out: |
| 236 | module_put(owner); |
| 237 | return ret; |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 238 | } |
| 239 | |
| 240 | /** |
| 241 | * dma_chan_put - drop a reference to a dma channel's parent driver module |
| 242 | * @chan - channel to release |
| 243 | * |
| 244 | * Must be called under dma_list_mutex |
| 245 | */ |
| 246 | static void dma_chan_put(struct dma_chan *chan) |
| 247 | { |
Maxime Ripard | c4b54a6 | 2014-11-17 14:41:59 +0100 | [diff] [blame] | 248 | /* This channel is not in use, bail out */ |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 249 | if (!chan->client_count) |
Maxime Ripard | c4b54a6 | 2014-11-17 14:41:59 +0100 | [diff] [blame] | 250 | return; |
| 251 | |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 252 | chan->client_count--; |
| 253 | module_put(dma_chan_to_owner(chan)); |
Maxime Ripard | c4b54a6 | 2014-11-17 14:41:59 +0100 | [diff] [blame] | 254 | |
| 255 | /* This channel is not in use anymore, free it */ |
Lars-Peter Clausen | b36f09c | 2015-10-20 11:46:28 +0200 | [diff] [blame] | 256 | if (!chan->client_count && chan->device->device_free_chan_resources) { |
| 257 | /* Make sure all operations have completed */ |
| 258 | dmaengine_synchronize(chan); |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 259 | chan->device->device_free_chan_resources(chan); |
Lars-Peter Clausen | b36f09c | 2015-10-20 11:46:28 +0200 | [diff] [blame] | 260 | } |
Peter Ujfalusi | 56f13c0 | 2015-04-09 12:35:47 +0300 | [diff] [blame] | 261 | |
| 262 | /* If the channel is used via a DMA request router, free the mapping */ |
| 263 | if (chan->router && chan->router->route_free) { |
| 264 | chan->router->route_free(chan->router->dev, chan->route_data); |
| 265 | chan->router = NULL; |
| 266 | chan->route_data = NULL; |
| 267 | } |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 268 | } |
| 269 | |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 270 | enum dma_status dma_sync_wait(struct dma_chan *chan, dma_cookie_t cookie) |
| 271 | { |
| 272 | enum dma_status status; |
| 273 | unsigned long dma_sync_wait_timeout = jiffies + msecs_to_jiffies(5000); |
| 274 | |
| 275 | dma_async_issue_pending(chan); |
| 276 | do { |
| 277 | status = dma_async_is_tx_complete(chan, cookie, NULL, NULL); |
| 278 | if (time_after_eq(jiffies, dma_sync_wait_timeout)) { |
Jarkko Nikula | ef85931 | 2016-03-14 16:51:09 +0200 | [diff] [blame] | 279 | dev_err(chan->device->dev, "%s: timeout!\n", __func__); |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 280 | return DMA_ERROR; |
| 281 | } |
Bartlomiej Zolnierkiewicz | 2cbe7fe | 2012-11-08 10:02:07 +0000 | [diff] [blame] | 282 | if (status != DMA_IN_PROGRESS) |
| 283 | break; |
| 284 | cpu_relax(); |
| 285 | } while (1); |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 286 | |
| 287 | return status; |
| 288 | } |
| 289 | EXPORT_SYMBOL(dma_sync_wait); |
| 290 | |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 291 | /** |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 292 | * dma_cap_mask_all - enable iteration over all operation types |
| 293 | */ |
| 294 | static dma_cap_mask_t dma_cap_mask_all; |
| 295 | |
| 296 | /** |
| 297 | * dma_chan_tbl_ent - tracks channel allocations per core/operation |
| 298 | * @chan - associated channel for this entry |
| 299 | */ |
| 300 | struct dma_chan_tbl_ent { |
| 301 | struct dma_chan *chan; |
| 302 | }; |
| 303 | |
| 304 | /** |
| 305 | * channel_table - percpu lookup table for memory-to-memory offload providers |
| 306 | */ |
Tejun Heo | a29d8b8 | 2010-02-02 14:39:15 +0900 | [diff] [blame] | 307 | static struct dma_chan_tbl_ent __percpu *channel_table[DMA_TX_TYPE_END]; |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 308 | |
| 309 | static int __init dma_channel_table_init(void) |
| 310 | { |
| 311 | enum dma_transaction_type cap; |
| 312 | int err = 0; |
| 313 | |
| 314 | bitmap_fill(dma_cap_mask_all.bits, DMA_TX_TYPE_END); |
| 315 | |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 316 | /* 'interrupt', 'private', and 'slave' are channel capabilities, |
| 317 | * but are not associated with an operation so they do not need |
| 318 | * an entry in the channel_table |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 319 | */ |
| 320 | clear_bit(DMA_INTERRUPT, dma_cap_mask_all.bits); |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 321 | clear_bit(DMA_PRIVATE, dma_cap_mask_all.bits); |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 322 | clear_bit(DMA_SLAVE, dma_cap_mask_all.bits); |
| 323 | |
| 324 | for_each_dma_cap_mask(cap, dma_cap_mask_all) { |
| 325 | channel_table[cap] = alloc_percpu(struct dma_chan_tbl_ent); |
| 326 | if (!channel_table[cap]) { |
| 327 | err = -ENOMEM; |
| 328 | break; |
| 329 | } |
| 330 | } |
| 331 | |
| 332 | if (err) { |
Joe Perches | 6343325 | 2012-07-18 09:51:28 -0700 | [diff] [blame] | 333 | pr_err("initialization failure\n"); |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 334 | for_each_dma_cap_mask(cap, dma_cap_mask_all) |
Markus Elfring | a9507ca | 2014-12-01 06:06:57 +0100 | [diff] [blame] | 335 | free_percpu(channel_table[cap]); |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 336 | } |
| 337 | |
| 338 | return err; |
| 339 | } |
Dan Williams | 652afc2 | 2009-01-06 11:38:22 -0700 | [diff] [blame] | 340 | arch_initcall(dma_channel_table_init); |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 341 | |
| 342 | /** |
| 343 | * dma_find_channel - find a channel to carry out the operation |
| 344 | * @tx_type: transaction type |
| 345 | */ |
| 346 | struct dma_chan *dma_find_channel(enum dma_transaction_type tx_type) |
| 347 | { |
Christoph Lameter | e7dcaa4 | 2009-10-03 19:48:23 +0900 | [diff] [blame] | 348 | return this_cpu_read(channel_table[tx_type]->chan); |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 349 | } |
| 350 | EXPORT_SYMBOL(dma_find_channel); |
| 351 | |
| 352 | /** |
Dan Williams | 2ba0562 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 353 | * dma_issue_pending_all - flush all pending operations across all channels |
| 354 | */ |
| 355 | void dma_issue_pending_all(void) |
| 356 | { |
| 357 | struct dma_device *device; |
| 358 | struct dma_chan *chan; |
| 359 | |
Dan Williams | 2ba0562 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 360 | rcu_read_lock(); |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 361 | list_for_each_entry_rcu(device, &dma_device_list, global_node) { |
| 362 | if (dma_has_cap(DMA_PRIVATE, device->cap_mask)) |
| 363 | continue; |
Dan Williams | 2ba0562 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 364 | list_for_each_entry(chan, &device->channels, device_node) |
| 365 | if (chan->client_count) |
| 366 | device->device_issue_pending(chan); |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 367 | } |
Dan Williams | 2ba0562 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 368 | rcu_read_unlock(); |
| 369 | } |
| 370 | EXPORT_SYMBOL(dma_issue_pending_all); |
| 371 | |
| 372 | /** |
Brice Goglin | c4d27c4 | 2013-08-19 11:43:35 +0200 | [diff] [blame] | 373 | * dma_chan_is_local - returns true if the channel is in the same numa-node as the cpu |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 374 | */ |
Brice Goglin | c4d27c4 | 2013-08-19 11:43:35 +0200 | [diff] [blame] | 375 | static bool dma_chan_is_local(struct dma_chan *chan, int cpu) |
| 376 | { |
| 377 | int node = dev_to_node(chan->device->dev); |
Anshuman Khandual | 98fa15f | 2019-03-05 15:42:58 -0800 | [diff] [blame] | 378 | return node == NUMA_NO_NODE || |
| 379 | cpumask_test_cpu(cpu, cpumask_of_node(node)); |
Brice Goglin | c4d27c4 | 2013-08-19 11:43:35 +0200 | [diff] [blame] | 380 | } |
| 381 | |
| 382 | /** |
| 383 | * min_chan - returns the channel with min count and in the same numa-node as the cpu |
| 384 | * @cap: capability to match |
| 385 | * @cpu: cpu index which the channel should be close to |
| 386 | * |
| 387 | * If some channels are close to the given cpu, the one with the lowest |
| 388 | * reference count is returned. Otherwise, cpu is ignored and only the |
| 389 | * reference count is taken into account. |
| 390 | * Must be called under dma_list_mutex. |
| 391 | */ |
| 392 | static struct dma_chan *min_chan(enum dma_transaction_type cap, int cpu) |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 393 | { |
| 394 | struct dma_device *device; |
| 395 | struct dma_chan *chan; |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 396 | struct dma_chan *min = NULL; |
Brice Goglin | c4d27c4 | 2013-08-19 11:43:35 +0200 | [diff] [blame] | 397 | struct dma_chan *localmin = NULL; |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 398 | |
| 399 | list_for_each_entry(device, &dma_device_list, global_node) { |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 400 | if (!dma_has_cap(cap, device->cap_mask) || |
| 401 | dma_has_cap(DMA_PRIVATE, device->cap_mask)) |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 402 | continue; |
| 403 | list_for_each_entry(chan, &device->channels, device_node) { |
| 404 | if (!chan->client_count) |
| 405 | continue; |
Brice Goglin | c4d27c4 | 2013-08-19 11:43:35 +0200 | [diff] [blame] | 406 | if (!min || chan->table_count < min->table_count) |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 407 | min = chan; |
| 408 | |
Brice Goglin | c4d27c4 | 2013-08-19 11:43:35 +0200 | [diff] [blame] | 409 | if (dma_chan_is_local(chan, cpu)) |
| 410 | if (!localmin || |
| 411 | chan->table_count < localmin->table_count) |
| 412 | localmin = chan; |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 413 | } |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 414 | } |
| 415 | |
Brice Goglin | c4d27c4 | 2013-08-19 11:43:35 +0200 | [diff] [blame] | 416 | chan = localmin ? localmin : min; |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 417 | |
Brice Goglin | c4d27c4 | 2013-08-19 11:43:35 +0200 | [diff] [blame] | 418 | if (chan) |
| 419 | chan->table_count++; |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 420 | |
Brice Goglin | c4d27c4 | 2013-08-19 11:43:35 +0200 | [diff] [blame] | 421 | return chan; |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 422 | } |
| 423 | |
| 424 | /** |
| 425 | * dma_channel_rebalance - redistribute the available channels |
| 426 | * |
| 427 | * Optimize for cpu isolation (each cpu gets a dedicated channel for an |
| 428 | * operation type) in the SMP case, and operation isolation (avoid |
| 429 | * multi-tasking channels) in the non-SMP case. Must be called under |
| 430 | * dma_list_mutex. |
| 431 | */ |
| 432 | static void dma_channel_rebalance(void) |
| 433 | { |
| 434 | struct dma_chan *chan; |
| 435 | struct dma_device *device; |
| 436 | int cpu; |
| 437 | int cap; |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 438 | |
| 439 | /* undo the last distribution */ |
| 440 | for_each_dma_cap_mask(cap, dma_cap_mask_all) |
| 441 | for_each_possible_cpu(cpu) |
| 442 | per_cpu_ptr(channel_table[cap], cpu)->chan = NULL; |
| 443 | |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 444 | list_for_each_entry(device, &dma_device_list, global_node) { |
| 445 | if (dma_has_cap(DMA_PRIVATE, device->cap_mask)) |
| 446 | continue; |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 447 | list_for_each_entry(chan, &device->channels, device_node) |
| 448 | chan->table_count = 0; |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 449 | } |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 450 | |
| 451 | /* don't populate the channel_table if no clients are available */ |
| 452 | if (!dmaengine_ref_count) |
| 453 | return; |
| 454 | |
| 455 | /* redistribute available channels */ |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 456 | for_each_dma_cap_mask(cap, dma_cap_mask_all) |
| 457 | for_each_online_cpu(cpu) { |
Brice Goglin | c4d27c4 | 2013-08-19 11:43:35 +0200 | [diff] [blame] | 458 | chan = min_chan(cap, cpu); |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 459 | per_cpu_ptr(channel_table[cap], cpu)->chan = chan; |
| 460 | } |
| 461 | } |
| 462 | |
Laurent Pinchart | 0d5484b | 2014-10-29 00:30:58 +0200 | [diff] [blame] | 463 | int dma_get_slave_caps(struct dma_chan *chan, struct dma_slave_caps *caps) |
| 464 | { |
| 465 | struct dma_device *device; |
| 466 | |
| 467 | if (!chan || !caps) |
| 468 | return -EINVAL; |
| 469 | |
| 470 | device = chan->device; |
| 471 | |
| 472 | /* check if the channel supports slave transactions */ |
Andy Shevchenko | dd4e91d | 2016-05-10 20:43:34 +0300 | [diff] [blame] | 473 | if (!(test_bit(DMA_SLAVE, device->cap_mask.bits) || |
| 474 | test_bit(DMA_CYCLIC, device->cap_mask.bits))) |
Laurent Pinchart | 0d5484b | 2014-10-29 00:30:58 +0200 | [diff] [blame] | 475 | return -ENXIO; |
| 476 | |
| 477 | /* |
| 478 | * Check whether it reports it uses the generic slave |
| 479 | * capabilities, if not, that means it doesn't support any |
| 480 | * kind of slave capabilities reporting. |
| 481 | */ |
| 482 | if (!device->directions) |
| 483 | return -ENXIO; |
| 484 | |
| 485 | caps->src_addr_widths = device->src_addr_widths; |
| 486 | caps->dst_addr_widths = device->dst_addr_widths; |
| 487 | caps->directions = device->directions; |
Shawn Lin | 6d5bbed | 2016-01-22 19:06:50 +0800 | [diff] [blame] | 488 | caps->max_burst = device->max_burst; |
Laurent Pinchart | 0d5484b | 2014-10-29 00:30:58 +0200 | [diff] [blame] | 489 | caps->residue_granularity = device->residue_granularity; |
Robert Jarzmik | 9eeacd3 | 2015-10-13 21:54:29 +0200 | [diff] [blame] | 490 | caps->descriptor_reuse = device->descriptor_reuse; |
Marek Szyprowski | d8095f9 | 2018-07-02 15:08:10 +0200 | [diff] [blame] | 491 | caps->cmd_pause = !!device->device_pause; |
| 492 | caps->cmd_resume = !!device->device_resume; |
Laurent Pinchart | 0d5484b | 2014-10-29 00:30:58 +0200 | [diff] [blame] | 493 | caps->cmd_terminate = !!device->device_terminate_all; |
| 494 | |
| 495 | return 0; |
| 496 | } |
| 497 | EXPORT_SYMBOL_GPL(dma_get_slave_caps); |
| 498 | |
Lars-Peter Clausen | a53e28d | 2013-03-25 13:23:52 +0100 | [diff] [blame] | 499 | static struct dma_chan *private_candidate(const dma_cap_mask_t *mask, |
| 500 | struct dma_device *dev, |
Dan Williams | e234667 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 501 | dma_filter_fn fn, void *fn_param) |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 502 | { |
| 503 | struct dma_chan *chan; |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 504 | |
Peter Ujfalusi | 26b6425 | 2015-12-14 22:47:38 +0200 | [diff] [blame] | 505 | if (mask && !__dma_device_satisfies_mask(dev, mask)) { |
Jarkko Nikula | ef85931 | 2016-03-14 16:51:09 +0200 | [diff] [blame] | 506 | dev_dbg(dev->dev, "%s: wrong capabilities\n", __func__); |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 507 | return NULL; |
| 508 | } |
| 509 | /* devices with multiple channels need special handling as we need to |
| 510 | * ensure that all channels are either private or public. |
| 511 | */ |
| 512 | if (dev->chancnt > 1 && !dma_has_cap(DMA_PRIVATE, dev->cap_mask)) |
| 513 | list_for_each_entry(chan, &dev->channels, device_node) { |
| 514 | /* some channels are already publicly allocated */ |
| 515 | if (chan->client_count) |
| 516 | return NULL; |
| 517 | } |
| 518 | |
| 519 | list_for_each_entry(chan, &dev->channels, device_node) { |
| 520 | if (chan->client_count) { |
Jarkko Nikula | ef85931 | 2016-03-14 16:51:09 +0200 | [diff] [blame] | 521 | dev_dbg(dev->dev, "%s: %s busy\n", |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 522 | __func__, dma_chan_name(chan)); |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 523 | continue; |
| 524 | } |
Dan Williams | e234667 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 525 | if (fn && !fn(chan, fn_param)) { |
Jarkko Nikula | ef85931 | 2016-03-14 16:51:09 +0200 | [diff] [blame] | 526 | dev_dbg(dev->dev, "%s: %s filter said false\n", |
Dan Williams | e234667 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 527 | __func__, dma_chan_name(chan)); |
| 528 | continue; |
| 529 | } |
| 530 | return chan; |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 531 | } |
| 532 | |
Dan Williams | e234667 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 533 | return NULL; |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 534 | } |
| 535 | |
Peter Ujfalusi | 7bd903c | 2015-12-14 22:47:39 +0200 | [diff] [blame] | 536 | static struct dma_chan *find_candidate(struct dma_device *device, |
| 537 | const dma_cap_mask_t *mask, |
| 538 | dma_filter_fn fn, void *fn_param) |
| 539 | { |
| 540 | struct dma_chan *chan = private_candidate(mask, device, fn, fn_param); |
| 541 | int err; |
| 542 | |
| 543 | if (chan) { |
| 544 | /* Found a suitable channel, try to grab, prep, and return it. |
| 545 | * We first set DMA_PRIVATE to disable balance_ref_count as this |
| 546 | * channel will not be published in the general-purpose |
| 547 | * allocator |
| 548 | */ |
| 549 | dma_cap_set(DMA_PRIVATE, device->cap_mask); |
| 550 | device->privatecnt++; |
| 551 | err = dma_chan_get(chan); |
| 552 | |
| 553 | if (err) { |
| 554 | if (err == -ENODEV) { |
Jarkko Nikula | ef85931 | 2016-03-14 16:51:09 +0200 | [diff] [blame] | 555 | dev_dbg(device->dev, "%s: %s module removed\n", |
| 556 | __func__, dma_chan_name(chan)); |
Peter Ujfalusi | 7bd903c | 2015-12-14 22:47:39 +0200 | [diff] [blame] | 557 | list_del_rcu(&device->global_node); |
| 558 | } else |
Jarkko Nikula | ef85931 | 2016-03-14 16:51:09 +0200 | [diff] [blame] | 559 | dev_dbg(device->dev, |
| 560 | "%s: failed to get %s: (%d)\n", |
Peter Ujfalusi | 7bd903c | 2015-12-14 22:47:39 +0200 | [diff] [blame] | 561 | __func__, dma_chan_name(chan), err); |
| 562 | |
| 563 | if (--device->privatecnt == 0) |
| 564 | dma_cap_clear(DMA_PRIVATE, device->cap_mask); |
| 565 | |
| 566 | chan = ERR_PTR(err); |
| 567 | } |
| 568 | } |
| 569 | |
| 570 | return chan ? chan : ERR_PTR(-EPROBE_DEFER); |
| 571 | } |
| 572 | |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 573 | /** |
Stefan Agner | 19d643d | 2015-06-01 23:53:43 +0200 | [diff] [blame] | 574 | * dma_get_slave_channel - try to get specific channel exclusively |
Zhangfei Gao | 7bb587f | 2013-06-28 20:39:12 +0800 | [diff] [blame] | 575 | * @chan: target channel |
| 576 | */ |
| 577 | struct dma_chan *dma_get_slave_channel(struct dma_chan *chan) |
| 578 | { |
| 579 | int err = -EBUSY; |
| 580 | |
| 581 | /* lock against __dma_request_channel */ |
| 582 | mutex_lock(&dma_list_mutex); |
| 583 | |
Vinod Koul | d9a6c8f | 2013-08-19 10:47:26 +0530 | [diff] [blame] | 584 | if (chan->client_count == 0) { |
Peter Ujfalusi | 214fc4e | 2015-09-24 12:03:35 +0300 | [diff] [blame] | 585 | struct dma_device *device = chan->device; |
| 586 | |
| 587 | dma_cap_set(DMA_PRIVATE, device->cap_mask); |
| 588 | device->privatecnt++; |
Zhangfei Gao | 7bb587f | 2013-06-28 20:39:12 +0800 | [diff] [blame] | 589 | err = dma_chan_get(chan); |
Peter Ujfalusi | 214fc4e | 2015-09-24 12:03:35 +0300 | [diff] [blame] | 590 | if (err) { |
Jarkko Nikula | ef85931 | 2016-03-14 16:51:09 +0200 | [diff] [blame] | 591 | dev_dbg(chan->device->dev, |
| 592 | "%s: failed to get %s: (%d)\n", |
Vinod Koul | d9a6c8f | 2013-08-19 10:47:26 +0530 | [diff] [blame] | 593 | __func__, dma_chan_name(chan), err); |
Peter Ujfalusi | 214fc4e | 2015-09-24 12:03:35 +0300 | [diff] [blame] | 594 | chan = NULL; |
| 595 | if (--device->privatecnt == 0) |
| 596 | dma_cap_clear(DMA_PRIVATE, device->cap_mask); |
| 597 | } |
Vinod Koul | d9a6c8f | 2013-08-19 10:47:26 +0530 | [diff] [blame] | 598 | } else |
Zhangfei Gao | 7bb587f | 2013-06-28 20:39:12 +0800 | [diff] [blame] | 599 | chan = NULL; |
| 600 | |
| 601 | mutex_unlock(&dma_list_mutex); |
| 602 | |
Zhangfei Gao | 7bb587f | 2013-06-28 20:39:12 +0800 | [diff] [blame] | 603 | |
| 604 | return chan; |
| 605 | } |
| 606 | EXPORT_SYMBOL_GPL(dma_get_slave_channel); |
| 607 | |
Stephen Warren | 8010dad | 2013-11-26 12:40:51 -0700 | [diff] [blame] | 608 | struct dma_chan *dma_get_any_slave_channel(struct dma_device *device) |
| 609 | { |
| 610 | dma_cap_mask_t mask; |
| 611 | struct dma_chan *chan; |
Stephen Warren | 8010dad | 2013-11-26 12:40:51 -0700 | [diff] [blame] | 612 | |
| 613 | dma_cap_zero(mask); |
| 614 | dma_cap_set(DMA_SLAVE, mask); |
| 615 | |
| 616 | /* lock against __dma_request_channel */ |
| 617 | mutex_lock(&dma_list_mutex); |
| 618 | |
Peter Ujfalusi | 7bd903c | 2015-12-14 22:47:39 +0200 | [diff] [blame] | 619 | chan = find_candidate(device, &mask, NULL, NULL); |
Stephen Warren | 8010dad | 2013-11-26 12:40:51 -0700 | [diff] [blame] | 620 | |
| 621 | mutex_unlock(&dma_list_mutex); |
| 622 | |
Peter Ujfalusi | 7bd903c | 2015-12-14 22:47:39 +0200 | [diff] [blame] | 623 | return IS_ERR(chan) ? NULL : chan; |
Stephen Warren | 8010dad | 2013-11-26 12:40:51 -0700 | [diff] [blame] | 624 | } |
| 625 | EXPORT_SYMBOL_GPL(dma_get_any_slave_channel); |
| 626 | |
Zhangfei Gao | 7bb587f | 2013-06-28 20:39:12 +0800 | [diff] [blame] | 627 | /** |
Daniel Mack | 6b9019a | 2013-08-14 18:35:03 +0200 | [diff] [blame] | 628 | * __dma_request_channel - try to allocate an exclusive channel |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 629 | * @mask: capabilities that the channel must satisfy |
| 630 | * @fn: optional callback to disposition available channels |
| 631 | * @fn_param: opaque parameter to pass to dma_filter_fn |
Baolin Wang | f515131 | 2019-05-20 19:32:14 +0800 | [diff] [blame] | 632 | * @np: device node to look for DMA channels |
Stephen Warren | 0ad7c00 | 2013-11-26 10:04:22 -0700 | [diff] [blame] | 633 | * |
| 634 | * Returns pointer to appropriate DMA channel on success or NULL. |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 635 | */ |
Lars-Peter Clausen | a53e28d | 2013-03-25 13:23:52 +0100 | [diff] [blame] | 636 | struct dma_chan *__dma_request_channel(const dma_cap_mask_t *mask, |
Baolin Wang | f515131 | 2019-05-20 19:32:14 +0800 | [diff] [blame] | 637 | dma_filter_fn fn, void *fn_param, |
| 638 | struct device_node *np) |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 639 | { |
| 640 | struct dma_device *device, *_d; |
| 641 | struct dma_chan *chan = NULL; |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 642 | |
| 643 | /* Find a channel */ |
| 644 | mutex_lock(&dma_list_mutex); |
| 645 | list_for_each_entry_safe(device, _d, &dma_device_list, global_node) { |
Baolin Wang | f515131 | 2019-05-20 19:32:14 +0800 | [diff] [blame] | 646 | /* Finds a DMA controller with matching device node */ |
| 647 | if (np && device->dev->of_node && np != device->dev->of_node) |
| 648 | continue; |
| 649 | |
Peter Ujfalusi | 7bd903c | 2015-12-14 22:47:39 +0200 | [diff] [blame] | 650 | chan = find_candidate(device, mask, fn, fn_param); |
| 651 | if (!IS_ERR(chan)) |
| 652 | break; |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 653 | |
Peter Ujfalusi | 7bd903c | 2015-12-14 22:47:39 +0200 | [diff] [blame] | 654 | chan = NULL; |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 655 | } |
| 656 | mutex_unlock(&dma_list_mutex); |
| 657 | |
Jarkko Nikula | 4c4d7f87 | 2016-04-07 16:49:43 +0300 | [diff] [blame] | 658 | pr_debug("%s: %s (%s)\n", |
Joe Perches | 6343325 | 2012-07-18 09:51:28 -0700 | [diff] [blame] | 659 | __func__, |
| 660 | chan ? "success" : "fail", |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 661 | chan ? dma_chan_name(chan) : NULL); |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 662 | |
| 663 | return chan; |
| 664 | } |
| 665 | EXPORT_SYMBOL_GPL(__dma_request_channel); |
| 666 | |
Peter Ujfalusi | a8135d0 | 2015-12-14 22:47:40 +0200 | [diff] [blame] | 667 | static const struct dma_slave_map *dma_filter_match(struct dma_device *device, |
| 668 | const char *name, |
| 669 | struct device *dev) |
| 670 | { |
| 671 | int i; |
| 672 | |
| 673 | if (!device->filter.mapcnt) |
| 674 | return NULL; |
| 675 | |
| 676 | for (i = 0; i < device->filter.mapcnt; i++) { |
| 677 | const struct dma_slave_map *map = &device->filter.map[i]; |
| 678 | |
| 679 | if (!strcmp(map->devname, dev_name(dev)) && |
| 680 | !strcmp(map->slave, name)) |
| 681 | return map; |
| 682 | } |
| 683 | |
| 684 | return NULL; |
| 685 | } |
| 686 | |
Jon Hunter | 9a6cecc | 2012-09-14 17:41:57 -0500 | [diff] [blame] | 687 | /** |
Peter Ujfalusi | a8135d0 | 2015-12-14 22:47:40 +0200 | [diff] [blame] | 688 | * dma_request_chan - try to allocate an exclusive slave channel |
Jon Hunter | 9a6cecc | 2012-09-14 17:41:57 -0500 | [diff] [blame] | 689 | * @dev: pointer to client device structure |
| 690 | * @name: slave channel name |
Stephen Warren | 0ad7c00 | 2013-11-26 10:04:22 -0700 | [diff] [blame] | 691 | * |
| 692 | * Returns pointer to appropriate DMA channel on success or an error pointer. |
Jon Hunter | 9a6cecc | 2012-09-14 17:41:57 -0500 | [diff] [blame] | 693 | */ |
Peter Ujfalusi | a8135d0 | 2015-12-14 22:47:40 +0200 | [diff] [blame] | 694 | struct dma_chan *dma_request_chan(struct device *dev, const char *name) |
Jon Hunter | 9a6cecc | 2012-09-14 17:41:57 -0500 | [diff] [blame] | 695 | { |
Peter Ujfalusi | a8135d0 | 2015-12-14 22:47:40 +0200 | [diff] [blame] | 696 | struct dma_device *d, *_d; |
| 697 | struct dma_chan *chan = NULL; |
| 698 | |
Jon Hunter | 9a6cecc | 2012-09-14 17:41:57 -0500 | [diff] [blame] | 699 | /* If device-tree is present get slave info from here */ |
| 700 | if (dev->of_node) |
Peter Ujfalusi | a8135d0 | 2015-12-14 22:47:40 +0200 | [diff] [blame] | 701 | chan = of_dma_request_slave_channel(dev->of_node, name); |
Jon Hunter | 9a6cecc | 2012-09-14 17:41:57 -0500 | [diff] [blame] | 702 | |
Andy Shevchenko | 4e82f5d | 2013-04-09 14:05:44 +0300 | [diff] [blame] | 703 | /* If device was enumerated by ACPI get slave info from here */ |
Peter Ujfalusi | a8135d0 | 2015-12-14 22:47:40 +0200 | [diff] [blame] | 704 | if (has_acpi_companion(dev) && !chan) |
| 705 | chan = acpi_dma_request_slave_chan_by_name(dev, name); |
Andy Shevchenko | 4e82f5d | 2013-04-09 14:05:44 +0300 | [diff] [blame] | 706 | |
Peter Ujfalusi | a8135d0 | 2015-12-14 22:47:40 +0200 | [diff] [blame] | 707 | if (chan) { |
Geert Uytterhoeven | fe33338 | 2019-06-07 13:30:39 +0200 | [diff] [blame] | 708 | /* Valid channel found or requester needs to be deferred */ |
Peter Ujfalusi | a8135d0 | 2015-12-14 22:47:40 +0200 | [diff] [blame] | 709 | if (!IS_ERR(chan) || PTR_ERR(chan) == -EPROBE_DEFER) |
| 710 | return chan; |
| 711 | } |
| 712 | |
| 713 | /* Try to find the channel via the DMA filter map(s) */ |
| 714 | mutex_lock(&dma_list_mutex); |
| 715 | list_for_each_entry_safe(d, _d, &dma_device_list, global_node) { |
| 716 | dma_cap_mask_t mask; |
| 717 | const struct dma_slave_map *map = dma_filter_match(d, name, dev); |
| 718 | |
| 719 | if (!map) |
| 720 | continue; |
| 721 | |
| 722 | dma_cap_zero(mask); |
| 723 | dma_cap_set(DMA_SLAVE, mask); |
| 724 | |
| 725 | chan = find_candidate(d, &mask, d->filter.fn, map->param); |
| 726 | if (!IS_ERR(chan)) |
| 727 | break; |
| 728 | } |
| 729 | mutex_unlock(&dma_list_mutex); |
| 730 | |
| 731 | return chan ? chan : ERR_PTR(-EPROBE_DEFER); |
Stephen Warren | 0ad7c00 | 2013-11-26 10:04:22 -0700 | [diff] [blame] | 732 | } |
Peter Ujfalusi | a8135d0 | 2015-12-14 22:47:40 +0200 | [diff] [blame] | 733 | EXPORT_SYMBOL_GPL(dma_request_chan); |
Stephen Warren | 0ad7c00 | 2013-11-26 10:04:22 -0700 | [diff] [blame] | 734 | |
| 735 | /** |
| 736 | * dma_request_slave_channel - try to allocate an exclusive slave channel |
| 737 | * @dev: pointer to client device structure |
| 738 | * @name: slave channel name |
| 739 | * |
| 740 | * Returns pointer to appropriate DMA channel on success or NULL. |
| 741 | */ |
| 742 | struct dma_chan *dma_request_slave_channel(struct device *dev, |
| 743 | const char *name) |
| 744 | { |
Peter Ujfalusi | a8135d0 | 2015-12-14 22:47:40 +0200 | [diff] [blame] | 745 | struct dma_chan *ch = dma_request_chan(dev, name); |
Stephen Warren | 0ad7c00 | 2013-11-26 10:04:22 -0700 | [diff] [blame] | 746 | if (IS_ERR(ch)) |
| 747 | return NULL; |
Robert Baldyga | 05aa1a7 | 2015-08-07 12:26:47 +0200 | [diff] [blame] | 748 | |
Stephen Warren | 0ad7c00 | 2013-11-26 10:04:22 -0700 | [diff] [blame] | 749 | return ch; |
Jon Hunter | 9a6cecc | 2012-09-14 17:41:57 -0500 | [diff] [blame] | 750 | } |
| 751 | EXPORT_SYMBOL_GPL(dma_request_slave_channel); |
| 752 | |
Peter Ujfalusi | a8135d0 | 2015-12-14 22:47:40 +0200 | [diff] [blame] | 753 | /** |
| 754 | * dma_request_chan_by_mask - allocate a channel satisfying certain capabilities |
| 755 | * @mask: capabilities that the channel must satisfy |
| 756 | * |
| 757 | * Returns pointer to appropriate DMA channel on success or an error pointer. |
| 758 | */ |
| 759 | struct dma_chan *dma_request_chan_by_mask(const dma_cap_mask_t *mask) |
| 760 | { |
| 761 | struct dma_chan *chan; |
| 762 | |
| 763 | if (!mask) |
| 764 | return ERR_PTR(-ENODEV); |
| 765 | |
Baolin Wang | f515131 | 2019-05-20 19:32:14 +0800 | [diff] [blame] | 766 | chan = __dma_request_channel(mask, NULL, NULL, NULL); |
Peter Ujfalusi | ec8ca8e | 2018-07-18 12:29:57 +0300 | [diff] [blame] | 767 | if (!chan) { |
| 768 | mutex_lock(&dma_list_mutex); |
| 769 | if (list_empty(&dma_device_list)) |
| 770 | chan = ERR_PTR(-EPROBE_DEFER); |
| 771 | else |
| 772 | chan = ERR_PTR(-ENODEV); |
| 773 | mutex_unlock(&dma_list_mutex); |
| 774 | } |
Peter Ujfalusi | a8135d0 | 2015-12-14 22:47:40 +0200 | [diff] [blame] | 775 | |
| 776 | return chan; |
| 777 | } |
| 778 | EXPORT_SYMBOL_GPL(dma_request_chan_by_mask); |
| 779 | |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 780 | void dma_release_channel(struct dma_chan *chan) |
| 781 | { |
| 782 | mutex_lock(&dma_list_mutex); |
| 783 | WARN_ONCE(chan->client_count != 1, |
| 784 | "chan reference count %d != 1\n", chan->client_count); |
| 785 | dma_chan_put(chan); |
Atsushi Nemoto | 0f57151 | 2009-03-06 20:07:14 +0900 | [diff] [blame] | 786 | /* drop PRIVATE cap enabled by __dma_request_channel() */ |
| 787 | if (--chan->device->privatecnt == 0) |
| 788 | dma_cap_clear(DMA_PRIVATE, chan->device->cap_mask); |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 789 | mutex_unlock(&dma_list_mutex); |
| 790 | } |
| 791 | EXPORT_SYMBOL_GPL(dma_release_channel); |
| 792 | |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 793 | /** |
Dan Williams | 209b84a | 2009-01-06 11:38:17 -0700 | [diff] [blame] | 794 | * dmaengine_get - register interest in dma_channels |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 795 | */ |
Dan Williams | 209b84a | 2009-01-06 11:38:17 -0700 | [diff] [blame] | 796 | void dmaengine_get(void) |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 797 | { |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 798 | struct dma_device *device, *_d; |
| 799 | struct dma_chan *chan; |
| 800 | int err; |
| 801 | |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 802 | mutex_lock(&dma_list_mutex); |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 803 | dmaengine_ref_count++; |
| 804 | |
| 805 | /* try to grab channels */ |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 806 | list_for_each_entry_safe(device, _d, &dma_device_list, global_node) { |
| 807 | if (dma_has_cap(DMA_PRIVATE, device->cap_mask)) |
| 808 | continue; |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 809 | list_for_each_entry(chan, &device->channels, device_node) { |
| 810 | err = dma_chan_get(chan); |
| 811 | if (err == -ENODEV) { |
| 812 | /* module removed before we could use it */ |
Dan Williams | 2ba0562 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 813 | list_del_rcu(&device->global_node); |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 814 | break; |
| 815 | } else if (err) |
Jarkko Nikula | ef85931 | 2016-03-14 16:51:09 +0200 | [diff] [blame] | 816 | dev_dbg(chan->device->dev, |
| 817 | "%s: failed to get %s: (%d)\n", |
| 818 | __func__, dma_chan_name(chan), err); |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 819 | } |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 820 | } |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 821 | |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 822 | /* if this is the first reference and there were channels |
| 823 | * waiting we need to rebalance to get those channels |
| 824 | * incorporated into the channel table |
| 825 | */ |
| 826 | if (dmaengine_ref_count == 1) |
| 827 | dma_channel_rebalance(); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 828 | mutex_unlock(&dma_list_mutex); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 829 | } |
Dan Williams | 209b84a | 2009-01-06 11:38:17 -0700 | [diff] [blame] | 830 | EXPORT_SYMBOL(dmaengine_get); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 831 | |
| 832 | /** |
Dan Williams | 209b84a | 2009-01-06 11:38:17 -0700 | [diff] [blame] | 833 | * dmaengine_put - let dma drivers be removed when ref_count == 0 |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 834 | */ |
Dan Williams | 209b84a | 2009-01-06 11:38:17 -0700 | [diff] [blame] | 835 | void dmaengine_put(void) |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 836 | { |
Dan Williams | d379b01 | 2007-07-09 11:56:42 -0700 | [diff] [blame] | 837 | struct dma_device *device; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 838 | struct dma_chan *chan; |
| 839 | |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 840 | mutex_lock(&dma_list_mutex); |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 841 | dmaengine_ref_count--; |
| 842 | BUG_ON(dmaengine_ref_count < 0); |
| 843 | /* drop channel references */ |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 844 | list_for_each_entry(device, &dma_device_list, global_node) { |
| 845 | if (dma_has_cap(DMA_PRIVATE, device->cap_mask)) |
| 846 | continue; |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 847 | list_for_each_entry(chan, &device->channels, device_node) |
| 848 | dma_chan_put(chan); |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 849 | } |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 850 | mutex_unlock(&dma_list_mutex); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 851 | } |
Dan Williams | 209b84a | 2009-01-06 11:38:17 -0700 | [diff] [blame] | 852 | EXPORT_SYMBOL(dmaengine_put); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 853 | |
Dan Williams | 138f4c3 | 2009-09-08 17:42:51 -0700 | [diff] [blame] | 854 | static bool device_has_all_tx_types(struct dma_device *device) |
| 855 | { |
| 856 | /* A device that satisfies this test has channels that will never cause |
| 857 | * an async_tx channel switch event as all possible operation types can |
| 858 | * be handled. |
| 859 | */ |
| 860 | #ifdef CONFIG_ASYNC_TX_DMA |
| 861 | if (!dma_has_cap(DMA_INTERRUPT, device->cap_mask)) |
| 862 | return false; |
| 863 | #endif |
| 864 | |
Javier Martinez Canillas | d57d3a4 | 2016-05-11 13:39:27 -0400 | [diff] [blame] | 865 | #if IS_ENABLED(CONFIG_ASYNC_MEMCPY) |
Dan Williams | 138f4c3 | 2009-09-08 17:42:51 -0700 | [diff] [blame] | 866 | if (!dma_has_cap(DMA_MEMCPY, device->cap_mask)) |
| 867 | return false; |
| 868 | #endif |
| 869 | |
Javier Martinez Canillas | d57d3a4 | 2016-05-11 13:39:27 -0400 | [diff] [blame] | 870 | #if IS_ENABLED(CONFIG_ASYNC_XOR) |
Dan Williams | 138f4c3 | 2009-09-08 17:42:51 -0700 | [diff] [blame] | 871 | if (!dma_has_cap(DMA_XOR, device->cap_mask)) |
| 872 | return false; |
Dan Williams | 7b3cc2b | 2009-11-19 17:10:37 -0700 | [diff] [blame] | 873 | |
| 874 | #ifndef CONFIG_ASYNC_TX_DISABLE_XOR_VAL_DMA |
Dan Williams | 4499a24 | 2009-11-19 17:10:25 -0700 | [diff] [blame] | 875 | if (!dma_has_cap(DMA_XOR_VAL, device->cap_mask)) |
| 876 | return false; |
Dan Williams | 138f4c3 | 2009-09-08 17:42:51 -0700 | [diff] [blame] | 877 | #endif |
Dan Williams | 7b3cc2b | 2009-11-19 17:10:37 -0700 | [diff] [blame] | 878 | #endif |
Dan Williams | 138f4c3 | 2009-09-08 17:42:51 -0700 | [diff] [blame] | 879 | |
Javier Martinez Canillas | d57d3a4 | 2016-05-11 13:39:27 -0400 | [diff] [blame] | 880 | #if IS_ENABLED(CONFIG_ASYNC_PQ) |
Dan Williams | 138f4c3 | 2009-09-08 17:42:51 -0700 | [diff] [blame] | 881 | if (!dma_has_cap(DMA_PQ, device->cap_mask)) |
| 882 | return false; |
Dan Williams | 7b3cc2b | 2009-11-19 17:10:37 -0700 | [diff] [blame] | 883 | |
| 884 | #ifndef CONFIG_ASYNC_TX_DISABLE_PQ_VAL_DMA |
Dan Williams | 4499a24 | 2009-11-19 17:10:25 -0700 | [diff] [blame] | 885 | if (!dma_has_cap(DMA_PQ_VAL, device->cap_mask)) |
| 886 | return false; |
Dan Williams | 138f4c3 | 2009-09-08 17:42:51 -0700 | [diff] [blame] | 887 | #endif |
Dan Williams | 7b3cc2b | 2009-11-19 17:10:37 -0700 | [diff] [blame] | 888 | #endif |
Dan Williams | 138f4c3 | 2009-09-08 17:42:51 -0700 | [diff] [blame] | 889 | |
| 890 | return true; |
| 891 | } |
| 892 | |
Dan Williams | 257b17c | 2009-03-25 09:13:23 -0700 | [diff] [blame] | 893 | static int get_dma_id(struct dma_device *device) |
| 894 | { |
Matthew Wilcox | 485258b | 2018-06-18 15:41:48 -0400 | [diff] [blame] | 895 | int rc = ida_alloc(&dma_ida, GFP_KERNEL); |
Dan Williams | 257b17c | 2009-03-25 09:13:23 -0700 | [diff] [blame] | 896 | |
Matthew Wilcox | 485258b | 2018-06-18 15:41:48 -0400 | [diff] [blame] | 897 | if (rc < 0) |
| 898 | return rc; |
| 899 | device->dev_id = rc; |
| 900 | return 0; |
Dan Williams | 257b17c | 2009-03-25 09:13:23 -0700 | [diff] [blame] | 901 | } |
| 902 | |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 903 | /** |
Randy Dunlap | 6508871 | 2006-07-03 19:45:31 -0700 | [diff] [blame] | 904 | * dma_async_device_register - registers DMA devices found |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 905 | * @device: &dma_device |
| 906 | */ |
| 907 | int dma_async_device_register(struct dma_device *device) |
| 908 | { |
Jeff Garzik | ff487fb | 2007-03-08 09:57:34 -0800 | [diff] [blame] | 909 | int chancnt = 0, rc; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 910 | struct dma_chan* chan; |
Dan Williams | 864498a | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 911 | atomic_t *idr_ref; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 912 | |
| 913 | if (!device) |
| 914 | return -ENODEV; |
| 915 | |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 916 | /* validate device routines */ |
Vinod Koul | 3eeb515 | 2017-08-27 16:55:32 +0530 | [diff] [blame] | 917 | if (!device->dev) { |
| 918 | pr_err("DMAdevice must have dev\n"); |
| 919 | return -EIO; |
| 920 | } |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 921 | |
Vinod Koul | 3eeb515 | 2017-08-27 16:55:32 +0530 | [diff] [blame] | 922 | if (dma_has_cap(DMA_MEMCPY, device->cap_mask) && !device->device_prep_dma_memcpy) { |
| 923 | dev_err(device->dev, |
| 924 | "Device claims capability %s, but op is not defined\n", |
| 925 | "DMA_MEMCPY"); |
| 926 | return -EIO; |
| 927 | } |
| 928 | |
| 929 | if (dma_has_cap(DMA_XOR, device->cap_mask) && !device->device_prep_dma_xor) { |
| 930 | dev_err(device->dev, |
| 931 | "Device claims capability %s, but op is not defined\n", |
| 932 | "DMA_XOR"); |
| 933 | return -EIO; |
| 934 | } |
| 935 | |
| 936 | if (dma_has_cap(DMA_XOR_VAL, device->cap_mask) && !device->device_prep_dma_xor_val) { |
| 937 | dev_err(device->dev, |
| 938 | "Device claims capability %s, but op is not defined\n", |
| 939 | "DMA_XOR_VAL"); |
| 940 | return -EIO; |
| 941 | } |
| 942 | |
| 943 | if (dma_has_cap(DMA_PQ, device->cap_mask) && !device->device_prep_dma_pq) { |
| 944 | dev_err(device->dev, |
| 945 | "Device claims capability %s, but op is not defined\n", |
| 946 | "DMA_PQ"); |
| 947 | return -EIO; |
| 948 | } |
| 949 | |
| 950 | if (dma_has_cap(DMA_PQ_VAL, device->cap_mask) && !device->device_prep_dma_pq_val) { |
| 951 | dev_err(device->dev, |
| 952 | "Device claims capability %s, but op is not defined\n", |
| 953 | "DMA_PQ_VAL"); |
| 954 | return -EIO; |
| 955 | } |
| 956 | |
| 957 | if (dma_has_cap(DMA_MEMSET, device->cap_mask) && !device->device_prep_dma_memset) { |
| 958 | dev_err(device->dev, |
| 959 | "Device claims capability %s, but op is not defined\n", |
| 960 | "DMA_MEMSET"); |
| 961 | return -EIO; |
| 962 | } |
| 963 | |
| 964 | if (dma_has_cap(DMA_INTERRUPT, device->cap_mask) && !device->device_prep_dma_interrupt) { |
| 965 | dev_err(device->dev, |
| 966 | "Device claims capability %s, but op is not defined\n", |
| 967 | "DMA_INTERRUPT"); |
| 968 | return -EIO; |
| 969 | } |
| 970 | |
| 971 | if (dma_has_cap(DMA_CYCLIC, device->cap_mask) && !device->device_prep_dma_cyclic) { |
| 972 | dev_err(device->dev, |
| 973 | "Device claims capability %s, but op is not defined\n", |
| 974 | "DMA_CYCLIC"); |
| 975 | return -EIO; |
| 976 | } |
| 977 | |
| 978 | if (dma_has_cap(DMA_INTERLEAVE, device->cap_mask) && !device->device_prep_interleaved_dma) { |
| 979 | dev_err(device->dev, |
| 980 | "Device claims capability %s, but op is not defined\n", |
| 981 | "DMA_INTERLEAVE"); |
| 982 | return -EIO; |
| 983 | } |
| 984 | |
| 985 | |
| 986 | if (!device->device_tx_status) { |
| 987 | dev_err(device->dev, "Device tx_status is not defined\n"); |
| 988 | return -EIO; |
| 989 | } |
| 990 | |
| 991 | |
| 992 | if (!device->device_issue_pending) { |
| 993 | dev_err(device->dev, "Device issue_pending is not defined\n"); |
| 994 | return -EIO; |
| 995 | } |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 996 | |
Dan Williams | 138f4c3 | 2009-09-08 17:42:51 -0700 | [diff] [blame] | 997 | /* note: this only matters in the |
Dan Williams | 5fc6d89 | 2010-10-07 16:44:50 -0700 | [diff] [blame] | 998 | * CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH=n case |
Dan Williams | 138f4c3 | 2009-09-08 17:42:51 -0700 | [diff] [blame] | 999 | */ |
| 1000 | if (device_has_all_tx_types(device)) |
| 1001 | dma_cap_set(DMA_ASYNC_TX, device->cap_mask); |
| 1002 | |
Dan Williams | 864498a | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 1003 | idr_ref = kmalloc(sizeof(*idr_ref), GFP_KERNEL); |
| 1004 | if (!idr_ref) |
| 1005 | return -ENOMEM; |
Dan Williams | 257b17c | 2009-03-25 09:13:23 -0700 | [diff] [blame] | 1006 | rc = get_dma_id(device); |
| 1007 | if (rc != 0) { |
| 1008 | kfree(idr_ref); |
Dan Williams | 864498a | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 1009 | return rc; |
Dan Williams | 257b17c | 2009-03-25 09:13:23 -0700 | [diff] [blame] | 1010 | } |
| 1011 | |
| 1012 | atomic_set(idr_ref, 0); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 1013 | |
| 1014 | /* represent channels in sysfs. Probably want devs too */ |
| 1015 | list_for_each_entry(chan, &device->channels, device_node) { |
Dan Williams | 257b17c | 2009-03-25 09:13:23 -0700 | [diff] [blame] | 1016 | rc = -ENOMEM; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 1017 | chan->local = alloc_percpu(typeof(*chan->local)); |
| 1018 | if (chan->local == NULL) |
Dan Williams | 257b17c | 2009-03-25 09:13:23 -0700 | [diff] [blame] | 1019 | goto err_out; |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 1020 | chan->dev = kzalloc(sizeof(*chan->dev), GFP_KERNEL); |
| 1021 | if (chan->dev == NULL) { |
| 1022 | free_percpu(chan->local); |
Dan Williams | 257b17c | 2009-03-25 09:13:23 -0700 | [diff] [blame] | 1023 | chan->local = NULL; |
| 1024 | goto err_out; |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 1025 | } |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 1026 | |
| 1027 | chan->chan_id = chancnt++; |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 1028 | chan->dev->device.class = &dma_devclass; |
| 1029 | chan->dev->device.parent = device->dev; |
| 1030 | chan->dev->chan = chan; |
Dan Williams | 864498a | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 1031 | chan->dev->idr_ref = idr_ref; |
| 1032 | chan->dev->dev_id = device->dev_id; |
| 1033 | atomic_inc(idr_ref); |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 1034 | dev_set_name(&chan->dev->device, "dma%dchan%d", |
Kay Sievers | 06190d8 | 2008-11-11 13:12:33 -0700 | [diff] [blame] | 1035 | device->dev_id, chan->chan_id); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 1036 | |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 1037 | rc = device_register(&chan->dev->device); |
Jeff Garzik | ff487fb | 2007-03-08 09:57:34 -0800 | [diff] [blame] | 1038 | if (rc) { |
Jeff Garzik | ff487fb | 2007-03-08 09:57:34 -0800 | [diff] [blame] | 1039 | free_percpu(chan->local); |
| 1040 | chan->local = NULL; |
Dan Williams | 257b17c | 2009-03-25 09:13:23 -0700 | [diff] [blame] | 1041 | kfree(chan->dev); |
| 1042 | atomic_dec(idr_ref); |
Jeff Garzik | ff487fb | 2007-03-08 09:57:34 -0800 | [diff] [blame] | 1043 | goto err_out; |
| 1044 | } |
Dan Williams | 7cc5bf9 | 2008-07-08 11:58:21 -0700 | [diff] [blame] | 1045 | chan->client_count = 0; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 1046 | } |
Viresh Kumar | 76d7b84 | 2016-07-27 14:32:58 -0700 | [diff] [blame] | 1047 | |
| 1048 | if (!chancnt) { |
| 1049 | dev_err(device->dev, "%s: device has no channels!\n", __func__); |
| 1050 | rc = -ENODEV; |
| 1051 | goto err_out; |
| 1052 | } |
| 1053 | |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 1054 | device->chancnt = chancnt; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 1055 | |
| 1056 | mutex_lock(&dma_list_mutex); |
Dan Williams | 59b5ec2 | 2009-01-06 11:38:15 -0700 | [diff] [blame] | 1057 | /* take references on public channels */ |
| 1058 | if (dmaengine_ref_count && !dma_has_cap(DMA_PRIVATE, device->cap_mask)) |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 1059 | list_for_each_entry(chan, &device->channels, device_node) { |
| 1060 | /* if clients are already waiting for channels we need |
| 1061 | * to take references on their behalf |
| 1062 | */ |
| 1063 | if (dma_chan_get(chan) == -ENODEV) { |
| 1064 | /* note we can only get here for the first |
| 1065 | * channel as the remaining channels are |
| 1066 | * guaranteed to get a reference |
| 1067 | */ |
| 1068 | rc = -ENODEV; |
| 1069 | mutex_unlock(&dma_list_mutex); |
| 1070 | goto err_out; |
| 1071 | } |
| 1072 | } |
Dan Williams | 2ba0562 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 1073 | list_add_tail_rcu(&device->global_node, &dma_device_list); |
Atsushi Nemoto | 0f57151 | 2009-03-06 20:07:14 +0900 | [diff] [blame] | 1074 | if (dma_has_cap(DMA_PRIVATE, device->cap_mask)) |
| 1075 | device->privatecnt++; /* Always private */ |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 1076 | dma_channel_rebalance(); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 1077 | mutex_unlock(&dma_list_mutex); |
| 1078 | |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 1079 | return 0; |
Jeff Garzik | ff487fb | 2007-03-08 09:57:34 -0800 | [diff] [blame] | 1080 | |
| 1081 | err_out: |
Dan Williams | 257b17c | 2009-03-25 09:13:23 -0700 | [diff] [blame] | 1082 | /* if we never registered a channel just release the idr */ |
| 1083 | if (atomic_read(idr_ref) == 0) { |
Matthew Wilcox | 485258b | 2018-06-18 15:41:48 -0400 | [diff] [blame] | 1084 | ida_free(&dma_ida, device->dev_id); |
Dan Williams | 257b17c | 2009-03-25 09:13:23 -0700 | [diff] [blame] | 1085 | kfree(idr_ref); |
| 1086 | return rc; |
| 1087 | } |
| 1088 | |
Jeff Garzik | ff487fb | 2007-03-08 09:57:34 -0800 | [diff] [blame] | 1089 | list_for_each_entry(chan, &device->channels, device_node) { |
| 1090 | if (chan->local == NULL) |
| 1091 | continue; |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 1092 | mutex_lock(&dma_list_mutex); |
| 1093 | chan->dev->chan = NULL; |
| 1094 | mutex_unlock(&dma_list_mutex); |
| 1095 | device_unregister(&chan->dev->device); |
Jeff Garzik | ff487fb | 2007-03-08 09:57:34 -0800 | [diff] [blame] | 1096 | free_percpu(chan->local); |
| 1097 | } |
| 1098 | return rc; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 1099 | } |
David Brownell | 765e3d8 | 2007-03-16 13:38:05 -0800 | [diff] [blame] | 1100 | EXPORT_SYMBOL(dma_async_device_register); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 1101 | |
| 1102 | /** |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 1103 | * dma_async_device_unregister - unregister a DMA device |
Randy Dunlap | 6508871 | 2006-07-03 19:45:31 -0700 | [diff] [blame] | 1104 | * @device: &dma_device |
Dan Williams | f27c580 | 2009-01-06 11:38:18 -0700 | [diff] [blame] | 1105 | * |
| 1106 | * This routine is called by dma driver exit routines, dmaengine holds module |
| 1107 | * references to prevent it being called while channels are in use. |
Randy Dunlap | 6508871 | 2006-07-03 19:45:31 -0700 | [diff] [blame] | 1108 | */ |
| 1109 | void dma_async_device_unregister(struct dma_device *device) |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 1110 | { |
| 1111 | struct dma_chan *chan; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 1112 | |
| 1113 | mutex_lock(&dma_list_mutex); |
Dan Williams | 2ba0562 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 1114 | list_del_rcu(&device->global_node); |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 1115 | dma_channel_rebalance(); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 1116 | mutex_unlock(&dma_list_mutex); |
| 1117 | |
| 1118 | list_for_each_entry(chan, &device->channels, device_node) { |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 1119 | WARN_ONCE(chan->client_count, |
| 1120 | "%s called while %d clients hold a reference\n", |
| 1121 | __func__, chan->client_count); |
Dan Williams | 41d5e59 | 2009-01-06 11:38:21 -0700 | [diff] [blame] | 1122 | mutex_lock(&dma_list_mutex); |
| 1123 | chan->dev->chan = NULL; |
| 1124 | mutex_unlock(&dma_list_mutex); |
| 1125 | device_unregister(&chan->dev->device); |
Anatolij Gustschin | adef477 | 2010-01-26 10:26:06 +0100 | [diff] [blame] | 1126 | free_percpu(chan->local); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 1127 | } |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 1128 | } |
David Brownell | 765e3d8 | 2007-03-16 13:38:05 -0800 | [diff] [blame] | 1129 | EXPORT_SYMBOL(dma_async_device_unregister); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 1130 | |
Huang Shijie | f39b948 | 2018-07-26 14:45:53 +0800 | [diff] [blame] | 1131 | static void dmam_device_release(struct device *dev, void *res) |
| 1132 | { |
| 1133 | struct dma_device *device; |
| 1134 | |
| 1135 | device = *(struct dma_device **)res; |
| 1136 | dma_async_device_unregister(device); |
| 1137 | } |
| 1138 | |
| 1139 | /** |
| 1140 | * dmaenginem_async_device_register - registers DMA devices found |
| 1141 | * @device: &dma_device |
| 1142 | * |
| 1143 | * The operation is managed and will be undone on driver detach. |
| 1144 | */ |
| 1145 | int dmaenginem_async_device_register(struct dma_device *device) |
| 1146 | { |
| 1147 | void *p; |
| 1148 | int ret; |
| 1149 | |
| 1150 | p = devres_alloc(dmam_device_release, sizeof(void *), GFP_KERNEL); |
| 1151 | if (!p) |
| 1152 | return -ENOMEM; |
| 1153 | |
| 1154 | ret = dma_async_device_register(device); |
| 1155 | if (!ret) { |
| 1156 | *(struct dma_device **)p = device; |
| 1157 | devres_add(device->dev, p); |
| 1158 | } else { |
| 1159 | devres_free(p); |
| 1160 | } |
| 1161 | |
| 1162 | return ret; |
| 1163 | } |
| 1164 | EXPORT_SYMBOL(dmaenginem_async_device_register); |
| 1165 | |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1166 | struct dmaengine_unmap_pool { |
| 1167 | struct kmem_cache *cache; |
| 1168 | const char *name; |
| 1169 | mempool_t *pool; |
| 1170 | size_t size; |
| 1171 | }; |
| 1172 | |
| 1173 | #define __UNMAP_POOL(x) { .size = x, .name = "dmaengine-unmap-" __stringify(x) } |
| 1174 | static struct dmaengine_unmap_pool unmap_pool[] = { |
| 1175 | __UNMAP_POOL(2), |
Dan Williams | 3cc377b | 2013-12-09 10:33:16 -0800 | [diff] [blame] | 1176 | #if IS_ENABLED(CONFIG_DMA_ENGINE_RAID) |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1177 | __UNMAP_POOL(16), |
| 1178 | __UNMAP_POOL(128), |
| 1179 | __UNMAP_POOL(256), |
| 1180 | #endif |
| 1181 | }; |
| 1182 | |
| 1183 | static struct dmaengine_unmap_pool *__get_unmap_pool(int nr) |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1184 | { |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1185 | int order = get_count_order(nr); |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1186 | |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1187 | switch (order) { |
| 1188 | case 0 ... 1: |
| 1189 | return &unmap_pool[0]; |
Matthias Kaehlcke | 23f963e9 | 2017-03-13 14:30:29 -0700 | [diff] [blame] | 1190 | #if IS_ENABLED(CONFIG_DMA_ENGINE_RAID) |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1191 | case 2 ... 4: |
| 1192 | return &unmap_pool[1]; |
| 1193 | case 5 ... 7: |
| 1194 | return &unmap_pool[2]; |
| 1195 | case 8: |
| 1196 | return &unmap_pool[3]; |
Matthias Kaehlcke | 23f963e9 | 2017-03-13 14:30:29 -0700 | [diff] [blame] | 1197 | #endif |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1198 | default: |
| 1199 | BUG(); |
| 1200 | return NULL; |
| 1201 | } |
| 1202 | } |
Dan Williams | 0036731 | 2008-02-02 19:49:57 -0700 | [diff] [blame] | 1203 | |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1204 | static void dmaengine_unmap(struct kref *kref) |
| 1205 | { |
| 1206 | struct dmaengine_unmap_data *unmap = container_of(kref, typeof(*unmap), kref); |
| 1207 | struct device *dev = unmap->dev; |
| 1208 | int cnt, i; |
| 1209 | |
| 1210 | cnt = unmap->to_cnt; |
| 1211 | for (i = 0; i < cnt; i++) |
| 1212 | dma_unmap_page(dev, unmap->addr[i], unmap->len, |
| 1213 | DMA_TO_DEVICE); |
| 1214 | cnt += unmap->from_cnt; |
| 1215 | for (; i < cnt; i++) |
| 1216 | dma_unmap_page(dev, unmap->addr[i], unmap->len, |
| 1217 | DMA_FROM_DEVICE); |
| 1218 | cnt += unmap->bidi_cnt; |
Dan Williams | 7476bd7 | 2013-10-18 19:35:29 +0200 | [diff] [blame] | 1219 | for (; i < cnt; i++) { |
| 1220 | if (unmap->addr[i] == 0) |
| 1221 | continue; |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1222 | dma_unmap_page(dev, unmap->addr[i], unmap->len, |
| 1223 | DMA_BIDIRECTIONAL); |
Dan Williams | 7476bd7 | 2013-10-18 19:35:29 +0200 | [diff] [blame] | 1224 | } |
Xuelin Shi | c1f43dd | 2014-05-21 14:02:37 -0700 | [diff] [blame] | 1225 | cnt = unmap->map_cnt; |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1226 | mempool_free(unmap, __get_unmap_pool(cnt)->pool); |
| 1227 | } |
| 1228 | |
| 1229 | void dmaengine_unmap_put(struct dmaengine_unmap_data *unmap) |
| 1230 | { |
| 1231 | if (unmap) |
| 1232 | kref_put(&unmap->kref, dmaengine_unmap); |
| 1233 | } |
| 1234 | EXPORT_SYMBOL_GPL(dmaengine_unmap_put); |
| 1235 | |
| 1236 | static void dmaengine_destroy_unmap_pool(void) |
| 1237 | { |
| 1238 | int i; |
| 1239 | |
| 1240 | for (i = 0; i < ARRAY_SIZE(unmap_pool); i++) { |
| 1241 | struct dmaengine_unmap_pool *p = &unmap_pool[i]; |
| 1242 | |
Julia Lawall | 240eb916 | 2015-09-13 14:15:19 +0200 | [diff] [blame] | 1243 | mempool_destroy(p->pool); |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1244 | p->pool = NULL; |
Julia Lawall | 240eb916 | 2015-09-13 14:15:19 +0200 | [diff] [blame] | 1245 | kmem_cache_destroy(p->cache); |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1246 | p->cache = NULL; |
| 1247 | } |
| 1248 | } |
| 1249 | |
| 1250 | static int __init dmaengine_init_unmap_pool(void) |
| 1251 | { |
| 1252 | int i; |
| 1253 | |
| 1254 | for (i = 0; i < ARRAY_SIZE(unmap_pool); i++) { |
| 1255 | struct dmaengine_unmap_pool *p = &unmap_pool[i]; |
| 1256 | size_t size; |
| 1257 | |
| 1258 | size = sizeof(struct dmaengine_unmap_data) + |
| 1259 | sizeof(dma_addr_t) * p->size; |
| 1260 | |
| 1261 | p->cache = kmem_cache_create(p->name, size, 0, |
| 1262 | SLAB_HWCACHE_ALIGN, NULL); |
| 1263 | if (!p->cache) |
| 1264 | break; |
| 1265 | p->pool = mempool_create_slab_pool(1, p->cache); |
| 1266 | if (!p->pool) |
| 1267 | break; |
Dan Williams | 0036731 | 2008-02-02 19:49:57 -0700 | [diff] [blame] | 1268 | } |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1269 | |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1270 | if (i == ARRAY_SIZE(unmap_pool)) |
| 1271 | return 0; |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1272 | |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1273 | dmaengine_destroy_unmap_pool(); |
| 1274 | return -ENOMEM; |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1275 | } |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1276 | |
Dan Williams | 8971646 | 2013-10-18 19:35:25 +0200 | [diff] [blame] | 1277 | struct dmaengine_unmap_data * |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1278 | dmaengine_get_unmap_data(struct device *dev, int nr, gfp_t flags) |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1279 | { |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1280 | struct dmaengine_unmap_data *unmap; |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1281 | |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1282 | unmap = mempool_alloc(__get_unmap_pool(nr)->pool, flags); |
| 1283 | if (!unmap) |
| 1284 | return NULL; |
Dan Williams | 0036731 | 2008-02-02 19:49:57 -0700 | [diff] [blame] | 1285 | |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1286 | memset(unmap, 0, sizeof(*unmap)); |
| 1287 | kref_init(&unmap->kref); |
| 1288 | unmap->dev = dev; |
Xuelin Shi | c1f43dd | 2014-05-21 14:02:37 -0700 | [diff] [blame] | 1289 | unmap->map_cnt = nr; |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1290 | |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1291 | return unmap; |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1292 | } |
Dan Williams | 8971646 | 2013-10-18 19:35:25 +0200 | [diff] [blame] | 1293 | EXPORT_SYMBOL(dmaengine_get_unmap_data); |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1294 | |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1295 | void dma_async_tx_descriptor_init(struct dma_async_tx_descriptor *tx, |
| 1296 | struct dma_chan *chan) |
| 1297 | { |
| 1298 | tx->chan = chan; |
Dan Williams | 5fc6d89 | 2010-10-07 16:44:50 -0700 | [diff] [blame] | 1299 | #ifdef CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1300 | spin_lock_init(&tx->lock); |
Dan Williams | caa20d97 | 2010-05-17 16:24:16 -0700 | [diff] [blame] | 1301 | #endif |
Dan Williams | 7405f74 | 2007-01-02 11:10:43 -0700 | [diff] [blame] | 1302 | } |
| 1303 | EXPORT_SYMBOL(dma_async_tx_descriptor_init); |
| 1304 | |
Dan Williams | 07f2211 | 2009-01-05 17:14:31 -0700 | [diff] [blame] | 1305 | /* dma_wait_for_async_tx - spin wait for a transaction to complete |
| 1306 | * @tx: in-flight transaction to wait on |
Dan Williams | 07f2211 | 2009-01-05 17:14:31 -0700 | [diff] [blame] | 1307 | */ |
| 1308 | enum dma_status |
| 1309 | dma_wait_for_async_tx(struct dma_async_tx_descriptor *tx) |
| 1310 | { |
Dan Williams | 95475e5 | 2009-07-14 12:19:02 -0700 | [diff] [blame] | 1311 | unsigned long dma_sync_wait_timeout = jiffies + msecs_to_jiffies(5000); |
Dan Williams | 07f2211 | 2009-01-05 17:14:31 -0700 | [diff] [blame] | 1312 | |
| 1313 | if (!tx) |
Vinod Koul | adfedd9 | 2013-10-16 13:29:02 +0530 | [diff] [blame] | 1314 | return DMA_COMPLETE; |
Dan Williams | 07f2211 | 2009-01-05 17:14:31 -0700 | [diff] [blame] | 1315 | |
Dan Williams | 95475e5 | 2009-07-14 12:19:02 -0700 | [diff] [blame] | 1316 | while (tx->cookie == -EBUSY) { |
| 1317 | if (time_after_eq(jiffies, dma_sync_wait_timeout)) { |
Jarkko Nikula | ef85931 | 2016-03-14 16:51:09 +0200 | [diff] [blame] | 1318 | dev_err(tx->chan->device->dev, |
| 1319 | "%s timeout waiting for descriptor submission\n", |
| 1320 | __func__); |
Dan Williams | 95475e5 | 2009-07-14 12:19:02 -0700 | [diff] [blame] | 1321 | return DMA_ERROR; |
| 1322 | } |
| 1323 | cpu_relax(); |
| 1324 | } |
| 1325 | return dma_sync_wait(tx->chan, tx->cookie); |
Dan Williams | 07f2211 | 2009-01-05 17:14:31 -0700 | [diff] [blame] | 1326 | } |
| 1327 | EXPORT_SYMBOL_GPL(dma_wait_for_async_tx); |
| 1328 | |
| 1329 | /* dma_run_dependencies - helper routine for dma drivers to process |
| 1330 | * (start) dependent operations on their target channel |
| 1331 | * @tx: transaction with dependencies |
| 1332 | */ |
| 1333 | void dma_run_dependencies(struct dma_async_tx_descriptor *tx) |
| 1334 | { |
Dan Williams | caa20d97 | 2010-05-17 16:24:16 -0700 | [diff] [blame] | 1335 | struct dma_async_tx_descriptor *dep = txd_next(tx); |
Dan Williams | 07f2211 | 2009-01-05 17:14:31 -0700 | [diff] [blame] | 1336 | struct dma_async_tx_descriptor *dep_next; |
| 1337 | struct dma_chan *chan; |
| 1338 | |
| 1339 | if (!dep) |
| 1340 | return; |
| 1341 | |
Yuri Tikhonov | dd59b85 | 2009-01-12 15:17:20 -0700 | [diff] [blame] | 1342 | /* we'll submit tx->next now, so clear the link */ |
Dan Williams | caa20d97 | 2010-05-17 16:24:16 -0700 | [diff] [blame] | 1343 | txd_clear_next(tx); |
Dan Williams | 07f2211 | 2009-01-05 17:14:31 -0700 | [diff] [blame] | 1344 | chan = dep->chan; |
| 1345 | |
| 1346 | /* keep submitting up until a channel switch is detected |
| 1347 | * in that case we will be called again as a result of |
| 1348 | * processing the interrupt from async_tx_channel_switch |
| 1349 | */ |
| 1350 | for (; dep; dep = dep_next) { |
Dan Williams | caa20d97 | 2010-05-17 16:24:16 -0700 | [diff] [blame] | 1351 | txd_lock(dep); |
| 1352 | txd_clear_parent(dep); |
| 1353 | dep_next = txd_next(dep); |
Dan Williams | 07f2211 | 2009-01-05 17:14:31 -0700 | [diff] [blame] | 1354 | if (dep_next && dep_next->chan == chan) |
Dan Williams | caa20d97 | 2010-05-17 16:24:16 -0700 | [diff] [blame] | 1355 | txd_clear_next(dep); /* ->next will be submitted */ |
Dan Williams | 07f2211 | 2009-01-05 17:14:31 -0700 | [diff] [blame] | 1356 | else |
| 1357 | dep_next = NULL; /* submit current dep and terminate */ |
Dan Williams | caa20d97 | 2010-05-17 16:24:16 -0700 | [diff] [blame] | 1358 | txd_unlock(dep); |
Dan Williams | 07f2211 | 2009-01-05 17:14:31 -0700 | [diff] [blame] | 1359 | |
| 1360 | dep->tx_submit(dep); |
| 1361 | } |
| 1362 | |
| 1363 | chan->device->device_issue_pending(chan); |
| 1364 | } |
| 1365 | EXPORT_SYMBOL_GPL(dma_run_dependencies); |
| 1366 | |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 1367 | static int __init dma_bus_init(void) |
| 1368 | { |
Dan Williams | 45c463a | 2013-10-18 19:35:24 +0200 | [diff] [blame] | 1369 | int err = dmaengine_init_unmap_pool(); |
| 1370 | |
| 1371 | if (err) |
| 1372 | return err; |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 1373 | return class_register(&dma_devclass); |
| 1374 | } |
Dan Williams | 652afc2 | 2009-01-06 11:38:22 -0700 | [diff] [blame] | 1375 | arch_initcall(dma_bus_init); |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 1376 | |
Dan Williams | bec0851 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 1377 | |