SZ Lin | 0865196 | 2017-12-26 12:54:31 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2017 Moxa Inc. - https://www.moxa.com/ |
| 3 | * |
| 4 | * Author: Harry YJ Jhou (周亞諄) <harryyj.jhou@moxa.com> |
| 5 | * Jimmy Chen (陳永達) <jimmy.chen@moxa.com> |
| 6 | * SZ Lin (林上智) <sz.lin@moxa.com> |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License version 2 as |
| 10 | * published by the Free Software Foundation. |
| 11 | */ |
| 12 | |
| 13 | /dts-v1/; |
| 14 | |
| 15 | #include <dt-bindings/gpio/gpio.h> |
| 16 | #include <dt-bindings/input/input.h> |
| 17 | #include "ls1021a.dtsi" |
| 18 | |
| 19 | / { |
| 20 | model = "Moxa UC-8410A"; |
Manivannan Sadhasivam | da8782f | 2019-01-22 09:51:44 +0530 | [diff] [blame] | 21 | compatible = "fsl,ls1021a-moxa-uc-8410a", "fsl,ls1021a"; |
SZ Lin | 0865196 | 2017-12-26 12:54:31 +0800 | [diff] [blame] | 22 | |
| 23 | aliases { |
| 24 | enet0_rgmii_phy = &rgmii_phy0; |
| 25 | enet1_rgmii_phy = &rgmii_phy1; |
| 26 | enet2_rgmii_phy = &rgmii_phy2; |
| 27 | }; |
| 28 | |
| 29 | sys_mclk: clock-mclk { |
| 30 | compatible = "fixed-clock"; |
| 31 | #clock-cells = <0>; |
| 32 | clock-frequency = <24576000>; |
| 33 | }; |
| 34 | |
| 35 | reg_3p3v: regulator-3p3v { |
| 36 | compatible = "regulator-fixed"; |
| 37 | regulator-name = "3P3V"; |
| 38 | regulator-min-microvolt = <3300000>; |
| 39 | regulator-max-microvolt = <3300000>; |
| 40 | regulator-always-on; |
| 41 | }; |
| 42 | |
| 43 | leds { |
| 44 | compatible = "gpio-leds"; |
| 45 | |
| 46 | cel-pwr { |
| 47 | label = "UC8410A:CEL-PWR"; |
| 48 | gpios = <&gpio3 27 GPIO_ACTIVE_LOW>; |
| 49 | default-state = "off"; |
| 50 | }; |
| 51 | |
| 52 | cel-reset { |
| 53 | label = "UC8410A:CEL-RESET"; |
| 54 | gpios = <&gpio3 28 GPIO_ACTIVE_LOW>; |
| 55 | default-state = "off"; |
| 56 | }; |
| 57 | |
| 58 | str-led { |
| 59 | label = "UC8410A:RED:PROG"; |
| 60 | gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>; |
| 61 | linux,default-trigger = "mmc0"; |
| 62 | }; |
| 63 | |
| 64 | sw-ready { |
| 65 | label = "UC8410A:GREEN:SWRDY"; |
| 66 | gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>; |
| 67 | default-state = "on"; |
| 68 | }; |
| 69 | |
| 70 | beeper { |
| 71 | label = "UC8410A:BEEP"; |
| 72 | gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>; |
| 73 | default-state = "off"; |
| 74 | }; |
| 75 | |
| 76 | prog-led0 { |
| 77 | label = "UC8410A:GREEN:PROG2"; |
| 78 | gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>; |
| 79 | default-state = "off"; |
| 80 | }; |
| 81 | |
| 82 | prog-led1 { |
| 83 | label = "UC8410A:GREEN:PROG1"; |
| 84 | gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>; |
| 85 | default-state = "off"; |
| 86 | }; |
| 87 | |
| 88 | prog-led2 { |
| 89 | label = "UC8410A:GREEN:PROG0"; |
| 90 | gpios = <&gpio3 16 GPIO_ACTIVE_HIGH>; |
| 91 | default-state = "off"; |
| 92 | }; |
| 93 | |
| 94 | wifi-signal0 { |
| 95 | label = "UC8410A:GREEN:CEL2"; |
| 96 | gpios = <&gpio3 17 GPIO_ACTIVE_HIGH>; |
| 97 | default-state = "off"; |
| 98 | }; |
| 99 | |
| 100 | wifi-signal1 { |
| 101 | label = "UC8410A:GREEN:CEL1"; |
| 102 | gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>; |
| 103 | default-state = "off"; |
| 104 | }; |
| 105 | |
| 106 | wifi-signal2 { |
| 107 | label = "UC8410A:GREEN:CEL0"; |
| 108 | gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>; |
| 109 | default-state = "off"; |
| 110 | }; |
| 111 | |
| 112 | cpu-diag-red { |
| 113 | label = "UC8410A:RED:DIA"; |
| 114 | gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>; |
| 115 | default-state = "off"; |
| 116 | }; |
| 117 | |
| 118 | cpu-diag-green { |
| 119 | label = "UC8410A:GREEN:DIA"; |
| 120 | gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>; |
| 121 | default-state = "off"; |
| 122 | }; |
| 123 | |
| 124 | cpu-diag-yellow { |
| 125 | label = "UC8410A:YELLOW:DIA"; |
| 126 | gpios = <&gpio3 22 GPIO_ACTIVE_HIGH>; |
| 127 | default-state = "off"; |
| 128 | }; |
| 129 | }; |
| 130 | |
| 131 | gpio-keys { |
| 132 | compatible = "gpio-keys"; |
| 133 | |
| 134 | pushbtn-key { |
| 135 | label = "push button key"; |
| 136 | gpios = <&gpio1 21 GPIO_ACTIVE_LOW>; |
| 137 | linux,code = <BTN_MISC>; |
| 138 | default-state = "on"; |
| 139 | }; |
| 140 | }; |
| 141 | }; |
| 142 | |
| 143 | &enet0 { |
| 144 | phy-handle = <&rgmii_phy0>; |
| 145 | phy-connection-type = "rgmii-id"; |
| 146 | status = "okay"; |
| 147 | }; |
| 148 | |
| 149 | &enet1 { |
| 150 | phy-handle = <&rgmii_phy1>; |
| 151 | phy-connection-type = "rgmii-id"; |
| 152 | status = "okay"; |
| 153 | }; |
| 154 | |
| 155 | &enet2 { |
| 156 | phy-handle = <&rgmii_phy2>; |
| 157 | phy-connection-type = "rgmii-id"; |
| 158 | status = "okay"; |
| 159 | }; |
| 160 | |
| 161 | &i2c0 { |
| 162 | clock-frequency = <100000>; |
| 163 | status = "okay"; |
| 164 | |
| 165 | tpm@20 { |
| 166 | compatible = "infineon,slb9635tt"; |
| 167 | reg = <0x20>; |
| 168 | }; |
| 169 | |
| 170 | rtc@68 { |
| 171 | compatible = "dallas,ds1374"; |
| 172 | reg = <0x68>; |
| 173 | }; |
| 174 | }; |
| 175 | |
| 176 | &lpuart0 { |
| 177 | status = "okay"; |
| 178 | }; |
| 179 | |
| 180 | &mdio0 { |
| 181 | rgmii_phy0: ethernet-phy@0 { |
| 182 | compatible = "marvell,88e1118"; |
| 183 | reg = <0x0>; |
| 184 | marvell,reg-init = |
| 185 | <3 0x11 0 0x4415>, /* Reg 3,17 */ |
| 186 | <3 0x10 0 0x77>; /* Reg 3,16 */ |
| 187 | }; |
| 188 | |
| 189 | rgmii_phy1: ethernet-phy@1 { |
| 190 | compatible = "marvell,88e1118"; |
| 191 | reg = <0x1>; |
| 192 | marvell,reg-init = |
| 193 | <3 0x11 0 0x4415>, /* Reg 3,17 */ |
| 194 | <3 0x10 0 0x77>; /* Reg 3,16 */ |
| 195 | }; |
| 196 | |
| 197 | rgmii_phy2: ethernet-phy@2 { |
| 198 | compatible = "marvell,88e1118"; |
| 199 | reg = <0x2>; |
| 200 | marvell,reg-init = |
| 201 | <3 0x11 0 0x4415>, /* Reg 3,17 */ |
| 202 | <3 0x10 0 0x77>; /* Reg 3,16 */ |
| 203 | }; |
| 204 | }; |
| 205 | |
| 206 | &qspi { |
SZ Lin | 0865196 | 2017-12-26 12:54:31 +0800 | [diff] [blame] | 207 | fsl,qspi-has-second-chip; |
| 208 | status = "okay"; |
| 209 | |
| 210 | flash: flash@0 { |
| 211 | compatible = "spansion,s25fl064l", "spansion,s25fl164k"; |
| 212 | #address-cells = <1>; |
| 213 | #size-cells = <1>; |
| 214 | spi-max-frequency = <20000000>; |
Frieder Schrempf | 4f15a4e | 2018-12-10 16:28:50 +0000 | [diff] [blame] | 215 | spi-rx-bus-width = <4>; |
| 216 | spi-tx-bus-width = <4>; |
SZ Lin | 0865196 | 2017-12-26 12:54:31 +0800 | [diff] [blame] | 217 | reg = <0>; |
| 218 | |
| 219 | partitions@0 { |
| 220 | label = "U-Boot"; |
| 221 | reg = <0x0 0x180000>; |
| 222 | }; |
| 223 | |
| 224 | partitions@180000 { |
| 225 | label = "U-Boot Env"; |
| 226 | reg = <0x180000 0x680000>; |
| 227 | }; |
| 228 | }; |
| 229 | }; |
| 230 | |
| 231 | &sata { |
| 232 | status = "okay"; |
| 233 | }; |
| 234 | |
| 235 | &uart0 { |
| 236 | status = "okay"; |
| 237 | }; |
| 238 | |
| 239 | &uart1 { |
| 240 | status = "okay"; |
| 241 | }; |