blob: dd8ac5918ad81c8aeaab95e858e4e3ef15d828ae [file] [log] [blame]
Lu Baolu4786d2e2018-05-21 16:39:49 +03001// SPDX-License-Identifier: GPL-2.0
Lee Jonese57bde52020-07-03 18:41:33 +01002/*
Lu Baoludfba2172017-12-08 17:59:10 +02003 * xhci-dbgcap.c - xHCI debug capability support
4 *
5 * Copyright (C) 2017 Intel Corporation
6 *
7 * Author: Lu Baolu <baolu.lu@linux.intel.com>
8 */
9#include <linux/dma-mapping.h>
10#include <linux/slab.h>
11#include <linux/nls.h>
12
13#include "xhci.h"
14#include "xhci-trace.h"
15#include "xhci-dbgcap.h"
16
Lu Baoludfba2172017-12-08 17:59:10 +020017static u32 xhci_dbc_populate_strings(struct dbc_str_descs *strings)
18{
19 struct usb_string_descriptor *s_desc;
20 u32 string_length;
21
22 /* Serial string: */
23 s_desc = (struct usb_string_descriptor *)strings->serial;
24 utf8s_to_utf16s(DBC_STRING_SERIAL, strlen(DBC_STRING_SERIAL),
25 UTF16_LITTLE_ENDIAN, (wchar_t *)s_desc->wData,
26 DBC_MAX_STRING_LENGTH);
27
28 s_desc->bLength = (strlen(DBC_STRING_SERIAL) + 1) * 2;
29 s_desc->bDescriptorType = USB_DT_STRING;
30 string_length = s_desc->bLength;
31 string_length <<= 8;
32
33 /* Product string: */
34 s_desc = (struct usb_string_descriptor *)strings->product;
35 utf8s_to_utf16s(DBC_STRING_PRODUCT, strlen(DBC_STRING_PRODUCT),
36 UTF16_LITTLE_ENDIAN, (wchar_t *)s_desc->wData,
37 DBC_MAX_STRING_LENGTH);
38
39 s_desc->bLength = (strlen(DBC_STRING_PRODUCT) + 1) * 2;
40 s_desc->bDescriptorType = USB_DT_STRING;
41 string_length += s_desc->bLength;
42 string_length <<= 8;
43
44 /* Manufacture string: */
45 s_desc = (struct usb_string_descriptor *)strings->manufacturer;
46 utf8s_to_utf16s(DBC_STRING_MANUFACTURER,
47 strlen(DBC_STRING_MANUFACTURER),
48 UTF16_LITTLE_ENDIAN, (wchar_t *)s_desc->wData,
49 DBC_MAX_STRING_LENGTH);
50
51 s_desc->bLength = (strlen(DBC_STRING_MANUFACTURER) + 1) * 2;
52 s_desc->bDescriptorType = USB_DT_STRING;
53 string_length += s_desc->bLength;
54 string_length <<= 8;
55
56 /* String0: */
57 strings->string0[0] = 4;
58 strings->string0[1] = USB_DT_STRING;
59 strings->string0[2] = 0x09;
60 strings->string0[3] = 0x04;
61 string_length += 4;
62
63 return string_length;
64}
65
Mathias Nyman1da49a22020-07-23 17:45:13 +030066static void xhci_dbc_init_contexts(struct xhci_dbc *dbc, u32 string_length)
Lu Baoludfba2172017-12-08 17:59:10 +020067{
Lu Baoludfba2172017-12-08 17:59:10 +020068 struct dbc_info_context *info;
69 struct xhci_ep_ctx *ep_ctx;
70 u32 dev_info;
71 dma_addr_t deq, dma;
72 unsigned int max_burst;
73
Lu Baoludfba2172017-12-08 17:59:10 +020074 if (!dbc)
75 return;
76
77 /* Populate info Context: */
78 info = (struct dbc_info_context *)dbc->ctx->bytes;
79 dma = dbc->string_dma;
80 info->string0 = cpu_to_le64(dma);
81 info->manufacturer = cpu_to_le64(dma + DBC_MAX_STRING_LENGTH);
82 info->product = cpu_to_le64(dma + DBC_MAX_STRING_LENGTH * 2);
83 info->serial = cpu_to_le64(dma + DBC_MAX_STRING_LENGTH * 3);
84 info->length = cpu_to_le32(string_length);
85
86 /* Populate bulk out endpoint context: */
87 ep_ctx = dbc_bulkout_ctx(dbc);
88 max_burst = DBC_CTRL_MAXBURST(readl(&dbc->regs->control));
89 deq = dbc_bulkout_enq(dbc);
90 ep_ctx->ep_info = 0;
91 ep_ctx->ep_info2 = dbc_epctx_info2(BULK_OUT_EP, 1024, max_burst);
92 ep_ctx->deq = cpu_to_le64(deq | dbc->ring_out->cycle_state);
93
94 /* Populate bulk in endpoint context: */
95 ep_ctx = dbc_bulkin_ctx(dbc);
96 deq = dbc_bulkin_enq(dbc);
97 ep_ctx->ep_info = 0;
98 ep_ctx->ep_info2 = dbc_epctx_info2(BULK_IN_EP, 1024, max_burst);
99 ep_ctx->deq = cpu_to_le64(deq | dbc->ring_in->cycle_state);
100
101 /* Set DbC context and info registers: */
Mathias Nyman7cd63122020-07-23 17:45:12 +0300102 lo_hi_writeq(dbc->ctx->dma, &dbc->regs->dccp);
Lu Baoludfba2172017-12-08 17:59:10 +0200103
104 dev_info = cpu_to_le32((DBC_VENDOR_ID << 16) | DBC_PROTOCOL);
105 writel(dev_info, &dbc->regs->devinfo1);
106
107 dev_info = cpu_to_le32((DBC_DEVICE_REV << 16) | DBC_PRODUCT_ID);
108 writel(dev_info, &dbc->regs->devinfo2);
109}
110
111static void xhci_dbc_giveback(struct dbc_request *req, int status)
112 __releases(&dbc->lock)
113 __acquires(&dbc->lock)
114{
115 struct dbc_ep *dep = req->dep;
116 struct xhci_dbc *dbc = dep->dbc;
117 struct xhci_hcd *xhci = dbc->xhci;
118 struct device *dev = xhci_to_hcd(dbc->xhci)->self.sysdev;
119
120 list_del_init(&req->list_pending);
121 req->trb_dma = 0;
122 req->trb = NULL;
123
124 if (req->status == -EINPROGRESS)
125 req->status = status;
126
127 trace_xhci_dbc_giveback_request(req);
128
129 dma_unmap_single(dev,
130 req->dma,
131 req->length,
132 dbc_ep_dma_direction(dep));
133
134 /* Give back the transfer request: */
135 spin_unlock(&dbc->lock);
136 req->complete(xhci, req);
137 spin_lock(&dbc->lock);
138}
139
140static void xhci_dbc_flush_single_request(struct dbc_request *req)
141{
142 union xhci_trb *trb = req->trb;
143
144 trb->generic.field[0] = 0;
145 trb->generic.field[1] = 0;
146 trb->generic.field[2] = 0;
147 trb->generic.field[3] &= cpu_to_le32(TRB_CYCLE);
148 trb->generic.field[3] |= cpu_to_le32(TRB_TYPE(TRB_TR_NOOP));
149
150 xhci_dbc_giveback(req, -ESHUTDOWN);
151}
152
153static void xhci_dbc_flush_endpoint_requests(struct dbc_ep *dep)
154{
155 struct dbc_request *req, *tmp;
156
157 list_for_each_entry_safe(req, tmp, &dep->list_pending, list_pending)
158 xhci_dbc_flush_single_request(req);
159}
160
Prabhat Chand Pandeyea5cc922019-02-20 19:50:55 +0200161static void xhci_dbc_flush_requests(struct xhci_dbc *dbc)
Lu Baoludfba2172017-12-08 17:59:10 +0200162{
163 xhci_dbc_flush_endpoint_requests(&dbc->eps[BULK_OUT]);
164 xhci_dbc_flush_endpoint_requests(&dbc->eps[BULK_IN]);
165}
166
167struct dbc_request *
168dbc_alloc_request(struct dbc_ep *dep, gfp_t gfp_flags)
169{
170 struct dbc_request *req;
171
172 req = kzalloc(sizeof(*req), gfp_flags);
173 if (!req)
174 return NULL;
175
176 req->dep = dep;
177 INIT_LIST_HEAD(&req->list_pending);
178 INIT_LIST_HEAD(&req->list_pool);
179 req->direction = dep->direction;
180
181 trace_xhci_dbc_alloc_request(req);
182
183 return req;
184}
185
186void
187dbc_free_request(struct dbc_ep *dep, struct dbc_request *req)
188{
189 trace_xhci_dbc_free_request(req);
190
191 kfree(req);
192}
193
194static void
195xhci_dbc_queue_trb(struct xhci_ring *ring, u32 field1,
196 u32 field2, u32 field3, u32 field4)
197{
198 union xhci_trb *trb, *next;
199
200 trb = ring->enqueue;
201 trb->generic.field[0] = cpu_to_le32(field1);
202 trb->generic.field[1] = cpu_to_le32(field2);
203 trb->generic.field[2] = cpu_to_le32(field3);
204 trb->generic.field[3] = cpu_to_le32(field4);
205
206 trace_xhci_dbc_gadget_ep_queue(ring, &trb->generic);
207
208 ring->num_trbs_free--;
209 next = ++(ring->enqueue);
210 if (TRB_TYPE_LINK_LE32(next->link.control)) {
211 next->link.control ^= cpu_to_le32(TRB_CYCLE);
212 ring->enqueue = ring->enq_seg->trbs;
213 ring->cycle_state ^= 1;
214 }
215}
216
217static int xhci_dbc_queue_bulk_tx(struct dbc_ep *dep,
218 struct dbc_request *req)
219{
220 u64 addr;
221 union xhci_trb *trb;
222 unsigned int num_trbs;
223 struct xhci_dbc *dbc = dep->dbc;
224 struct xhci_ring *ring = dep->ring;
225 u32 length, control, cycle;
226
227 num_trbs = count_trbs(req->dma, req->length);
228 WARN_ON(num_trbs != 1);
229 if (ring->num_trbs_free < num_trbs)
230 return -EBUSY;
231
232 addr = req->dma;
233 trb = ring->enqueue;
234 cycle = ring->cycle_state;
235 length = TRB_LEN(req->length);
236 control = TRB_TYPE(TRB_NORMAL) | TRB_IOC;
237
238 if (cycle)
239 control &= cpu_to_le32(~TRB_CYCLE);
240 else
241 control |= cpu_to_le32(TRB_CYCLE);
242
243 req->trb = ring->enqueue;
244 req->trb_dma = xhci_trb_virt_to_dma(ring->enq_seg, ring->enqueue);
245 xhci_dbc_queue_trb(ring,
246 lower_32_bits(addr),
247 upper_32_bits(addr),
248 length, control);
249
250 /*
251 * Add a barrier between writes of trb fields and flipping
252 * the cycle bit:
253 */
254 wmb();
255
256 if (cycle)
257 trb->generic.field[3] |= cpu_to_le32(TRB_CYCLE);
258 else
259 trb->generic.field[3] &= cpu_to_le32(~TRB_CYCLE);
260
261 writel(DBC_DOOR_BELL_TARGET(dep->direction), &dbc->regs->doorbell);
262
263 return 0;
264}
265
266static int
267dbc_ep_do_queue(struct dbc_ep *dep, struct dbc_request *req)
268{
269 int ret;
Lu Baoludfba2172017-12-08 17:59:10 +0200270 struct xhci_dbc *dbc = dep->dbc;
Mathias Nymaned7bffe2020-07-23 17:45:14 +0300271 struct device *dev = dbc->dev;
Lu Baoludfba2172017-12-08 17:59:10 +0200272
273 if (!req->length || !req->buf)
274 return -EINVAL;
275
276 req->actual = 0;
277 req->status = -EINPROGRESS;
278
279 req->dma = dma_map_single(dev,
280 req->buf,
281 req->length,
282 dbc_ep_dma_direction(dep));
283 if (dma_mapping_error(dev, req->dma)) {
Mathias Nyman985247f2020-07-23 17:45:11 +0300284 dev_err(dbc->dev, "failed to map buffer\n");
Lu Baoludfba2172017-12-08 17:59:10 +0200285 return -EFAULT;
286 }
287
288 ret = xhci_dbc_queue_bulk_tx(dep, req);
289 if (ret) {
Mathias Nyman985247f2020-07-23 17:45:11 +0300290 dev_err(dbc->dev, "failed to queue trbs\n");
Lu Baoludfba2172017-12-08 17:59:10 +0200291 dma_unmap_single(dev,
292 req->dma,
293 req->length,
294 dbc_ep_dma_direction(dep));
295 return -EFAULT;
296 }
297
298 list_add_tail(&req->list_pending, &dep->list_pending);
299
300 return 0;
301}
302
303int dbc_ep_queue(struct dbc_ep *dep, struct dbc_request *req,
304 gfp_t gfp_flags)
305{
Lu Baolua098dc82018-03-08 17:17:15 +0200306 unsigned long flags;
Lu Baoludfba2172017-12-08 17:59:10 +0200307 struct xhci_dbc *dbc = dep->dbc;
308 int ret = -ESHUTDOWN;
309
Lu Baolua098dc82018-03-08 17:17:15 +0200310 spin_lock_irqsave(&dbc->lock, flags);
Lu Baoludfba2172017-12-08 17:59:10 +0200311 if (dbc->state == DS_CONFIGURED)
312 ret = dbc_ep_do_queue(dep, req);
Lu Baolua098dc82018-03-08 17:17:15 +0200313 spin_unlock_irqrestore(&dbc->lock, flags);
Lu Baoludfba2172017-12-08 17:59:10 +0200314
315 mod_delayed_work(system_wq, &dbc->event_work, 0);
316
317 trace_xhci_dbc_queue_request(req);
318
319 return ret;
320}
321
Mathias Nymand3249fa2020-07-23 17:45:15 +0300322static inline void xhci_dbc_do_eps_init(struct xhci_dbc *dbc, bool direction)
Lu Baoludfba2172017-12-08 17:59:10 +0200323{
324 struct dbc_ep *dep;
Lu Baoludfba2172017-12-08 17:59:10 +0200325
326 dep = &dbc->eps[direction];
327 dep->dbc = dbc;
328 dep->direction = direction;
329 dep->ring = direction ? dbc->ring_in : dbc->ring_out;
330
331 INIT_LIST_HEAD(&dep->list_pending);
332}
333
Mathias Nymand3249fa2020-07-23 17:45:15 +0300334static void xhci_dbc_eps_init(struct xhci_dbc *dbc)
Lu Baoludfba2172017-12-08 17:59:10 +0200335{
Mathias Nymand3249fa2020-07-23 17:45:15 +0300336 xhci_dbc_do_eps_init(dbc, BULK_OUT);
337 xhci_dbc_do_eps_init(dbc, BULK_IN);
Lu Baoludfba2172017-12-08 17:59:10 +0200338}
339
Mathias Nymand3249fa2020-07-23 17:45:15 +0300340static void xhci_dbc_eps_exit(struct xhci_dbc *dbc)
Lu Baoludfba2172017-12-08 17:59:10 +0200341{
Mathias Nyman33369d52017-12-11 10:38:03 +0200342 memset(dbc->eps, 0, sizeof(struct dbc_ep) * ARRAY_SIZE(dbc->eps));
Lu Baoludfba2172017-12-08 17:59:10 +0200343}
344
Mathias Nyman0b832e92020-07-23 17:45:07 +0300345static int dbc_erst_alloc(struct device *dev, struct xhci_ring *evt_ring,
346 struct xhci_erst *erst, gfp_t flags)
347{
348 erst->entries = dma_alloc_coherent(dev, sizeof(struct xhci_erst_entry),
349 &erst->erst_dma_addr, flags);
350 if (!erst->entries)
351 return -ENOMEM;
352
353 erst->num_entries = 1;
354 erst->entries[0].seg_addr = cpu_to_le64(evt_ring->first_seg->dma);
355 erst->entries[0].seg_size = cpu_to_le32(TRBS_PER_SEGMENT);
356 erst->entries[0].rsvd = 0;
357 return 0;
358}
359
360static void dbc_erst_free(struct device *dev, struct xhci_erst *erst)
361{
362 if (erst->entries)
363 dma_free_coherent(dev, sizeof(struct xhci_erst_entry),
364 erst->entries, erst->erst_dma_addr);
365 erst->entries = NULL;
366}
367
Lu Baoludfba2172017-12-08 17:59:10 +0200368static int xhci_dbc_mem_init(struct xhci_hcd *xhci, gfp_t flags)
369{
370 int ret;
371 dma_addr_t deq;
372 u32 string_length;
373 struct xhci_dbc *dbc = xhci->dbc;
Mathias Nyman0b832e92020-07-23 17:45:07 +0300374 struct device *dev = xhci_to_hcd(xhci)->self.controller;
Lu Baoludfba2172017-12-08 17:59:10 +0200375
376 /* Allocate various rings for events and transfers: */
377 dbc->ring_evt = xhci_ring_alloc(xhci, 1, 1, TYPE_EVENT, 0, flags);
378 if (!dbc->ring_evt)
379 goto evt_fail;
380
381 dbc->ring_in = xhci_ring_alloc(xhci, 1, 1, TYPE_BULK, 0, flags);
382 if (!dbc->ring_in)
383 goto in_fail;
384
385 dbc->ring_out = xhci_ring_alloc(xhci, 1, 1, TYPE_BULK, 0, flags);
386 if (!dbc->ring_out)
387 goto out_fail;
388
389 /* Allocate and populate ERST: */
Mathias Nyman0b832e92020-07-23 17:45:07 +0300390 ret = dbc_erst_alloc(dev, dbc->ring_evt, &dbc->erst, flags);
Lu Baoludfba2172017-12-08 17:59:10 +0200391 if (ret)
392 goto erst_fail;
393
394 /* Allocate context data structure: */
395 dbc->ctx = xhci_alloc_container_ctx(xhci, XHCI_CTX_TYPE_DEVICE, flags);
396 if (!dbc->ctx)
397 goto ctx_fail;
398
399 /* Allocate the string table: */
400 dbc->string_size = sizeof(struct dbc_str_descs);
Mathias Nymanc9dd9432020-07-23 17:45:08 +0300401 dbc->string = dma_alloc_coherent(dev, dbc->string_size,
402 &dbc->string_dma, flags);
Lu Baoludfba2172017-12-08 17:59:10 +0200403 if (!dbc->string)
404 goto string_fail;
405
406 /* Setup ERST register: */
407 writel(dbc->erst.erst_size, &dbc->regs->ersts);
Mathias Nyman7cd63122020-07-23 17:45:12 +0300408
409 lo_hi_writeq(dbc->erst.erst_dma_addr, &dbc->regs->erstba);
Lu Baoludfba2172017-12-08 17:59:10 +0200410 deq = xhci_trb_virt_to_dma(dbc->ring_evt->deq_seg,
411 dbc->ring_evt->dequeue);
Mathias Nyman7cd63122020-07-23 17:45:12 +0300412 lo_hi_writeq(deq, &dbc->regs->erdp);
Lu Baoludfba2172017-12-08 17:59:10 +0200413
414 /* Setup strings and contexts: */
415 string_length = xhci_dbc_populate_strings(dbc->string);
Mathias Nyman1da49a22020-07-23 17:45:13 +0300416 xhci_dbc_init_contexts(dbc, string_length);
Lu Baoludfba2172017-12-08 17:59:10 +0200417
Mathias Nymand3249fa2020-07-23 17:45:15 +0300418 xhci_dbc_eps_init(dbc);
Lu Baoludfba2172017-12-08 17:59:10 +0200419 dbc->state = DS_INITIALIZED;
420
421 return 0;
422
423string_fail:
424 xhci_free_container_ctx(xhci, dbc->ctx);
425 dbc->ctx = NULL;
426ctx_fail:
Mathias Nyman0b832e92020-07-23 17:45:07 +0300427 dbc_erst_free(dev, &dbc->erst);
Lu Baoludfba2172017-12-08 17:59:10 +0200428erst_fail:
429 xhci_ring_free(xhci, dbc->ring_out);
430 dbc->ring_out = NULL;
431out_fail:
432 xhci_ring_free(xhci, dbc->ring_in);
433 dbc->ring_in = NULL;
434in_fail:
435 xhci_ring_free(xhci, dbc->ring_evt);
436 dbc->ring_evt = NULL;
437evt_fail:
438 return -ENOMEM;
439}
440
441static void xhci_dbc_mem_cleanup(struct xhci_hcd *xhci)
442{
443 struct xhci_dbc *dbc = xhci->dbc;
Mathias Nyman0b832e92020-07-23 17:45:07 +0300444 struct device *dev = xhci_to_hcd(xhci)->self.controller;
Lu Baoludfba2172017-12-08 17:59:10 +0200445
446 if (!dbc)
447 return;
448
Mathias Nymand3249fa2020-07-23 17:45:15 +0300449 xhci_dbc_eps_exit(dbc);
Lu Baoludfba2172017-12-08 17:59:10 +0200450
451 if (dbc->string) {
Mathias Nymanbcf87ea2020-07-23 17:45:09 +0300452 dma_free_coherent(dbc->dev, dbc->string_size,
453 dbc->string, dbc->string_dma);
Lu Baoludfba2172017-12-08 17:59:10 +0200454 dbc->string = NULL;
455 }
456
457 xhci_free_container_ctx(xhci, dbc->ctx);
458 dbc->ctx = NULL;
459
Mathias Nyman0b832e92020-07-23 17:45:07 +0300460 dbc_erst_free(dev, &dbc->erst);
Lu Baoludfba2172017-12-08 17:59:10 +0200461 xhci_ring_free(xhci, dbc->ring_out);
462 xhci_ring_free(xhci, dbc->ring_in);
463 xhci_ring_free(xhci, dbc->ring_evt);
464 dbc->ring_in = NULL;
465 dbc->ring_out = NULL;
466 dbc->ring_evt = NULL;
467}
468
469static int xhci_do_dbc_start(struct xhci_hcd *xhci)
470{
471 int ret;
472 u32 ctrl;
473 struct xhci_dbc *dbc = xhci->dbc;
474
475 if (dbc->state != DS_DISABLED)
476 return -EINVAL;
477
478 writel(0, &dbc->regs->control);
479 ret = xhci_handshake(&dbc->regs->control,
480 DBC_CTRL_DBC_ENABLE,
481 0, 1000);
482 if (ret)
483 return ret;
484
485 ret = xhci_dbc_mem_init(xhci, GFP_ATOMIC);
486 if (ret)
487 return ret;
488
489 ctrl = readl(&dbc->regs->control);
490 writel(ctrl | DBC_CTRL_DBC_ENABLE | DBC_CTRL_PORT_ENABLE,
491 &dbc->regs->control);
492 ret = xhci_handshake(&dbc->regs->control,
493 DBC_CTRL_DBC_ENABLE,
494 DBC_CTRL_DBC_ENABLE, 1000);
495 if (ret)
496 return ret;
497
498 dbc->state = DS_ENABLED;
499
500 return 0;
501}
502
Mathias Nyman903089b2020-07-23 17:45:16 +0300503static int xhci_do_dbc_stop(struct xhci_dbc *dbc)
Lu Baoludfba2172017-12-08 17:59:10 +0200504{
Lu Baoludfba2172017-12-08 17:59:10 +0200505 if (dbc->state == DS_DISABLED)
Kai-Heng Feng74cb3192018-07-02 17:13:31 +0300506 return -1;
Lu Baoludfba2172017-12-08 17:59:10 +0200507
508 writel(0, &dbc->regs->control);
Lu Baoludfba2172017-12-08 17:59:10 +0200509 dbc->state = DS_DISABLED;
Kai-Heng Feng74cb3192018-07-02 17:13:31 +0300510
511 return 0;
Lu Baoludfba2172017-12-08 17:59:10 +0200512}
513
514static int xhci_dbc_start(struct xhci_hcd *xhci)
515{
516 int ret;
Lu Baolua098dc82018-03-08 17:17:15 +0200517 unsigned long flags;
Lu Baoludfba2172017-12-08 17:59:10 +0200518 struct xhci_dbc *dbc = xhci->dbc;
519
520 WARN_ON(!dbc);
521
522 pm_runtime_get_sync(xhci_to_hcd(xhci)->self.controller);
523
Lu Baolua098dc82018-03-08 17:17:15 +0200524 spin_lock_irqsave(&dbc->lock, flags);
Lu Baoludfba2172017-12-08 17:59:10 +0200525 ret = xhci_do_dbc_start(xhci);
Lu Baolua098dc82018-03-08 17:17:15 +0200526 spin_unlock_irqrestore(&dbc->lock, flags);
Lu Baoludfba2172017-12-08 17:59:10 +0200527
528 if (ret) {
529 pm_runtime_put(xhci_to_hcd(xhci)->self.controller);
530 return ret;
531 }
532
533 return mod_delayed_work(system_wq, &dbc->event_work, 1);
534}
535
536static void xhci_dbc_stop(struct xhci_hcd *xhci)
537{
Kai-Heng Feng74cb3192018-07-02 17:13:31 +0300538 int ret;
Lu Baolua098dc82018-03-08 17:17:15 +0200539 unsigned long flags;
Lu Baoludfba2172017-12-08 17:59:10 +0200540 struct xhci_dbc *dbc = xhci->dbc;
541 struct dbc_port *port = &dbc->port;
542
543 WARN_ON(!dbc);
544
545 cancel_delayed_work_sync(&dbc->event_work);
546
547 if (port->registered)
Mathias Nymanb396fa32020-07-23 17:45:18 +0300548 xhci_dbc_tty_unregister_device(dbc);
Lu Baoludfba2172017-12-08 17:59:10 +0200549
Lu Baolua098dc82018-03-08 17:17:15 +0200550 spin_lock_irqsave(&dbc->lock, flags);
Mathias Nyman903089b2020-07-23 17:45:16 +0300551 ret = xhci_do_dbc_stop(dbc);
Lu Baolua098dc82018-03-08 17:17:15 +0200552 spin_unlock_irqrestore(&dbc->lock, flags);
Lu Baoludfba2172017-12-08 17:59:10 +0200553
Mathias Nyman8867ea22019-03-22 17:50:16 +0200554 if (!ret) {
555 xhci_dbc_mem_cleanup(xhci);
Kai-Heng Feng74cb3192018-07-02 17:13:31 +0300556 pm_runtime_put_sync(xhci_to_hcd(xhci)->self.controller);
Mathias Nyman8867ea22019-03-22 17:50:16 +0200557 }
Lu Baoludfba2172017-12-08 17:59:10 +0200558}
559
560static void
Mathias Nyman985247f2020-07-23 17:45:11 +0300561dbc_handle_port_status(struct xhci_dbc *dbc, union xhci_trb *event)
Lu Baoludfba2172017-12-08 17:59:10 +0200562{
563 u32 portsc;
Lu Baoludfba2172017-12-08 17:59:10 +0200564
565 portsc = readl(&dbc->regs->portsc);
566 if (portsc & DBC_PORTSC_CONN_CHANGE)
Mathias Nyman985247f2020-07-23 17:45:11 +0300567 dev_info(dbc->dev, "DbC port connect change\n");
Lu Baoludfba2172017-12-08 17:59:10 +0200568
569 if (portsc & DBC_PORTSC_RESET_CHANGE)
Mathias Nyman985247f2020-07-23 17:45:11 +0300570 dev_info(dbc->dev, "DbC port reset change\n");
Lu Baoludfba2172017-12-08 17:59:10 +0200571
572 if (portsc & DBC_PORTSC_LINK_CHANGE)
Mathias Nyman985247f2020-07-23 17:45:11 +0300573 dev_info(dbc->dev, "DbC port link status change\n");
Lu Baoludfba2172017-12-08 17:59:10 +0200574
575 if (portsc & DBC_PORTSC_CONFIG_CHANGE)
Mathias Nyman985247f2020-07-23 17:45:11 +0300576 dev_info(dbc->dev, "DbC config error change\n");
Lu Baoludfba2172017-12-08 17:59:10 +0200577
578 /* Port reset change bit will be cleared in other place: */
579 writel(portsc & ~DBC_PORTSC_RESET_CHANGE, &dbc->regs->portsc);
580}
581
Mathias Nymana1f63762020-07-23 17:45:17 +0300582static void dbc_handle_xfer_event(struct xhci_dbc *dbc, union xhci_trb *event)
Lu Baoludfba2172017-12-08 17:59:10 +0200583{
584 struct dbc_ep *dep;
585 struct xhci_ring *ring;
586 int ep_id;
587 int status;
588 u32 comp_code;
589 size_t remain_length;
590 struct dbc_request *req = NULL, *r;
591
592 comp_code = GET_COMP_CODE(le32_to_cpu(event->generic.field[2]));
593 remain_length = EVENT_TRB_LEN(le32_to_cpu(event->generic.field[2]));
594 ep_id = TRB_TO_EP_ID(le32_to_cpu(event->generic.field[3]));
595 dep = (ep_id == EPID_OUT) ?
596 get_out_ep(xhci) : get_in_ep(xhci);
597 ring = dep->ring;
598
599 switch (comp_code) {
600 case COMP_SUCCESS:
601 remain_length = 0;
602 /* FALLTHROUGH */
603 case COMP_SHORT_PACKET:
604 status = 0;
605 break;
606 case COMP_TRB_ERROR:
607 case COMP_BABBLE_DETECTED_ERROR:
608 case COMP_USB_TRANSACTION_ERROR:
609 case COMP_STALL_ERROR:
Mathias Nyman985247f2020-07-23 17:45:11 +0300610 dev_warn(dbc->dev, "tx error %d detected\n", comp_code);
Lu Baoludfba2172017-12-08 17:59:10 +0200611 status = -comp_code;
612 break;
613 default:
Mathias Nyman985247f2020-07-23 17:45:11 +0300614 dev_err(dbc->dev, "unknown tx error %d\n", comp_code);
Lu Baoludfba2172017-12-08 17:59:10 +0200615 status = -comp_code;
616 break;
617 }
618
619 /* Match the pending request: */
620 list_for_each_entry(r, &dep->list_pending, list_pending) {
621 if (r->trb_dma == event->trans_event.buffer) {
622 req = r;
623 break;
624 }
625 }
626
627 if (!req) {
Mathias Nyman985247f2020-07-23 17:45:11 +0300628 dev_warn(dbc->dev, "no matched request\n");
Lu Baoludfba2172017-12-08 17:59:10 +0200629 return;
630 }
631
632 trace_xhci_dbc_handle_transfer(ring, &req->trb->generic);
633
634 ring->num_trbs_free++;
635 req->actual = req->length - remain_length;
636 xhci_dbc_giveback(req, status);
637}
638
Mathias Nyman5b43a2a2020-07-23 17:45:05 +0300639static void inc_evt_deq(struct xhci_ring *ring)
640{
641 /* If on the last TRB of the segment go back to the beginning */
642 if (ring->dequeue == &ring->deq_seg->trbs[TRBS_PER_SEGMENT - 1]) {
643 ring->cycle_state ^= 1;
644 ring->dequeue = ring->deq_seg->trbs;
645 return;
646 }
647 ring->dequeue++;
648}
649
Lu Baoludfba2172017-12-08 17:59:10 +0200650static enum evtreturn xhci_dbc_do_handle_events(struct xhci_dbc *dbc)
651{
652 dma_addr_t deq;
653 struct dbc_ep *dep;
654 union xhci_trb *evt;
655 u32 ctrl, portsc;
Lu Baoludfba2172017-12-08 17:59:10 +0200656 bool update_erdp = false;
657
658 /* DbC state machine: */
659 switch (dbc->state) {
660 case DS_DISABLED:
661 case DS_INITIALIZED:
662
663 return EVT_ERR;
664 case DS_ENABLED:
665 portsc = readl(&dbc->regs->portsc);
666 if (portsc & DBC_PORTSC_CONN_STATUS) {
667 dbc->state = DS_CONNECTED;
Mathias Nyman985247f2020-07-23 17:45:11 +0300668 dev_info(dbc->dev, "DbC connected\n");
Lu Baoludfba2172017-12-08 17:59:10 +0200669 }
670
671 return EVT_DONE;
672 case DS_CONNECTED:
673 ctrl = readl(&dbc->regs->control);
674 if (ctrl & DBC_CTRL_DBC_RUN) {
675 dbc->state = DS_CONFIGURED;
Mathias Nyman985247f2020-07-23 17:45:11 +0300676 dev_info(dbc->dev, "DbC configured\n");
Lu Baoludfba2172017-12-08 17:59:10 +0200677 portsc = readl(&dbc->regs->portsc);
678 writel(portsc, &dbc->regs->portsc);
679 return EVT_GSER;
680 }
681
682 return EVT_DONE;
683 case DS_CONFIGURED:
684 /* Handle cable unplug event: */
685 portsc = readl(&dbc->regs->portsc);
686 if (!(portsc & DBC_PORTSC_PORT_ENABLED) &&
687 !(portsc & DBC_PORTSC_CONN_STATUS)) {
Mathias Nyman985247f2020-07-23 17:45:11 +0300688 dev_info(dbc->dev, "DbC cable unplugged\n");
Lu Baoludfba2172017-12-08 17:59:10 +0200689 dbc->state = DS_ENABLED;
Prabhat Chand Pandeyea5cc922019-02-20 19:50:55 +0200690 xhci_dbc_flush_requests(dbc);
Lu Baoludfba2172017-12-08 17:59:10 +0200691
692 return EVT_DISC;
693 }
694
695 /* Handle debug port reset event: */
696 if (portsc & DBC_PORTSC_RESET_CHANGE) {
Mathias Nyman985247f2020-07-23 17:45:11 +0300697 dev_info(dbc->dev, "DbC port reset\n");
Lu Baoludfba2172017-12-08 17:59:10 +0200698 writel(portsc, &dbc->regs->portsc);
699 dbc->state = DS_ENABLED;
Prabhat Chand Pandeyea5cc922019-02-20 19:50:55 +0200700 xhci_dbc_flush_requests(dbc);
Lu Baoludfba2172017-12-08 17:59:10 +0200701
702 return EVT_DISC;
703 }
704
705 /* Handle endpoint stall event: */
706 ctrl = readl(&dbc->regs->control);
707 if ((ctrl & DBC_CTRL_HALT_IN_TR) ||
708 (ctrl & DBC_CTRL_HALT_OUT_TR)) {
Mathias Nyman985247f2020-07-23 17:45:11 +0300709 dev_info(dbc->dev, "DbC Endpoint stall\n");
Lu Baoludfba2172017-12-08 17:59:10 +0200710 dbc->state = DS_STALLED;
711
712 if (ctrl & DBC_CTRL_HALT_IN_TR) {
713 dep = get_in_ep(xhci);
714 xhci_dbc_flush_endpoint_requests(dep);
715 }
716
717 if (ctrl & DBC_CTRL_HALT_OUT_TR) {
718 dep = get_out_ep(xhci);
719 xhci_dbc_flush_endpoint_requests(dep);
720 }
721
722 return EVT_DONE;
723 }
724
725 /* Clear DbC run change bit: */
726 if (ctrl & DBC_CTRL_DBC_RUN_CHANGE) {
727 writel(ctrl, &dbc->regs->control);
728 ctrl = readl(&dbc->regs->control);
729 }
730
731 break;
732 case DS_STALLED:
733 ctrl = readl(&dbc->regs->control);
734 if (!(ctrl & DBC_CTRL_HALT_IN_TR) &&
735 !(ctrl & DBC_CTRL_HALT_OUT_TR) &&
736 (ctrl & DBC_CTRL_DBC_RUN)) {
737 dbc->state = DS_CONFIGURED;
738 break;
739 }
740
741 return EVT_DONE;
742 default:
Mathias Nyman985247f2020-07-23 17:45:11 +0300743 dev_err(dbc->dev, "Unknown DbC state %d\n", dbc->state);
Lu Baoludfba2172017-12-08 17:59:10 +0200744 break;
745 }
746
747 /* Handle the events in the event ring: */
748 evt = dbc->ring_evt->dequeue;
749 while ((le32_to_cpu(evt->event_cmd.flags) & TRB_CYCLE) ==
750 dbc->ring_evt->cycle_state) {
751 /*
752 * Add a barrier between reading the cycle flag and any
753 * reads of the event's flags/data below:
754 */
755 rmb();
756
757 trace_xhci_dbc_handle_event(dbc->ring_evt, &evt->generic);
758
759 switch (le32_to_cpu(evt->event_cmd.flags) & TRB_TYPE_BITMASK) {
760 case TRB_TYPE(TRB_PORT_STATUS):
Mathias Nyman985247f2020-07-23 17:45:11 +0300761 dbc_handle_port_status(dbc, evt);
Lu Baoludfba2172017-12-08 17:59:10 +0200762 break;
763 case TRB_TYPE(TRB_TRANSFER):
Mathias Nymana1f63762020-07-23 17:45:17 +0300764 dbc_handle_xfer_event(dbc, evt);
Lu Baoludfba2172017-12-08 17:59:10 +0200765 break;
766 default:
767 break;
768 }
769
Mathias Nyman5b43a2a2020-07-23 17:45:05 +0300770 inc_evt_deq(dbc->ring_evt);
771
Lu Baoludfba2172017-12-08 17:59:10 +0200772 evt = dbc->ring_evt->dequeue;
773 update_erdp = true;
774 }
775
776 /* Update event ring dequeue pointer: */
777 if (update_erdp) {
778 deq = xhci_trb_virt_to_dma(dbc->ring_evt->deq_seg,
779 dbc->ring_evt->dequeue);
Mathias Nyman7cd63122020-07-23 17:45:12 +0300780 lo_hi_writeq(deq, &dbc->regs->erdp);
Lu Baoludfba2172017-12-08 17:59:10 +0200781 }
782
783 return EVT_DONE;
784}
785
786static void xhci_dbc_handle_events(struct work_struct *work)
787{
788 int ret;
789 enum evtreturn evtr;
790 struct xhci_dbc *dbc;
Lu Baolua098dc82018-03-08 17:17:15 +0200791 unsigned long flags;
Lu Baoludfba2172017-12-08 17:59:10 +0200792
793 dbc = container_of(to_delayed_work(work), struct xhci_dbc, event_work);
Lu Baoludfba2172017-12-08 17:59:10 +0200794
Lu Baolua098dc82018-03-08 17:17:15 +0200795 spin_lock_irqsave(&dbc->lock, flags);
Lu Baoludfba2172017-12-08 17:59:10 +0200796 evtr = xhci_dbc_do_handle_events(dbc);
Lu Baolua098dc82018-03-08 17:17:15 +0200797 spin_unlock_irqrestore(&dbc->lock, flags);
Lu Baoludfba2172017-12-08 17:59:10 +0200798
799 switch (evtr) {
800 case EVT_GSER:
Mathias Nymanb396fa32020-07-23 17:45:18 +0300801 ret = xhci_dbc_tty_register_device(dbc);
Lu Baoludfba2172017-12-08 17:59:10 +0200802 if (ret) {
Mathias Nyman985247f2020-07-23 17:45:11 +0300803 dev_err(dbc->dev, "failed to alloc tty device\n");
Lu Baoludfba2172017-12-08 17:59:10 +0200804 break;
805 }
806
Mathias Nyman985247f2020-07-23 17:45:11 +0300807 dev_info(dbc->dev, "DbC now attached to /dev/ttyDBC0\n");
Lu Baoludfba2172017-12-08 17:59:10 +0200808 break;
809 case EVT_DISC:
Mathias Nymanb396fa32020-07-23 17:45:18 +0300810 xhci_dbc_tty_unregister_device(dbc);
Lu Baoludfba2172017-12-08 17:59:10 +0200811 break;
812 case EVT_DONE:
813 break;
814 default:
Mathias Nyman985247f2020-07-23 17:45:11 +0300815 dev_info(dbc->dev, "stop handling dbc events\n");
Lu Baoludfba2172017-12-08 17:59:10 +0200816 return;
817 }
818
819 mod_delayed_work(system_wq, &dbc->event_work, 1);
820}
821
822static void xhci_do_dbc_exit(struct xhci_hcd *xhci)
823{
824 unsigned long flags;
825
826 spin_lock_irqsave(&xhci->lock, flags);
827 kfree(xhci->dbc);
828 xhci->dbc = NULL;
829 spin_unlock_irqrestore(&xhci->lock, flags);
830}
831
832static int xhci_do_dbc_init(struct xhci_hcd *xhci)
833{
834 u32 reg;
835 struct xhci_dbc *dbc;
836 unsigned long flags;
837 void __iomem *base;
838 int dbc_cap_offs;
839
840 base = &xhci->cap_regs->hc_capbase;
841 dbc_cap_offs = xhci_find_next_ext_cap(base, 0, XHCI_EXT_CAPS_DEBUG);
842 if (!dbc_cap_offs)
843 return -ENODEV;
844
845 dbc = kzalloc(sizeof(*dbc), GFP_KERNEL);
846 if (!dbc)
847 return -ENOMEM;
848
849 dbc->regs = base + dbc_cap_offs;
850
851 /* We will avoid using DbC in xhci driver if it's in use. */
852 reg = readl(&dbc->regs->control);
853 if (reg & DBC_CTRL_DBC_ENABLE) {
854 kfree(dbc);
855 return -EBUSY;
856 }
857
858 spin_lock_irqsave(&xhci->lock, flags);
859 if (xhci->dbc) {
860 spin_unlock_irqrestore(&xhci->lock, flags);
861 kfree(dbc);
862 return -EBUSY;
863 }
864 xhci->dbc = dbc;
865 spin_unlock_irqrestore(&xhci->lock, flags);
866
867 dbc->xhci = xhci;
Mathias Nymanbe33f482020-07-23 17:45:10 +0300868 dbc->dev = xhci_to_hcd(xhci)->self.sysdev;
Lu Baoludfba2172017-12-08 17:59:10 +0200869 INIT_DELAYED_WORK(&dbc->event_work, xhci_dbc_handle_events);
870 spin_lock_init(&dbc->lock);
871
872 return 0;
873}
874
875static ssize_t dbc_show(struct device *dev,
876 struct device_attribute *attr,
877 char *buf)
878{
879 const char *p;
880 struct xhci_dbc *dbc;
881 struct xhci_hcd *xhci;
882
883 xhci = hcd_to_xhci(dev_get_drvdata(dev));
884 dbc = xhci->dbc;
885
886 switch (dbc->state) {
887 case DS_DISABLED:
888 p = "disabled";
889 break;
890 case DS_INITIALIZED:
891 p = "initialized";
892 break;
893 case DS_ENABLED:
894 p = "enabled";
895 break;
896 case DS_CONNECTED:
897 p = "connected";
898 break;
899 case DS_CONFIGURED:
900 p = "configured";
901 break;
902 case DS_STALLED:
903 p = "stalled";
904 break;
905 default:
906 p = "unknown";
907 }
908
909 return sprintf(buf, "%s\n", p);
910}
911
912static ssize_t dbc_store(struct device *dev,
913 struct device_attribute *attr,
914 const char *buf, size_t count)
915{
Lu Baoludfba2172017-12-08 17:59:10 +0200916 struct xhci_hcd *xhci;
917
918 xhci = hcd_to_xhci(dev_get_drvdata(dev));
Lu Baoludfba2172017-12-08 17:59:10 +0200919
920 if (!strncmp(buf, "enable", 6))
921 xhci_dbc_start(xhci);
922 else if (!strncmp(buf, "disable", 7))
923 xhci_dbc_stop(xhci);
924 else
925 return -EINVAL;
926
927 return count;
928}
929
Greg Kroah-Hartmaned5bd7a2018-01-23 11:24:05 +0100930static DEVICE_ATTR_RW(dbc);
Lu Baoludfba2172017-12-08 17:59:10 +0200931
932int xhci_dbc_init(struct xhci_hcd *xhci)
933{
934 int ret;
935 struct device *dev = xhci_to_hcd(xhci)->self.controller;
936
937 ret = xhci_do_dbc_init(xhci);
938 if (ret)
939 goto init_err3;
940
941 ret = xhci_dbc_tty_register_driver(xhci);
942 if (ret)
943 goto init_err2;
944
945 ret = device_create_file(dev, &dev_attr_dbc);
946 if (ret)
947 goto init_err1;
948
949 return 0;
950
951init_err1:
952 xhci_dbc_tty_unregister_driver();
953init_err2:
954 xhci_do_dbc_exit(xhci);
955init_err3:
956 return ret;
957}
958
959void xhci_dbc_exit(struct xhci_hcd *xhci)
960{
961 struct device *dev = xhci_to_hcd(xhci)->self.controller;
962
963 if (!xhci->dbc)
964 return;
965
966 device_remove_file(dev, &dev_attr_dbc);
967 xhci_dbc_tty_unregister_driver();
968 xhci_dbc_stop(xhci);
969 xhci_do_dbc_exit(xhci);
970}
971
972#ifdef CONFIG_PM
973int xhci_dbc_suspend(struct xhci_hcd *xhci)
974{
975 struct xhci_dbc *dbc = xhci->dbc;
976
977 if (!dbc)
978 return 0;
979
980 if (dbc->state == DS_CONFIGURED)
981 dbc->resume_required = 1;
982
983 xhci_dbc_stop(xhci);
984
985 return 0;
986}
987
988int xhci_dbc_resume(struct xhci_hcd *xhci)
989{
990 int ret = 0;
991 struct xhci_dbc *dbc = xhci->dbc;
992
993 if (!dbc)
994 return 0;
995
996 if (dbc->resume_required) {
997 dbc->resume_required = 0;
998 xhci_dbc_start(xhci);
999 }
1000
1001 return ret;
1002}
1003#endif /* CONFIG_PM */