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Greg Kroah-Hartmanb2441312017-11-01 15:07:57 +01001/* SPDX-License-Identifier: GPL-2.0 */
Catalin Marinas4b172442007-02-14 19:20:28 +01002#ifndef __ASMARM_ARCH_SCU_H
3#define __ASMARM_ARCH_SCU_H
4
Russell King292ec422011-02-04 10:36:39 +00005#define SCU_PM_NORMAL 0
6#define SCU_PM_DORMANT 2
7#define SCU_PM_POWEROFF 3
8
9#ifndef __ASSEMBLER__
Hiroshi Doyue9d6b3352013-01-22 07:52:01 +020010
Johan Hovoldfed3c152017-07-17 09:28:19 +010011#include <linux/errno.h>
Hiroshi Doyue9d6b3352013-01-22 07:52:01 +020012#include <asm/cputype.h>
13
14static inline bool scu_a9_has_base(void)
15{
Russell Kingaf040ff2014-06-24 19:43:15 +010016 return read_cpuid_part() == ARM_CPU_PART_CORTEX_A9;
Hiroshi Doyue9d6b3352013-01-22 07:52:01 +020017}
18
19static inline unsigned long scu_a9_get_base(void)
20{
21 unsigned long pa;
22
23 asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (pa));
24
25 return pa;
26}
27
Nishanth Menon2abc75a2013-06-26 09:39:47 -050028#ifdef CONFIG_HAVE_ARM_SCU
Russell Kinga8cbcd92009-05-16 11:51:14 +010029unsigned int scu_get_core_count(void __iomem *);
Russell King292ec422011-02-04 10:36:39 +000030int scu_power_mode(void __iomem *, unsigned int);
Nishanth Menon2abc75a2013-06-26 09:39:47 -050031#else
32static inline unsigned int scu_get_core_count(void __iomem *scu_base)
33{
34 return 0;
35}
36static inline int scu_power_mode(void __iomem *scu_base, unsigned int mode)
37{
38 return -EINVAL;
39}
40#endif
Rob Herringeed88122013-01-31 09:26:06 -060041
Nishanth Menon2abc75a2013-06-26 09:39:47 -050042#if defined(CONFIG_SMP) && defined(CONFIG_HAVE_ARM_SCU)
Rob Herringeed88122013-01-31 09:26:06 -060043void scu_enable(void __iomem *scu_base);
44#else
45static inline void scu_enable(void __iomem *scu_base) {}
46#endif
47
Russell King292ec422011-02-04 10:36:39 +000048#endif
Catalin Marinas4b172442007-02-14 19:20:28 +010049
50#endif