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Leif Lindholm64d2dc32010-09-16 18:00:47 +01001Software emulation of deprecated SWP instruction (CONFIG_SWP_EMULATE)
2---------------------------------------------------------------------
3
4ARMv6 architecture deprecates use of the SWP/SWPB instructions, and recommeds
5moving to the load-locked/store-conditional instructions LDREX and STREX.
6
7ARMv7 multiprocessing extensions introduce the ability to disable these
8instructions, triggering an undefined instruction exception when executed.
9Trapped instructions are emulated using an LDREX/STREX or LDREXB/STREXB
10sequence. If a memory access fault (an abort) occurs, a segmentation fault is
11signalled to the triggering process.
12
13/proc/cpu/swp_emulation holds some statistics/information, including the PID of
Mauro Carvalho Chehabdc7a12b2019-04-14 15:51:10 -030014the last process to trigger the emulation to be invocated. For example::
Leif Lindholm64d2dc32010-09-16 18:00:47 +010015
Mauro Carvalho Chehabdc7a12b2019-04-14 15:51:10 -030016 Emulated SWP: 12
17 Emulated SWPB: 0
18 Aborted SWP{B}: 1
19 Last process: 314
Leif Lindholm64d2dc32010-09-16 18:00:47 +010020
Mauro Carvalho Chehabdc7a12b2019-04-14 15:51:10 -030021
22NOTE:
23 when accessing uncached shared regions, LDREX/STREX rely on an external
24 transaction monitoring block called a global monitor to maintain update
25 atomicity. If your system does not implement a global monitor, this option can
26 cause programs that perform SWP operations to uncached memory to deadlock, as
27 the STREX operation will always fail.