blob: ace7a390b5febfab7bba8c826ed3243bac057ed8 [file] [log] [blame]
Thomas Gleixner9c92ab62019-05-29 07:17:56 -07001// SPDX-License-Identifier: GPL-2.0-only
Erik Gilling5ad36c52010-03-15 23:04:46 -07002/*
Colin Cross938fa342011-05-01 14:10:10 -07003 * Copyright (C) 2011 Google, Inc.
Erik Gilling5ad36c52010-03-15 23:04:46 -07004 *
5 * Author:
Colin Cross938fa342011-05-01 14:10:10 -07006 * Colin Cross <ccross@android.com>
Erik Gilling5ad36c52010-03-15 23:04:46 -07007 *
Joseph Loe307cc82013-04-03 19:31:45 +08008 * Copyright (C) 2010,2013, NVIDIA Corporation
Erik Gilling5ad36c52010-03-15 23:04:46 -07009 */
10
Joseph Lo7e8b15d2013-07-19 17:25:24 +080011#include <linux/cpu_pm.h>
Erik Gilling5ad36c52010-03-15 23:04:46 -070012#include <linux/interrupt.h>
Erik Gilling5ad36c52010-03-15 23:04:46 -070013#include <linux/io.h>
Rob Herring520f7bd2012-12-27 13:10:24 -060014#include <linux/irqchip/arm-gic.h>
Thierry Redinga0524ac2014-07-11 09:44:49 +020015#include <linux/irq.h>
16#include <linux/kernel.h>
17#include <linux/of_address.h>
18#include <linux/of.h>
Joseph Loe307cc82013-04-03 19:31:45 +080019#include <linux/syscore_ops.h>
Erik Gilling5ad36c52010-03-15 23:04:46 -070020
Erik Gilling5ad36c52010-03-15 23:04:46 -070021#include "board.h"
Stephen Warren2be39c02012-10-04 14:24:09 -060022#include "iomap.h"
Thierry Reding4f71a882016-04-28 14:54:27 +020023#include "irq.h"
Erik Gilling5ad36c52010-03-15 23:04:46 -070024
Joseph Lod4b92fb2013-01-15 22:10:26 +000025#define SGI_MASK 0xFFFF
26
Joseph Loe307cc82013-04-03 19:31:45 +080027#ifdef CONFIG_PM_SLEEP
Joseph Lo7e8b15d2013-07-19 17:25:24 +080028static void __iomem *tegra_gic_cpu_base;
Joseph Loe307cc82013-04-03 19:31:45 +080029#endif
30
Joseph Lod4b92fb2013-01-15 22:10:26 +000031bool tegra_pending_sgi(void)
32{
33 u32 pending_set;
34 void __iomem *distbase = IO_ADDRESS(TEGRA_ARM_INT_DIST_BASE);
35
36 pending_set = readl_relaxed(distbase + GIC_DIST_PENDING_SET);
37
38 if (pending_set & SGI_MASK)
39 return true;
40
41 return false;
42}
43
Joseph Loe307cc82013-04-03 19:31:45 +080044#ifdef CONFIG_PM_SLEEP
Joseph Lo7e8b15d2013-07-19 17:25:24 +080045static int tegra_gic_notifier(struct notifier_block *self,
46 unsigned long cmd, void *v)
47{
48 switch (cmd) {
49 case CPU_PM_ENTER:
50 writel_relaxed(0x1E0, tegra_gic_cpu_base + GIC_CPU_CTRL);
51 break;
52 }
53
54 return NOTIFY_OK;
55}
56
57static struct notifier_block tegra_gic_notifier_block = {
58 .notifier_call = tegra_gic_notifier,
59};
60
61static const struct of_device_id tegra114_dt_gic_match[] __initconst = {
62 { .compatible = "arm,cortex-a15-gic" },
63 { }
64};
65
Arnd Bergmann4dd201b2018-12-10 22:58:37 +010066static void __init tegra114_gic_cpu_pm_registration(void)
Joseph Lo7e8b15d2013-07-19 17:25:24 +080067{
68 struct device_node *dn;
69
70 dn = of_find_matching_node(NULL, tegra114_dt_gic_match);
71 if (!dn)
72 return;
73
74 tegra_gic_cpu_base = of_iomap(dn, 1);
75
76 cpu_pm_register_notifier(&tegra_gic_notifier_block);
77}
Joseph Loe307cc82013-04-03 19:31:45 +080078#else
Arnd Bergmann4dd201b2018-12-10 22:58:37 +010079static void __init tegra114_gic_cpu_pm_registration(void) { }
Joseph Loe307cc82013-04-03 19:31:45 +080080#endif
81
Marc Zyngiere9479e02015-03-11 15:43:00 +000082static const struct of_device_id tegra_ictlr_match[] __initconst = {
83 { .compatible = "nvidia,tegra20-ictlr" },
84 { .compatible = "nvidia,tegra30-ictlr" },
85 { }
86};
87
Erik Gilling5ad36c52010-03-15 23:04:46 -070088void __init tegra_init_irq(void)
89{
Marc Zyngier1a703bf2015-03-11 15:43:03 +000090 if (WARN_ON(!of_find_matching_node(NULL, tegra_ictlr_match)))
91 pr_warn("Outdated DT detected, suspend/resume will NOT work\n");
Colin Crossd1d8c662011-05-01 15:26:51 -070092
Joseph Lo7e8b15d2013-07-19 17:25:24 +080093 tegra114_gic_cpu_pm_registration();
Erik Gilling5ad36c52010-03-15 23:04:46 -070094}