Florian Fainelli | 2ba1b16 | 2014-08-27 17:04:47 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Broadcom UniMAC MDIO bus controller driver |
| 3 | * |
| 4 | * Copyright (C) 2014, Broadcom Corporation |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | */ |
| 11 | |
| 12 | #include <linux/kernel.h> |
| 13 | #include <linux/phy.h> |
| 14 | #include <linux/platform_device.h> |
| 15 | #include <linux/sched.h> |
| 16 | #include <linux/module.h> |
| 17 | #include <linux/io.h> |
| 18 | #include <linux/delay.h> |
| 19 | |
| 20 | #include <linux/of.h> |
| 21 | #include <linux/of_platform.h> |
| 22 | #include <linux/of_mdio.h> |
| 23 | |
| 24 | #define MDIO_CMD 0x00 |
| 25 | #define MDIO_START_BUSY (1 << 29) |
| 26 | #define MDIO_READ_FAIL (1 << 28) |
| 27 | #define MDIO_RD (2 << 26) |
| 28 | #define MDIO_WR (1 << 26) |
| 29 | #define MDIO_PMD_SHIFT 21 |
| 30 | #define MDIO_PMD_MASK 0x1F |
| 31 | #define MDIO_REG_SHIFT 16 |
| 32 | #define MDIO_REG_MASK 0x1F |
| 33 | |
| 34 | #define MDIO_CFG 0x04 |
| 35 | #define MDIO_C22 (1 << 0) |
| 36 | #define MDIO_C45 0 |
| 37 | #define MDIO_CLK_DIV_SHIFT 4 |
| 38 | #define MDIO_CLK_DIV_MASK 0x3F |
| 39 | #define MDIO_SUPP_PREAMBLE (1 << 12) |
| 40 | |
| 41 | struct unimac_mdio_priv { |
| 42 | struct mii_bus *mii_bus; |
| 43 | void __iomem *base; |
| 44 | }; |
| 45 | |
| 46 | static inline void unimac_mdio_start(struct unimac_mdio_priv *priv) |
| 47 | { |
| 48 | u32 reg; |
| 49 | |
| 50 | reg = __raw_readl(priv->base + MDIO_CMD); |
| 51 | reg |= MDIO_START_BUSY; |
| 52 | __raw_writel(reg, priv->base + MDIO_CMD); |
| 53 | } |
| 54 | |
| 55 | static inline unsigned int unimac_mdio_busy(struct unimac_mdio_priv *priv) |
| 56 | { |
| 57 | return __raw_readl(priv->base + MDIO_CMD) & MDIO_START_BUSY; |
| 58 | } |
| 59 | |
| 60 | static int unimac_mdio_read(struct mii_bus *bus, int phy_id, int reg) |
| 61 | { |
| 62 | struct unimac_mdio_priv *priv = bus->priv; |
| 63 | unsigned int timeout = 1000; |
| 64 | u32 cmd; |
| 65 | |
| 66 | /* Prepare the read operation */ |
| 67 | cmd = MDIO_RD | (phy_id << MDIO_PMD_SHIFT) | (reg << MDIO_REG_SHIFT); |
| 68 | __raw_writel(cmd, priv->base + MDIO_CMD); |
| 69 | |
| 70 | /* Start MDIO transaction */ |
| 71 | unimac_mdio_start(priv); |
| 72 | |
| 73 | do { |
| 74 | if (!unimac_mdio_busy(priv)) |
| 75 | break; |
| 76 | |
| 77 | usleep_range(1000, 2000); |
| 78 | } while (timeout--); |
| 79 | |
| 80 | if (!timeout) |
| 81 | return -ETIMEDOUT; |
| 82 | |
| 83 | cmd = __raw_readl(priv->base + MDIO_CMD); |
Florian Fainelli | 1a3f4e8 | 2015-06-10 12:24:11 -0700 | [diff] [blame] | 84 | |
| 85 | /* Some broken devices are known not to release the line during |
| 86 | * turn-around, e.g: Broadcom BCM53125 external switches, so check for |
| 87 | * that condition here and ignore the MDIO controller read failure |
| 88 | * indication. |
| 89 | */ |
| 90 | if (!(bus->phy_ignore_ta_mask & 1 << phy_id) && (cmd & MDIO_READ_FAIL)) |
Florian Fainelli | 2ba1b16 | 2014-08-27 17:04:47 -0700 | [diff] [blame] | 91 | return -EIO; |
| 92 | |
| 93 | return cmd & 0xffff; |
| 94 | } |
| 95 | |
| 96 | static int unimac_mdio_write(struct mii_bus *bus, int phy_id, |
| 97 | int reg, u16 val) |
| 98 | { |
| 99 | struct unimac_mdio_priv *priv = bus->priv; |
| 100 | unsigned int timeout = 1000; |
| 101 | u32 cmd; |
| 102 | |
| 103 | /* Prepare the write operation */ |
| 104 | cmd = MDIO_WR | (phy_id << MDIO_PMD_SHIFT) | |
| 105 | (reg << MDIO_REG_SHIFT) | (0xffff & val); |
| 106 | __raw_writel(cmd, priv->base + MDIO_CMD); |
| 107 | |
| 108 | unimac_mdio_start(priv); |
| 109 | |
| 110 | do { |
| 111 | if (!unimac_mdio_busy(priv)) |
| 112 | break; |
| 113 | |
| 114 | usleep_range(1000, 2000); |
| 115 | } while (timeout--); |
| 116 | |
| 117 | if (!timeout) |
| 118 | return -ETIMEDOUT; |
| 119 | |
| 120 | return 0; |
| 121 | } |
| 122 | |
Florian Fainelli | d8e704e | 2015-06-26 10:39:06 -0700 | [diff] [blame] | 123 | /* Workaround for integrated BCM7xxx Gigabit PHYs which have a problem with |
| 124 | * their internal MDIO management controller making them fail to successfully |
| 125 | * be read from or written to for the first transaction. We insert a dummy |
| 126 | * BMSR read here to make sure that phy_get_device() and get_phy_id() can |
| 127 | * correctly read the PHY MII_PHYSID1/2 registers and successfully register a |
| 128 | * PHY device for this peripheral. |
| 129 | * |
| 130 | * Once the PHY driver is registered, we can workaround subsequent reads from |
| 131 | * there (e.g: during system-wide power management). |
| 132 | * |
| 133 | * bus->reset is invoked before mdiobus_scan during mdiobus_register and is |
| 134 | * therefore the right location to stick that workaround. Since we do not want |
| 135 | * to read from non-existing PHYs, we either use bus->phy_mask or do a manual |
| 136 | * Device Tree scan to limit the search area. |
| 137 | */ |
| 138 | static int unimac_mdio_reset(struct mii_bus *bus) |
| 139 | { |
| 140 | struct device_node *np = bus->dev.of_node; |
| 141 | struct device_node *child; |
| 142 | u32 read_mask = 0; |
| 143 | int addr; |
| 144 | |
| 145 | if (!np) { |
| 146 | read_mask = ~bus->phy_mask; |
| 147 | } else { |
| 148 | for_each_available_child_of_node(np, child) { |
| 149 | addr = of_mdio_parse_addr(&bus->dev, child); |
| 150 | if (addr < 0) |
| 151 | continue; |
| 152 | |
| 153 | read_mask |= 1 << addr; |
| 154 | } |
| 155 | } |
| 156 | |
| 157 | for (addr = 0; addr < PHY_MAX_ADDR; addr++) { |
| 158 | if (read_mask & 1 << addr) |
| 159 | mdiobus_read(bus, addr, MII_BMSR); |
| 160 | } |
| 161 | |
| 162 | return 0; |
| 163 | } |
| 164 | |
Florian Fainelli | 2ba1b16 | 2014-08-27 17:04:47 -0700 | [diff] [blame] | 165 | static int unimac_mdio_probe(struct platform_device *pdev) |
| 166 | { |
| 167 | struct unimac_mdio_priv *priv; |
| 168 | struct device_node *np; |
| 169 | struct mii_bus *bus; |
| 170 | struct resource *r; |
| 171 | int ret; |
| 172 | |
| 173 | np = pdev->dev.of_node; |
| 174 | |
| 175 | priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); |
| 176 | if (!priv) |
| 177 | return -ENOMEM; |
| 178 | |
| 179 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 180 | |
| 181 | /* Just ioremap, as this MDIO block is usually integrated into an |
| 182 | * Ethernet MAC controller register range |
| 183 | */ |
| 184 | priv->base = devm_ioremap(&pdev->dev, r->start, resource_size(r)); |
| 185 | if (!priv->base) { |
| 186 | dev_err(&pdev->dev, "failed to remap register\n"); |
| 187 | return -ENOMEM; |
| 188 | } |
| 189 | |
| 190 | priv->mii_bus = mdiobus_alloc(); |
| 191 | if (!priv->mii_bus) |
| 192 | return -ENOMEM; |
| 193 | |
| 194 | bus = priv->mii_bus; |
| 195 | bus->priv = priv; |
| 196 | bus->name = "unimac MII bus"; |
| 197 | bus->parent = &pdev->dev; |
| 198 | bus->read = unimac_mdio_read; |
| 199 | bus->write = unimac_mdio_write; |
Florian Fainelli | d8e704e | 2015-06-26 10:39:06 -0700 | [diff] [blame] | 200 | bus->reset = unimac_mdio_reset; |
Florian Fainelli | 2ba1b16 | 2014-08-27 17:04:47 -0700 | [diff] [blame] | 201 | snprintf(bus->id, MII_BUS_ID_SIZE, "%s", pdev->name); |
| 202 | |
Florian Fainelli | 2ba1b16 | 2014-08-27 17:04:47 -0700 | [diff] [blame] | 203 | ret = of_mdiobus_register(bus, np); |
| 204 | if (ret) { |
| 205 | dev_err(&pdev->dev, "MDIO bus registration failed\n"); |
Andrew Lunn | e7f4dc3 | 2016-01-06 20:11:15 +0100 | [diff] [blame] | 206 | goto out_mdio_free; |
Florian Fainelli | 2ba1b16 | 2014-08-27 17:04:47 -0700 | [diff] [blame] | 207 | } |
| 208 | |
| 209 | platform_set_drvdata(pdev, priv); |
| 210 | |
| 211 | dev_info(&pdev->dev, "Broadcom UniMAC MDIO bus at 0x%p\n", priv->base); |
| 212 | |
| 213 | return 0; |
| 214 | |
Florian Fainelli | 2ba1b16 | 2014-08-27 17:04:47 -0700 | [diff] [blame] | 215 | out_mdio_free: |
| 216 | mdiobus_free(bus); |
| 217 | return ret; |
| 218 | } |
| 219 | |
| 220 | static int unimac_mdio_remove(struct platform_device *pdev) |
| 221 | { |
| 222 | struct unimac_mdio_priv *priv = platform_get_drvdata(pdev); |
| 223 | |
| 224 | mdiobus_unregister(priv->mii_bus); |
Florian Fainelli | 2ba1b16 | 2014-08-27 17:04:47 -0700 | [diff] [blame] | 225 | mdiobus_free(priv->mii_bus); |
| 226 | |
| 227 | return 0; |
| 228 | } |
| 229 | |
Fabian Frederick | d8a7dad | 2015-03-17 19:40:23 +0100 | [diff] [blame] | 230 | static const struct of_device_id unimac_mdio_ids[] = { |
Florian Fainelli | 2ba1b16 | 2014-08-27 17:04:47 -0700 | [diff] [blame] | 231 | { .compatible = "brcm,genet-mdio-v4", }, |
| 232 | { .compatible = "brcm,genet-mdio-v3", }, |
| 233 | { .compatible = "brcm,genet-mdio-v2", }, |
| 234 | { .compatible = "brcm,genet-mdio-v1", }, |
| 235 | { .compatible = "brcm,unimac-mdio", }, |
Florian Fainelli | 4559154 | 2014-08-29 12:43:56 -0700 | [diff] [blame] | 236 | { /* sentinel */ }, |
Florian Fainelli | 2ba1b16 | 2014-08-27 17:04:47 -0700 | [diff] [blame] | 237 | }; |
Luis de Bethencourt | 2f90a30 | 2015-09-18 18:16:12 +0200 | [diff] [blame] | 238 | MODULE_DEVICE_TABLE(of, unimac_mdio_ids); |
Florian Fainelli | 2ba1b16 | 2014-08-27 17:04:47 -0700 | [diff] [blame] | 239 | |
| 240 | static struct platform_driver unimac_mdio_driver = { |
| 241 | .driver = { |
| 242 | .name = "unimac-mdio", |
Florian Fainelli | 2ba1b16 | 2014-08-27 17:04:47 -0700 | [diff] [blame] | 243 | .of_match_table = unimac_mdio_ids, |
| 244 | }, |
| 245 | .probe = unimac_mdio_probe, |
| 246 | .remove = unimac_mdio_remove, |
| 247 | }; |
| 248 | module_platform_driver(unimac_mdio_driver); |
| 249 | |
| 250 | MODULE_AUTHOR("Broadcom Corporation"); |
| 251 | MODULE_DESCRIPTION("Broadcom UniMAC MDIO bus controller"); |
| 252 | MODULE_LICENSE("GPL"); |
| 253 | MODULE_ALIAS("platform:unimac-mdio"); |