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Stephen Boyde1bd55e2018-12-11 09:57:48 -08001// SPDX-License-Identifier: GPL-2.0
Sascha Hauerf0948f52012-05-03 15:36:14 +05302/*
3 * Copyright (C) 2011 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
Sascha Hauerf0948f52012-05-03 15:36:14 +05304 */
5#include <linux/module.h>
6#include <linux/clk-provider.h>
7#include <linux/slab.h>
8#include <linux/err.h>
Gregory CLEMENT79b16642013-04-12 13:57:44 +02009#include <linux/of.h>
Ricardo Ribalda Delgado971451b2016-07-05 18:23:33 +020010#include <linux/platform_device.h>
Sascha Hauerf0948f52012-05-03 15:36:14 +053011
12/*
13 * DOC: basic fixed multiplier and divider clock that cannot gate
14 *
15 * Traits of this clock:
16 * prepare - clk_prepare only ensures that parents are prepared
17 * enable - clk_enable only ensures that parents are enabled
18 * rate - rate is fixed. clk->rate = parent->rate / div * mult
19 * parent - fixed parent. No clk_set_parent support
20 */
21
Sascha Hauerf0948f52012-05-03 15:36:14 +053022static unsigned long clk_factor_recalc_rate(struct clk_hw *hw,
23 unsigned long parent_rate)
24{
25 struct clk_fixed_factor *fix = to_clk_fixed_factor(hw);
Haojian Zhuangbab53302012-12-03 16:14:37 +080026 unsigned long long int rate;
Sascha Hauerf0948f52012-05-03 15:36:14 +053027
Haojian Zhuangbab53302012-12-03 16:14:37 +080028 rate = (unsigned long long int)parent_rate * fix->mult;
29 do_div(rate, fix->div);
30 return (unsigned long)rate;
Sascha Hauerf0948f52012-05-03 15:36:14 +053031}
32
33static long clk_factor_round_rate(struct clk_hw *hw, unsigned long rate,
34 unsigned long *prate)
35{
36 struct clk_fixed_factor *fix = to_clk_fixed_factor(hw);
37
Stephen Boyd98d8a602015-06-29 16:56:30 -070038 if (clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT) {
Sascha Hauerf0948f52012-05-03 15:36:14 +053039 unsigned long best_parent;
40
41 best_parent = (rate / fix->mult) * fix->div;
Stephen Boyd2f508a92015-07-30 17:20:57 -070042 *prate = clk_hw_round_rate(clk_hw_get_parent(hw), best_parent);
Sascha Hauerf0948f52012-05-03 15:36:14 +053043 }
44
45 return (*prate / fix->div) * fix->mult;
46}
47
48static int clk_factor_set_rate(struct clk_hw *hw, unsigned long rate,
49 unsigned long parent_rate)
50{
Daniel Thompson3037e9e2015-06-10 21:04:54 +010051 /*
52 * We must report success but we can do so unconditionally because
53 * clk_factor_round_rate returns values that ensure this call is a
54 * nop.
55 */
56
Sascha Hauerf0948f52012-05-03 15:36:14 +053057 return 0;
58}
59
Daniel Thompson3037e9e2015-06-10 21:04:54 +010060const struct clk_ops clk_fixed_factor_ops = {
Sascha Hauerf0948f52012-05-03 15:36:14 +053061 .round_rate = clk_factor_round_rate,
62 .set_rate = clk_factor_set_rate,
63 .recalc_rate = clk_factor_recalc_rate,
64};
65EXPORT_SYMBOL_GPL(clk_fixed_factor_ops);
66
Stephen Boyd0759ac82016-02-07 00:11:06 -080067struct clk_hw *clk_hw_register_fixed_factor(struct device *dev,
68 const char *name, const char *parent_name, unsigned long flags,
Sascha Hauerf0948f52012-05-03 15:36:14 +053069 unsigned int mult, unsigned int div)
70{
71 struct clk_fixed_factor *fix;
72 struct clk_init_data init;
Stephen Boyd0759ac82016-02-07 00:11:06 -080073 struct clk_hw *hw;
74 int ret;
Sascha Hauerf0948f52012-05-03 15:36:14 +053075
76 fix = kmalloc(sizeof(*fix), GFP_KERNEL);
Stephen Boydd122db72015-05-14 16:47:10 -070077 if (!fix)
Sascha Hauerf0948f52012-05-03 15:36:14 +053078 return ERR_PTR(-ENOMEM);
Sascha Hauerf0948f52012-05-03 15:36:14 +053079
80 /* struct clk_fixed_factor assignments */
81 fix->mult = mult;
82 fix->div = div;
83 fix->hw.init = &init;
84
85 init.name = name;
86 init.ops = &clk_fixed_factor_ops;
Rajendra Nayakf7d8caa2012-06-01 14:02:47 +053087 init.flags = flags | CLK_IS_BASIC;
Sascha Hauerf0948f52012-05-03 15:36:14 +053088 init.parent_names = &parent_name;
89 init.num_parents = 1;
90
Stephen Boyd0759ac82016-02-07 00:11:06 -080091 hw = &fix->hw;
92 ret = clk_hw_register(dev, hw);
93 if (ret) {
Sascha Hauerf0948f52012-05-03 15:36:14 +053094 kfree(fix);
Stephen Boyd0759ac82016-02-07 00:11:06 -080095 hw = ERR_PTR(ret);
96 }
Sascha Hauerf0948f52012-05-03 15:36:14 +053097
Stephen Boyd0759ac82016-02-07 00:11:06 -080098 return hw;
99}
100EXPORT_SYMBOL_GPL(clk_hw_register_fixed_factor);
101
102struct clk *clk_register_fixed_factor(struct device *dev, const char *name,
103 const char *parent_name, unsigned long flags,
104 unsigned int mult, unsigned int div)
105{
106 struct clk_hw *hw;
107
108 hw = clk_hw_register_fixed_factor(dev, name, parent_name, flags, mult,
109 div);
110 if (IS_ERR(hw))
111 return ERR_CAST(hw);
112 return hw->clk;
Sascha Hauerf0948f52012-05-03 15:36:14 +0530113}
Mike Turquette5cfe10b2013-08-15 19:06:29 -0700114EXPORT_SYMBOL_GPL(clk_register_fixed_factor);
115
Masahiro Yamadacbf95912016-01-06 13:25:09 +0900116void clk_unregister_fixed_factor(struct clk *clk)
117{
118 struct clk_hw *hw;
119
120 hw = __clk_get_hw(clk);
121 if (!hw)
122 return;
123
124 clk_unregister(clk);
125 kfree(to_clk_fixed_factor(hw));
126}
127EXPORT_SYMBOL_GPL(clk_unregister_fixed_factor);
128
Stephen Boyd0759ac82016-02-07 00:11:06 -0800129void clk_hw_unregister_fixed_factor(struct clk_hw *hw)
130{
131 struct clk_fixed_factor *fix;
132
133 fix = to_clk_fixed_factor(hw);
134
135 clk_hw_unregister(hw);
136 kfree(fix);
137}
138EXPORT_SYMBOL_GPL(clk_hw_unregister_fixed_factor);
139
Gregory CLEMENT79b16642013-04-12 13:57:44 +0200140#ifdef CONFIG_OF
Maxime Riparde6cbf992016-06-22 11:15:54 +0200141static const struct of_device_id set_rate_parent_matches[] = {
142 { .compatible = "allwinner,sun4i-a10-pll3-2x-clk" },
143 { /* Sentinel */ },
144};
145
Ricardo Ribalda Delgado971451b2016-07-05 18:23:33 +0200146static struct clk *_of_fixed_factor_clk_setup(struct device_node *node)
Gregory CLEMENT79b16642013-04-12 13:57:44 +0200147{
148 struct clk *clk;
149 const char *clk_name = node->name;
150 const char *parent_name;
Maxime Riparde6cbf992016-06-22 11:15:54 +0200151 unsigned long flags = 0;
Gregory CLEMENT79b16642013-04-12 13:57:44 +0200152 u32 div, mult;
Ricardo Ribalda Delgado971451b2016-07-05 18:23:33 +0200153 int ret;
Gregory CLEMENT79b16642013-04-12 13:57:44 +0200154
155 if (of_property_read_u32(node, "clock-div", &div)) {
Rob Herringe665f022018-08-28 10:44:29 -0500156 pr_err("%s Fixed factor clock <%pOFn> must have a clock-div property\n",
157 __func__, node);
Ricardo Ribalda Delgado971451b2016-07-05 18:23:33 +0200158 return ERR_PTR(-EIO);
Gregory CLEMENT79b16642013-04-12 13:57:44 +0200159 }
160
161 if (of_property_read_u32(node, "clock-mult", &mult)) {
Rob Herringe665f022018-08-28 10:44:29 -0500162 pr_err("%s Fixed factor clock <%pOFn> must have a clock-mult property\n",
163 __func__, node);
Ricardo Ribalda Delgado971451b2016-07-05 18:23:33 +0200164 return ERR_PTR(-EIO);
Gregory CLEMENT79b16642013-04-12 13:57:44 +0200165 }
166
167 of_property_read_string(node, "clock-output-names", &clk_name);
168 parent_name = of_clk_get_parent_name(node, 0);
169
Maxime Riparde6cbf992016-06-22 11:15:54 +0200170 if (of_match_node(set_rate_parent_matches, node))
171 flags |= CLK_SET_RATE_PARENT;
172
173 clk = clk_register_fixed_factor(NULL, clk_name, parent_name, flags,
Gregory CLEMENT79b16642013-04-12 13:57:44 +0200174 mult, div);
Rajan Vajaf6dab422018-07-17 06:17:00 -0700175 if (IS_ERR(clk)) {
176 /*
177 * If parent clock is not registered, registration would fail.
178 * Clear OF_POPULATED flag so that clock registration can be
179 * attempted again from probe function.
180 */
181 of_node_clear_flag(node, OF_POPULATED);
Ricardo Ribalda Delgado971451b2016-07-05 18:23:33 +0200182 return clk;
Rajan Vajaf6dab422018-07-17 06:17:00 -0700183 }
Ricardo Ribalda Delgado971451b2016-07-05 18:23:33 +0200184
185 ret = of_clk_add_provider(node, of_clk_src_simple_get, clk);
186 if (ret) {
187 clk_unregister(clk);
188 return ERR_PTR(ret);
189 }
190
191 return clk;
192}
193
194/**
195 * of_fixed_factor_clk_setup() - Setup function for simple fixed factor clock
196 */
197void __init of_fixed_factor_clk_setup(struct device_node *node)
198{
199 _of_fixed_factor_clk_setup(node);
Gregory CLEMENT79b16642013-04-12 13:57:44 +0200200}
Gregory CLEMENT79b16642013-04-12 13:57:44 +0200201CLK_OF_DECLARE(fixed_factor_clk, "fixed-factor-clock",
202 of_fixed_factor_clk_setup);
Ricardo Ribalda Delgado971451b2016-07-05 18:23:33 +0200203
204static int of_fixed_factor_clk_remove(struct platform_device *pdev)
205{
206 struct clk *clk = platform_get_drvdata(pdev);
207
Ricardo Ribalda Delgadof98e8a52018-11-01 14:15:49 +0100208 of_clk_del_provider(pdev->dev.of_node);
Ricardo Ribalda Delgado971451b2016-07-05 18:23:33 +0200209 clk_unregister_fixed_factor(clk);
210
211 return 0;
212}
213
214static int of_fixed_factor_clk_probe(struct platform_device *pdev)
215{
216 struct clk *clk;
217
218 /*
219 * This function is not executed when of_fixed_factor_clk_setup
220 * succeeded.
221 */
222 clk = _of_fixed_factor_clk_setup(pdev->dev.of_node);
223 if (IS_ERR(clk))
224 return PTR_ERR(clk);
225
226 platform_set_drvdata(pdev, clk);
227
228 return 0;
229}
230
231static const struct of_device_id of_fixed_factor_clk_ids[] = {
232 { .compatible = "fixed-factor-clock" },
233 { }
234};
235MODULE_DEVICE_TABLE(of, of_fixed_factor_clk_ids);
236
237static struct platform_driver of_fixed_factor_clk_driver = {
238 .driver = {
239 .name = "of_fixed_factor_clk",
240 .of_match_table = of_fixed_factor_clk_ids,
241 },
242 .probe = of_fixed_factor_clk_probe,
243 .remove = of_fixed_factor_clk_remove,
244};
245builtin_platform_driver(of_fixed_factor_clk_driver);
Gregory CLEMENT79b16642013-04-12 13:57:44 +0200246#endif