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Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +09001/*
2 * Renesas R-Car Gen3 for USB2.0 PHY driver
3 *
4 * Copyright (C) 2015 Renesas Electronics Corporation
5 *
6 * This is based on the phy-rcar-gen2 driver:
7 * Copyright (C) 2014 Renesas Solutions Corp.
8 * Copyright (C) 2014 Cogent Embedded, Inc.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
Yoshihiro Shimoda2b385432016-04-29 14:22:25 +053015#include <linux/extcon.h>
Yoshihiro Shimoda9f391c52015-11-30 10:44:32 +090016#include <linux/interrupt.h>
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +090017#include <linux/io.h>
18#include <linux/module.h>
19#include <linux/of.h>
20#include <linux/of_address.h>
21#include <linux/phy/phy.h>
22#include <linux/platform_device.h>
Yoshihiro Shimoda6dcfd7c2016-03-03 19:09:05 +090023#include <linux/regulator/consumer.h>
Yoshihiro Shimodac14f8a402016-06-27 15:36:53 +090024#include <linux/workqueue.h>
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +090025
26/******* USB2.0 Host registers (original offset is +0x200) *******/
27#define USB2_INT_ENABLE 0x000
28#define USB2_USBCTR 0x00c
29#define USB2_SPD_RSM_TIMSET 0x10c
30#define USB2_OC_TIMSET 0x110
Yoshihiro Shimoda1114e2d2015-11-30 10:44:31 +090031#define USB2_COMMCTRL 0x600
Yoshihiro Shimoda9f391c52015-11-30 10:44:32 +090032#define USB2_OBINTSTA 0x604
33#define USB2_OBINTEN 0x608
Yoshihiro Shimoda1114e2d2015-11-30 10:44:31 +090034#define USB2_VBCTRL 0x60c
35#define USB2_LINECTRL1 0x610
36#define USB2_ADPCTRL 0x630
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +090037
38/* INT_ENABLE */
Yoshihiro Shimoda9f391c52015-11-30 10:44:32 +090039#define USB2_INT_ENABLE_UCOM_INTEN BIT(3)
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +090040#define USB2_INT_ENABLE_USBH_INTB_EN BIT(2)
41#define USB2_INT_ENABLE_USBH_INTA_EN BIT(1)
Yoshihiro Shimoda9f391c52015-11-30 10:44:32 +090042#define USB2_INT_ENABLE_INIT (USB2_INT_ENABLE_UCOM_INTEN | \
43 USB2_INT_ENABLE_USBH_INTB_EN | \
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +090044 USB2_INT_ENABLE_USBH_INTA_EN)
45
46/* USBCTR */
47#define USB2_USBCTR_DIRPD BIT(2)
48#define USB2_USBCTR_PLL_RST BIT(1)
49
50/* SPD_RSM_TIMSET */
51#define USB2_SPD_RSM_TIMSET_INIT 0x014e029b
52
53/* OC_TIMSET */
54#define USB2_OC_TIMSET_INIT 0x000209ab
55
Yoshihiro Shimoda1114e2d2015-11-30 10:44:31 +090056/* COMMCTRL */
57#define USB2_COMMCTRL_OTG_PERI BIT(31) /* 1 = Peripheral mode */
58
Yoshihiro Shimoda9f391c52015-11-30 10:44:32 +090059/* OBINTSTA and OBINTEN */
60#define USB2_OBINT_SESSVLDCHG BIT(12)
61#define USB2_OBINT_IDDIGCHG BIT(11)
62#define USB2_OBINT_BITS (USB2_OBINT_SESSVLDCHG | \
63 USB2_OBINT_IDDIGCHG)
64
Yoshihiro Shimoda1114e2d2015-11-30 10:44:31 +090065/* VBCTRL */
66#define USB2_VBCTRL_DRVVBUSSEL BIT(8)
67
68/* LINECTRL1 */
69#define USB2_LINECTRL1_DPRPD_EN BIT(19)
70#define USB2_LINECTRL1_DP_RPD BIT(18)
71#define USB2_LINECTRL1_DMRPD_EN BIT(17)
72#define USB2_LINECTRL1_DM_RPD BIT(16)
Yoshihiro Shimoda9bb86772016-11-09 11:30:25 +090073#define USB2_LINECTRL1_OPMODE_NODRV BIT(6)
Yoshihiro Shimoda1114e2d2015-11-30 10:44:31 +090074
75/* ADPCTRL */
76#define USB2_ADPCTRL_OTGSESSVLD BIT(20)
77#define USB2_ADPCTRL_IDDIG BIT(19)
78#define USB2_ADPCTRL_IDPULLUP BIT(5) /* 1 = ID sampling is enabled */
79#define USB2_ADPCTRL_DRVVBUS BIT(4)
80
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +090081struct rcar_gen3_chan {
Yoshihiro Shimoda801a69c2016-03-03 19:09:04 +090082 void __iomem *base;
Yoshihiro Shimoda2b385432016-04-29 14:22:25 +053083 struct extcon_dev *extcon;
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +090084 struct phy *phy;
Yoshihiro Shimoda6dcfd7c2016-03-03 19:09:05 +090085 struct regulator *vbus;
Yoshihiro Shimodac14f8a402016-06-27 15:36:53 +090086 struct work_struct work;
87 bool extcon_host;
Yoshihiro Shimodab9564012016-01-07 18:16:44 +090088 bool has_otg;
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +090089};
90
Yoshihiro Shimodac14f8a402016-06-27 15:36:53 +090091static void rcar_gen3_phy_usb2_work(struct work_struct *work)
92{
93 struct rcar_gen3_chan *ch = container_of(work, struct rcar_gen3_chan,
94 work);
95
96 if (ch->extcon_host) {
Chanwoo Choic6f30a52016-12-30 13:11:28 +090097 extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, true);
98 extcon_set_state_sync(ch->extcon, EXTCON_USB, false);
Yoshihiro Shimodac14f8a402016-06-27 15:36:53 +090099 } else {
Chanwoo Choic6f30a52016-12-30 13:11:28 +0900100 extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, false);
101 extcon_set_state_sync(ch->extcon, EXTCON_USB, true);
Yoshihiro Shimodac14f8a402016-06-27 15:36:53 +0900102 }
103}
104
Yoshihiro Shimoda1114e2d2015-11-30 10:44:31 +0900105static void rcar_gen3_set_host_mode(struct rcar_gen3_chan *ch, int host)
106{
Yoshihiro Shimoda801a69c2016-03-03 19:09:04 +0900107 void __iomem *usb2_base = ch->base;
Yoshihiro Shimoda1114e2d2015-11-30 10:44:31 +0900108 u32 val = readl(usb2_base + USB2_COMMCTRL);
109
110 dev_vdbg(&ch->phy->dev, "%s: %08x, %d\n", __func__, val, host);
111 if (host)
112 val &= ~USB2_COMMCTRL_OTG_PERI;
113 else
114 val |= USB2_COMMCTRL_OTG_PERI;
115 writel(val, usb2_base + USB2_COMMCTRL);
116}
117
118static void rcar_gen3_set_linectrl(struct rcar_gen3_chan *ch, int dp, int dm)
119{
Yoshihiro Shimoda801a69c2016-03-03 19:09:04 +0900120 void __iomem *usb2_base = ch->base;
Yoshihiro Shimoda1114e2d2015-11-30 10:44:31 +0900121 u32 val = readl(usb2_base + USB2_LINECTRL1);
122
123 dev_vdbg(&ch->phy->dev, "%s: %08x, %d, %d\n", __func__, val, dp, dm);
124 val &= ~(USB2_LINECTRL1_DP_RPD | USB2_LINECTRL1_DM_RPD);
125 if (dp)
126 val |= USB2_LINECTRL1_DP_RPD;
127 if (dm)
128 val |= USB2_LINECTRL1_DM_RPD;
129 writel(val, usb2_base + USB2_LINECTRL1);
130}
131
132static void rcar_gen3_enable_vbus_ctrl(struct rcar_gen3_chan *ch, int vbus)
133{
Yoshihiro Shimoda801a69c2016-03-03 19:09:04 +0900134 void __iomem *usb2_base = ch->base;
Yoshihiro Shimoda1114e2d2015-11-30 10:44:31 +0900135 u32 val = readl(usb2_base + USB2_ADPCTRL);
136
137 dev_vdbg(&ch->phy->dev, "%s: %08x, %d\n", __func__, val, vbus);
138 if (vbus)
139 val |= USB2_ADPCTRL_DRVVBUS;
140 else
141 val &= ~USB2_ADPCTRL_DRVVBUS;
142 writel(val, usb2_base + USB2_ADPCTRL);
143}
144
145static void rcar_gen3_init_for_host(struct rcar_gen3_chan *ch)
146{
147 rcar_gen3_set_linectrl(ch, 1, 1);
148 rcar_gen3_set_host_mode(ch, 1);
149 rcar_gen3_enable_vbus_ctrl(ch, 1);
Yoshihiro Shimoda2b385432016-04-29 14:22:25 +0530150
Yoshihiro Shimodac14f8a402016-06-27 15:36:53 +0900151 ch->extcon_host = true;
152 schedule_work(&ch->work);
Yoshihiro Shimoda1114e2d2015-11-30 10:44:31 +0900153}
154
155static void rcar_gen3_init_for_peri(struct rcar_gen3_chan *ch)
156{
157 rcar_gen3_set_linectrl(ch, 0, 1);
158 rcar_gen3_set_host_mode(ch, 0);
159 rcar_gen3_enable_vbus_ctrl(ch, 0);
Yoshihiro Shimoda2b385432016-04-29 14:22:25 +0530160
Yoshihiro Shimodac14f8a402016-06-27 15:36:53 +0900161 ch->extcon_host = false;
162 schedule_work(&ch->work);
Yoshihiro Shimoda1114e2d2015-11-30 10:44:31 +0900163}
164
Yoshihiro Shimoda9bb86772016-11-09 11:30:25 +0900165static void rcar_gen3_init_for_b_host(struct rcar_gen3_chan *ch)
166{
167 void __iomem *usb2_base = ch->base;
168 u32 val;
169
170 val = readl(usb2_base + USB2_LINECTRL1);
171 writel(val | USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1);
172
173 rcar_gen3_set_linectrl(ch, 1, 1);
174 rcar_gen3_set_host_mode(ch, 1);
175 rcar_gen3_enable_vbus_ctrl(ch, 0);
176
177 val = readl(usb2_base + USB2_LINECTRL1);
178 writel(val & ~USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1);
179}
180
181static void rcar_gen3_init_for_a_peri(struct rcar_gen3_chan *ch)
182{
183 rcar_gen3_set_linectrl(ch, 0, 1);
184 rcar_gen3_set_host_mode(ch, 0);
185 rcar_gen3_enable_vbus_ctrl(ch, 1);
186}
187
188static void rcar_gen3_init_from_a_peri_to_a_host(struct rcar_gen3_chan *ch)
189{
190 void __iomem *usb2_base = ch->base;
191 u32 val;
192
193 val = readl(usb2_base + USB2_OBINTEN);
194 writel(val & ~USB2_OBINT_BITS, usb2_base + USB2_OBINTEN);
195
196 rcar_gen3_enable_vbus_ctrl(ch, 0);
197 rcar_gen3_init_for_host(ch);
198
199 writel(val | USB2_OBINT_BITS, usb2_base + USB2_OBINTEN);
200}
201
Yoshihiro Shimoda1114e2d2015-11-30 10:44:31 +0900202static bool rcar_gen3_check_id(struct rcar_gen3_chan *ch)
203{
Yoshihiro Shimoda801a69c2016-03-03 19:09:04 +0900204 return !!(readl(ch->base + USB2_ADPCTRL) & USB2_ADPCTRL_IDDIG);
Yoshihiro Shimoda1114e2d2015-11-30 10:44:31 +0900205}
206
207static void rcar_gen3_device_recognition(struct rcar_gen3_chan *ch)
208{
Yoshihiro Shimoda67629252016-05-31 21:47:17 +0900209 if (!rcar_gen3_check_id(ch))
Yoshihiro Shimoda1114e2d2015-11-30 10:44:31 +0900210 rcar_gen3_init_for_host(ch);
211 else
212 rcar_gen3_init_for_peri(ch);
213}
214
Yoshihiro Shimoda9bb86772016-11-09 11:30:25 +0900215static bool rcar_gen3_is_host(struct rcar_gen3_chan *ch)
216{
217 return !(readl(ch->base + USB2_COMMCTRL) & USB2_COMMCTRL_OTG_PERI);
218}
219
220static ssize_t role_store(struct device *dev, struct device_attribute *attr,
221 const char *buf, size_t count)
222{
223 struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
224 bool is_b_device, is_host, new_mode_is_host;
225
226 if (!ch->has_otg || !ch->phy->init_count)
227 return -EIO;
228
229 /*
230 * is_b_device: true is B-Device. false is A-Device.
231 * If {new_mode_}is_host: true is Host mode. false is Peripheral mode.
232 */
233 is_b_device = rcar_gen3_check_id(ch);
234 is_host = rcar_gen3_is_host(ch);
235 if (!strncmp(buf, "host", strlen("host")))
236 new_mode_is_host = true;
237 else if (!strncmp(buf, "peripheral", strlen("peripheral")))
238 new_mode_is_host = false;
239 else
240 return -EINVAL;
241
242 /* If current and new mode is the same, this returns the error */
243 if (is_host == new_mode_is_host)
244 return -EINVAL;
245
246 if (new_mode_is_host) { /* And is_host must be false */
247 if (!is_b_device) /* A-Peripheral */
248 rcar_gen3_init_from_a_peri_to_a_host(ch);
249 else /* B-Peripheral */
250 rcar_gen3_init_for_b_host(ch);
251 } else { /* And is_host must be true */
252 if (!is_b_device) /* A-Host */
253 rcar_gen3_init_for_a_peri(ch);
254 else /* B-Host */
255 rcar_gen3_init_for_peri(ch);
256 }
257
258 return count;
259}
260
261static ssize_t role_show(struct device *dev, struct device_attribute *attr,
262 char *buf)
263{
264 struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
265
266 if (!ch->has_otg || !ch->phy->init_count)
267 return -EIO;
268
269 return sprintf(buf, "%s\n", rcar_gen3_is_host(ch) ? "host" :
270 "peripheral");
271}
272static DEVICE_ATTR_RW(role);
273
Yoshihiro Shimoda1114e2d2015-11-30 10:44:31 +0900274static void rcar_gen3_init_otg(struct rcar_gen3_chan *ch)
275{
Yoshihiro Shimoda801a69c2016-03-03 19:09:04 +0900276 void __iomem *usb2_base = ch->base;
Yoshihiro Shimoda1114e2d2015-11-30 10:44:31 +0900277 u32 val;
278
279 val = readl(usb2_base + USB2_VBCTRL);
280 writel(val | USB2_VBCTRL_DRVVBUSSEL, usb2_base + USB2_VBCTRL);
Yoshihiro Shimoda9f391c52015-11-30 10:44:32 +0900281 writel(USB2_OBINT_BITS, usb2_base + USB2_OBINTSTA);
282 val = readl(usb2_base + USB2_OBINTEN);
283 writel(val | USB2_OBINT_BITS, usb2_base + USB2_OBINTEN);
Yoshihiro Shimoda1114e2d2015-11-30 10:44:31 +0900284 val = readl(usb2_base + USB2_ADPCTRL);
285 writel(val | USB2_ADPCTRL_IDPULLUP, usb2_base + USB2_ADPCTRL);
286 val = readl(usb2_base + USB2_LINECTRL1);
287 rcar_gen3_set_linectrl(ch, 0, 0);
288 writel(val | USB2_LINECTRL1_DPRPD_EN | USB2_LINECTRL1_DMRPD_EN,
289 usb2_base + USB2_LINECTRL1);
290
291 rcar_gen3_device_recognition(ch);
292}
293
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +0900294static int rcar_gen3_phy_usb2_init(struct phy *p)
295{
296 struct rcar_gen3_chan *channel = phy_get_drvdata(p);
Yoshihiro Shimoda801a69c2016-03-03 19:09:04 +0900297 void __iomem *usb2_base = channel->base;
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +0900298
299 /* Initialize USB2 part */
300 writel(USB2_INT_ENABLE_INIT, usb2_base + USB2_INT_ENABLE);
301 writel(USB2_SPD_RSM_TIMSET_INIT, usb2_base + USB2_SPD_RSM_TIMSET);
302 writel(USB2_OC_TIMSET_INIT, usb2_base + USB2_OC_TIMSET);
303
Yoshihiro Shimodab9564012016-01-07 18:16:44 +0900304 /* Initialize otg part */
305 if (channel->has_otg)
Yoshihiro Shimoda1114e2d2015-11-30 10:44:31 +0900306 rcar_gen3_init_otg(channel);
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +0900307
308 return 0;
309}
310
311static int rcar_gen3_phy_usb2_exit(struct phy *p)
312{
313 struct rcar_gen3_chan *channel = phy_get_drvdata(p);
314
Yoshihiro Shimoda801a69c2016-03-03 19:09:04 +0900315 writel(0, channel->base + USB2_INT_ENABLE);
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +0900316
317 return 0;
318}
319
320static int rcar_gen3_phy_usb2_power_on(struct phy *p)
321{
322 struct rcar_gen3_chan *channel = phy_get_drvdata(p);
Yoshihiro Shimoda801a69c2016-03-03 19:09:04 +0900323 void __iomem *usb2_base = channel->base;
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +0900324 u32 val;
Yoshihiro Shimoda6dcfd7c2016-03-03 19:09:05 +0900325 int ret;
326
327 if (channel->vbus) {
328 ret = regulator_enable(channel->vbus);
329 if (ret)
330 return ret;
331 }
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +0900332
333 val = readl(usb2_base + USB2_USBCTR);
334 val |= USB2_USBCTR_PLL_RST;
335 writel(val, usb2_base + USB2_USBCTR);
336 val &= ~USB2_USBCTR_PLL_RST;
337 writel(val, usb2_base + USB2_USBCTR);
338
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +0900339 return 0;
340}
341
Yoshihiro Shimoda6dcfd7c2016-03-03 19:09:05 +0900342static int rcar_gen3_phy_usb2_power_off(struct phy *p)
343{
344 struct rcar_gen3_chan *channel = phy_get_drvdata(p);
345 int ret = 0;
346
347 if (channel->vbus)
348 ret = regulator_disable(channel->vbus);
349
350 return ret;
351}
352
Bhumika Goyala8df2762017-01-08 16:05:56 +0530353static const struct phy_ops rcar_gen3_phy_usb2_ops = {
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +0900354 .init = rcar_gen3_phy_usb2_init,
355 .exit = rcar_gen3_phy_usb2_exit,
356 .power_on = rcar_gen3_phy_usb2_power_on,
Yoshihiro Shimoda6dcfd7c2016-03-03 19:09:05 +0900357 .power_off = rcar_gen3_phy_usb2_power_off,
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +0900358 .owner = THIS_MODULE,
359};
360
Yoshihiro Shimoda9f391c52015-11-30 10:44:32 +0900361static irqreturn_t rcar_gen3_phy_usb2_irq(int irq, void *_ch)
362{
363 struct rcar_gen3_chan *ch = _ch;
Yoshihiro Shimoda801a69c2016-03-03 19:09:04 +0900364 void __iomem *usb2_base = ch->base;
Yoshihiro Shimoda9f391c52015-11-30 10:44:32 +0900365 u32 status = readl(usb2_base + USB2_OBINTSTA);
366 irqreturn_t ret = IRQ_NONE;
367
368 if (status & USB2_OBINT_BITS) {
369 dev_vdbg(&ch->phy->dev, "%s: %08x\n", __func__, status);
370 writel(USB2_OBINT_BITS, usb2_base + USB2_OBINTSTA);
371 rcar_gen3_device_recognition(ch);
372 ret = IRQ_HANDLED;
373 }
374
375 return ret;
376}
377
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +0900378static const struct of_device_id rcar_gen3_phy_usb2_match_table[] = {
379 { .compatible = "renesas,usb2-phy-r8a7795" },
Yoshihiro Shimoda800dcc32016-08-24 15:49:22 +0900380 { .compatible = "renesas,usb2-phy-r8a7796" },
Simon Hormancde7bc32016-03-07 10:58:41 +0900381 { .compatible = "renesas,rcar-gen3-usb2-phy" },
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +0900382 { }
383};
384MODULE_DEVICE_TABLE(of, rcar_gen3_phy_usb2_match_table);
385
Yoshihiro Shimoda2b385432016-04-29 14:22:25 +0530386static const unsigned int rcar_gen3_phy_cable[] = {
387 EXTCON_USB,
388 EXTCON_USB_HOST,
389 EXTCON_NONE,
390};
391
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +0900392static int rcar_gen3_phy_usb2_probe(struct platform_device *pdev)
393{
394 struct device *dev = &pdev->dev;
395 struct rcar_gen3_chan *channel;
396 struct phy_provider *provider;
397 struct resource *res;
Yoshihiro Shimodab9564012016-01-07 18:16:44 +0900398 int irq;
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +0900399
400 if (!dev->of_node) {
401 dev_err(dev, "This driver needs device tree\n");
402 return -EINVAL;
403 }
404
405 channel = devm_kzalloc(dev, sizeof(*channel), GFP_KERNEL);
406 if (!channel)
407 return -ENOMEM;
408
Yoshihiro Shimodab9564012016-01-07 18:16:44 +0900409 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
Yoshihiro Shimoda801a69c2016-03-03 19:09:04 +0900410 channel->base = devm_ioremap_resource(dev, res);
411 if (IS_ERR(channel->base))
412 return PTR_ERR(channel->base);
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +0900413
Yoshihiro Shimodab9564012016-01-07 18:16:44 +0900414 /* call request_irq for OTG */
415 irq = platform_get_irq(pdev, 0);
416 if (irq >= 0) {
Yoshihiro Shimoda2b385432016-04-29 14:22:25 +0530417 int ret;
418
Yoshihiro Shimodac14f8a402016-06-27 15:36:53 +0900419 INIT_WORK(&channel->work, rcar_gen3_phy_usb2_work);
Yoshihiro Shimodab9564012016-01-07 18:16:44 +0900420 irq = devm_request_irq(dev, irq, rcar_gen3_phy_usb2_irq,
421 IRQF_SHARED, dev_name(dev), channel);
Yoshihiro Shimoda9f391c52015-11-30 10:44:32 +0900422 if (irq < 0)
423 dev_err(dev, "No irq handler (%d)\n", irq);
Yoshihiro Shimodab9564012016-01-07 18:16:44 +0900424 channel->has_otg = true;
Yoshihiro Shimoda2b385432016-04-29 14:22:25 +0530425 channel->extcon = devm_extcon_dev_allocate(dev,
426 rcar_gen3_phy_cable);
427 if (IS_ERR(channel->extcon))
428 return PTR_ERR(channel->extcon);
429
430 ret = devm_extcon_dev_register(dev, channel->extcon);
431 if (ret < 0) {
432 dev_err(dev, "Failed to register extcon\n");
433 return ret;
434 }
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +0900435 }
436
437 /* devm_phy_create() will call pm_runtime_enable(dev); */
438 channel->phy = devm_phy_create(dev, NULL, &rcar_gen3_phy_usb2_ops);
439 if (IS_ERR(channel->phy)) {
440 dev_err(dev, "Failed to create USB2 PHY\n");
441 return PTR_ERR(channel->phy);
442 }
443
Yoshihiro Shimoda6dcfd7c2016-03-03 19:09:05 +0900444 channel->vbus = devm_regulator_get_optional(dev, "vbus");
445 if (IS_ERR(channel->vbus)) {
446 if (PTR_ERR(channel->vbus) == -EPROBE_DEFER)
447 return PTR_ERR(channel->vbus);
448 channel->vbus = NULL;
449 }
450
Yoshihiro Shimoda9bb86772016-11-09 11:30:25 +0900451 platform_set_drvdata(pdev, channel);
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +0900452 phy_set_drvdata(channel->phy, channel);
453
454 provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
Yoshihiro Shimoda9bb86772016-11-09 11:30:25 +0900455 if (IS_ERR(provider)) {
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +0900456 dev_err(dev, "Failed to register PHY provider\n");
Yoshihiro Shimoda9bb86772016-11-09 11:30:25 +0900457 } else if (channel->has_otg) {
458 int ret;
459
460 ret = device_create_file(dev, &dev_attr_role);
461 if (ret < 0)
462 return ret;
463 }
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +0900464
465 return PTR_ERR_OR_ZERO(provider);
466}
467
Yoshihiro Shimoda9bb86772016-11-09 11:30:25 +0900468static int rcar_gen3_phy_usb2_remove(struct platform_device *pdev)
469{
470 struct rcar_gen3_chan *channel = platform_get_drvdata(pdev);
471
472 if (channel->has_otg)
473 device_remove_file(&pdev->dev, &dev_attr_role);
474
475 return 0;
476};
477
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +0900478static struct platform_driver rcar_gen3_phy_usb2_driver = {
479 .driver = {
480 .name = "phy_rcar_gen3_usb2",
481 .of_match_table = rcar_gen3_phy_usb2_match_table,
482 },
483 .probe = rcar_gen3_phy_usb2_probe,
Yoshihiro Shimoda9bb86772016-11-09 11:30:25 +0900484 .remove = rcar_gen3_phy_usb2_remove,
Yoshihiro Shimodaf3b5a8d2015-11-30 10:44:30 +0900485};
486module_platform_driver(rcar_gen3_phy_usb2_driver);
487
488MODULE_LICENSE("GPL v2");
489MODULE_DESCRIPTION("Renesas R-Car Gen3 USB 2.0 PHY");
490MODULE_AUTHOR("Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>");