blob: 4d2cdec4cb780eca808eadab525bc3ef4d84169c [file] [log] [blame]
Greg Kroah-Hartman5fd54ac2017-11-03 11:28:30 +01001// SPDX-License-Identifier: GPL-2.0+
Benoit Goby79ad3b52011-03-09 16:28:56 -08002/*
3 * EHCI-compliant USB host controller driver for NVIDIA Tegra SoCs
4 *
5 * Copyright (C) 2010 Google, Inc.
Venu Byravarasubbdabdb2013-01-17 20:15:37 +00006 * Copyright (C) 2009 - 2013 NVIDIA Corporation
Benoit Goby79ad3b52011-03-09 16:28:56 -08007 */
8
9#include <linux/clk.h>
Manjunath Goudar9fc5f242013-06-13 11:24:12 -060010#include <linux/dma-mapping.h>
Kishon Vijay Abraham Ided017e2012-06-26 17:40:32 +053011#include <linux/err.h>
Olof Johansson4a53f4e2011-11-04 09:12:40 +000012#include <linux/gpio.h>
Manjunath Goudar9fc5f242013-06-13 11:24:12 -060013#include <linux/io.h>
14#include <linux/irq.h>
15#include <linux/module.h>
Olof Johansson4a53f4e2011-11-04 09:12:40 +000016#include <linux/of.h>
Tuomas Tynkkynen327d8b42013-08-12 16:06:54 +030017#include <linux/of_device.h>
Olof Johansson4a53f4e2011-11-04 09:12:40 +000018#include <linux/of_gpio.h>
Manjunath Goudar9fc5f242013-06-13 11:24:12 -060019#include <linux/platform_device.h>
Alan Sternebf20de2012-05-01 11:28:49 -040020#include <linux/pm_runtime.h>
Stephen Warren75606f52013-11-06 16:53:58 -070021#include <linux/reset.h>
Manjunath Goudar9fc5f242013-06-13 11:24:12 -060022#include <linux/slab.h>
Venu Byravarasubbdabdb2013-01-17 20:15:37 +000023#include <linux/usb/ehci_def.h>
Venu Byravarasu1ba82162012-09-05 18:50:23 +053024#include <linux/usb/tegra_usb_phy.h>
Manjunath Goudar9fc5f242013-06-13 11:24:12 -060025#include <linux/usb.h>
26#include <linux/usb/hcd.h>
27#include <linux/usb/otg.h>
28
29#include "ehci.h"
Stephen Warren54388b22012-10-02 16:49:25 -060030
Manjunath Goudar9fc5f242013-06-13 11:24:12 -060031#define PORT_WAKE_BITS (PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E)
32
Robert Morellfbf98652011-03-09 16:28:57 -080033#define TEGRA_USB_DMA_ALIGN 32
34
Manjunath Goudar9fc5f242013-06-13 11:24:12 -060035#define DRIVER_DESC "Tegra EHCI driver"
36#define DRV_NAME "tegra-ehci"
37
38static struct hc_driver __read_mostly tegra_ehci_hc_driver;
39
Tuomas Tynkkynen327d8b42013-08-12 16:06:54 +030040struct tegra_ehci_soc_config {
41 bool has_hostpc;
42};
43
Benoit Goby79ad3b52011-03-09 16:28:56 -080044struct tegra_ehci_hcd {
Benoit Goby79ad3b52011-03-09 16:28:56 -080045 struct tegra_usb_phy *phy;
46 struct clk *clk;
Stephen Warren75606f52013-11-06 16:53:58 -070047 struct reset_control *rst;
Benoit Goby79ad3b52011-03-09 16:28:56 -080048 int port_resuming;
Venu Byravarasu585355c2012-12-13 20:59:08 +000049 bool needs_double_reset;
Benoit Goby79ad3b52011-03-09 16:28:56 -080050 enum tegra_usb_phy_port_speed port_speed;
51};
52
Tuomas Tynkkynena47cc242014-07-04 04:09:38 +030053static int tegra_reset_usb_controller(struct platform_device *pdev)
54{
55 struct device_node *phy_np;
56 struct usb_hcd *hcd = platform_get_drvdata(pdev);
57 struct tegra_ehci_hcd *tegra =
58 (struct tegra_ehci_hcd *)hcd_to_ehci(hcd)->priv;
Dmitry Osipenko14347032018-04-10 01:02:58 +030059 struct reset_control *rst;
60 int err;
Tuomas Tynkkynena47cc242014-07-04 04:09:38 +030061
62 phy_np = of_parse_phandle(pdev->dev.of_node, "nvidia,phy", 0);
63 if (!phy_np)
64 return -ENOENT;
65
Dmitry Osipenko14347032018-04-10 01:02:58 +030066 /*
67 * The 1st USB controller contains some UTMI pad registers that are
68 * global for all the controllers on the chip. Those registers are
69 * also cleared when reset is asserted to the 1st controller.
70 */
71 rst = of_reset_control_get_shared(phy_np, "utmi-pads");
72 if (IS_ERR(rst)) {
73 dev_warn(&pdev->dev,
74 "can't get utmi-pads reset from the PHY\n");
75 dev_warn(&pdev->dev,
76 "continuing, but please update your DT\n");
77 } else {
78 /*
79 * PHY driver performs UTMI-pads reset in a case of
80 * non-legacy DT.
81 */
82 reset_control_put(rst);
Tuomas Tynkkynena47cc242014-07-04 04:09:38 +030083 }
84
85 of_node_put(phy_np);
86
Dmitry Osipenko14347032018-04-10 01:02:58 +030087 /* reset control is shared, hence initialize it first */
88 err = reset_control_deassert(tegra->rst);
89 if (err)
90 return err;
91
92 err = reset_control_assert(tegra->rst);
93 if (err)
94 return err;
95
96 udelay(1);
97
98 err = reset_control_deassert(tegra->rst);
99 if (err)
100 return err;
101
Tuomas Tynkkynena47cc242014-07-04 04:09:38 +0300102 return 0;
103}
104
Jim Lin1f594b62011-04-17 11:58:25 +0300105static int tegra_ehci_internal_port_reset(
106 struct ehci_hcd *ehci,
107 u32 __iomem *portsc_reg
108)
109{
110 u32 temp;
111 unsigned long flags;
112 int retval = 0;
113 int i, tries;
114 u32 saved_usbintr;
115
116 spin_lock_irqsave(&ehci->lock, flags);
117 saved_usbintr = ehci_readl(ehci, &ehci->regs->intr_enable);
118 /* disable USB interrupt */
119 ehci_writel(ehci, 0, &ehci->regs->intr_enable);
120 spin_unlock_irqrestore(&ehci->lock, flags);
121
122 /*
123 * Here we have to do Port Reset at most twice for
124 * Port Enable bit to be set.
125 */
126 for (i = 0; i < 2; i++) {
127 temp = ehci_readl(ehci, portsc_reg);
128 temp |= PORT_RESET;
129 ehci_writel(ehci, temp, portsc_reg);
130 mdelay(10);
131 temp &= ~PORT_RESET;
132 ehci_writel(ehci, temp, portsc_reg);
133 mdelay(1);
134 tries = 100;
135 do {
136 mdelay(1);
137 /*
138 * Up to this point, Port Enable bit is
139 * expected to be set after 2 ms waiting.
140 * USB1 usually takes extra 45 ms, for safety,
141 * we take 100 ms as timeout.
142 */
143 temp = ehci_readl(ehci, portsc_reg);
144 } while (!(temp & PORT_PE) && tries--);
145 if (temp & PORT_PE)
146 break;
147 }
148 if (i == 2)
149 retval = -ETIMEDOUT;
150
151 /*
152 * Clear Connect Status Change bit if it's set.
153 * We can't clear PORT_PEC. It will also cause PORT_PE to be cleared.
154 */
155 if (temp & PORT_CSC)
156 ehci_writel(ehci, PORT_CSC, portsc_reg);
157
158 /*
159 * Write to clear any interrupt status bits that might be set
160 * during port reset.
161 */
162 temp = ehci_readl(ehci, &ehci->regs->status);
163 ehci_writel(ehci, temp, &ehci->regs->status);
164
165 /* restore original interrupt enable bits */
166 ehci_writel(ehci, saved_usbintr, &ehci->regs->intr_enable);
167 return retval;
168}
169
Benoit Goby79ad3b52011-03-09 16:28:56 -0800170static int tegra_ehci_hub_control(
171 struct usb_hcd *hcd,
172 u16 typeReq,
173 u16 wValue,
174 u16 wIndex,
175 char *buf,
176 u16 wLength
177)
178{
Stephen Warrenc19d14d2013-06-13 11:24:13 -0600179 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
180 struct tegra_ehci_hcd *tegra = (struct tegra_ehci_hcd *)ehci->priv;
Benoit Goby79ad3b52011-03-09 16:28:56 -0800181 u32 __iomem *status_reg;
182 u32 temp;
183 unsigned long flags;
184 int retval = 0;
185
186 status_reg = &ehci->regs->port_status[(wIndex & 0xff) - 1];
187
188 spin_lock_irqsave(&ehci->lock, flags);
189
Stephen Warren6d5f89c2012-04-18 15:32:46 -0600190 if (typeReq == GetPortStatus) {
Benoit Goby79ad3b52011-03-09 16:28:56 -0800191 temp = ehci_readl(ehci, status_reg);
192 if (tegra->port_resuming && !(temp & PORT_SUSPEND)) {
193 /* Resume completed, re-enable disconnect detection */
194 tegra->port_resuming = 0;
Antoine Tenart3d46e732014-09-24 23:05:50 +0400195 tegra_usb_phy_postresume(hcd->usb_phy);
Benoit Goby79ad3b52011-03-09 16:28:56 -0800196 }
197 }
198
199 else if (typeReq == SetPortFeature && wValue == USB_PORT_FEAT_SUSPEND) {
200 temp = ehci_readl(ehci, status_reg);
201 if ((temp & PORT_PE) == 0 || (temp & PORT_RESET) != 0) {
202 retval = -EPIPE;
203 goto done;
204 }
205
Stephen Warrenb0876572012-04-25 12:31:10 -0600206 temp &= ~(PORT_RWC_BITS | PORT_WKCONN_E);
Benoit Goby79ad3b52011-03-09 16:28:56 -0800207 temp |= PORT_WKDISC_E | PORT_WKOC_E;
208 ehci_writel(ehci, temp | PORT_SUSPEND, status_reg);
209
210 /*
211 * If a transaction is in progress, there may be a delay in
212 * suspending the port. Poll until the port is suspended.
213 */
Manjunath Goudar2f3a6b82013-06-13 11:24:09 -0600214 if (ehci_handshake(ehci, status_reg, PORT_SUSPEND,
Benoit Goby79ad3b52011-03-09 16:28:56 -0800215 PORT_SUSPEND, 5000))
216 pr_err("%s: timeout waiting for SUSPEND\n", __func__);
217
218 set_bit((wIndex & 0xff) - 1, &ehci->suspended_ports);
219 goto done;
220 }
221
Jim Lin1f594b62011-04-17 11:58:25 +0300222 /* For USB1 port we need to issue Port Reset twice internally */
Venu Byravarasu585355c2012-12-13 20:59:08 +0000223 if (tegra->needs_double_reset &&
Jim Lin1f594b62011-04-17 11:58:25 +0300224 (typeReq == SetPortFeature && wValue == USB_PORT_FEAT_RESET)) {
225 spin_unlock_irqrestore(&ehci->lock, flags);
226 return tegra_ehci_internal_port_reset(ehci, status_reg);
227 }
228
Benoit Goby79ad3b52011-03-09 16:28:56 -0800229 /*
230 * Tegra host controller will time the resume operation to clear the bit
231 * when the port control state switches to HS or FS Idle. This behavior
232 * is different from EHCI where the host controller driver is required
233 * to set this bit to a zero after the resume duration is timed in the
234 * driver.
235 */
236 else if (typeReq == ClearPortFeature &&
237 wValue == USB_PORT_FEAT_SUSPEND) {
238 temp = ehci_readl(ehci, status_reg);
239 if ((temp & PORT_RESET) || !(temp & PORT_PE)) {
240 retval = -EPIPE;
241 goto done;
242 }
243
244 if (!(temp & PORT_SUSPEND))
245 goto done;
246
247 /* Disable disconnect detection during port resume */
Antoine Tenart3d46e732014-09-24 23:05:50 +0400248 tegra_usb_phy_preresume(hcd->usb_phy);
Benoit Goby79ad3b52011-03-09 16:28:56 -0800249
250 ehci->reset_done[wIndex-1] = jiffies + msecs_to_jiffies(25);
251
252 temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS);
253 /* start resume signalling */
254 ehci_writel(ehci, temp | PORT_RESUME, status_reg);
Alan Sterna448e4d2012-04-03 15:24:30 -0400255 set_bit(wIndex-1, &ehci->resuming_ports);
Benoit Goby79ad3b52011-03-09 16:28:56 -0800256
257 spin_unlock_irqrestore(&ehci->lock, flags);
258 msleep(20);
259 spin_lock_irqsave(&ehci->lock, flags);
260
261 /* Poll until the controller clears RESUME and SUSPEND */
Manjunath Goudar2f3a6b82013-06-13 11:24:09 -0600262 if (ehci_handshake(ehci, status_reg, PORT_RESUME, 0, 2000))
Benoit Goby79ad3b52011-03-09 16:28:56 -0800263 pr_err("%s: timeout waiting for RESUME\n", __func__);
Manjunath Goudar2f3a6b82013-06-13 11:24:09 -0600264 if (ehci_handshake(ehci, status_reg, PORT_SUSPEND, 0, 2000))
Benoit Goby79ad3b52011-03-09 16:28:56 -0800265 pr_err("%s: timeout waiting for SUSPEND\n", __func__);
266
267 ehci->reset_done[wIndex-1] = 0;
Alan Sterna448e4d2012-04-03 15:24:30 -0400268 clear_bit(wIndex-1, &ehci->resuming_ports);
Benoit Goby79ad3b52011-03-09 16:28:56 -0800269
270 tegra->port_resuming = 1;
271 goto done;
272 }
273
274 spin_unlock_irqrestore(&ehci->lock, flags);
275
276 /* Handle the hub control events here */
Laurent Pinchart37769932014-04-16 18:00:10 +0200277 return ehci_hub_control(hcd, typeReq, wValue, wIndex, buf, wLength);
Manjunath Goudar9fc5f242013-06-13 11:24:12 -0600278
Benoit Goby79ad3b52011-03-09 16:28:56 -0800279done:
280 spin_unlock_irqrestore(&ehci->lock, flags);
281 return retval;
282}
283
Venu Byravarasufe375772012-04-05 11:25:30 +0530284struct dma_aligned_buffer {
Robert Morellfbf98652011-03-09 16:28:57 -0800285 void *kmalloc_ptr;
286 void *old_xfer_buffer;
287 u8 data[0];
288};
289
Venu Byravarasufe375772012-04-05 11:25:30 +0530290static void free_dma_aligned_buffer(struct urb *urb)
Robert Morellfbf98652011-03-09 16:28:57 -0800291{
Venu Byravarasufe375772012-04-05 11:25:30 +0530292 struct dma_aligned_buffer *temp;
Johan Hovold0efd9372015-04-23 16:06:51 +0200293 size_t length;
Robert Morellfbf98652011-03-09 16:28:57 -0800294
295 if (!(urb->transfer_flags & URB_ALIGNED_TEMP_BUFFER))
296 return;
297
Venu Byravarasufe375772012-04-05 11:25:30 +0530298 temp = container_of(urb->transfer_buffer,
299 struct dma_aligned_buffer, data);
Robert Morellfbf98652011-03-09 16:28:57 -0800300
Johan Hovold0efd9372015-04-23 16:06:51 +0200301 if (usb_urb_dir_in(urb)) {
302 if (usb_pipeisoc(urb->pipe))
303 length = urb->transfer_buffer_length;
304 else
305 length = urb->actual_length;
306
307 memcpy(temp->old_xfer_buffer, temp->data, length);
308 }
Robert Morellfbf98652011-03-09 16:28:57 -0800309 urb->transfer_buffer = temp->old_xfer_buffer;
310 kfree(temp->kmalloc_ptr);
311
312 urb->transfer_flags &= ~URB_ALIGNED_TEMP_BUFFER;
313}
314
Venu Byravarasufe375772012-04-05 11:25:30 +0530315static int alloc_dma_aligned_buffer(struct urb *urb, gfp_t mem_flags)
Robert Morellfbf98652011-03-09 16:28:57 -0800316{
Venu Byravarasufe375772012-04-05 11:25:30 +0530317 struct dma_aligned_buffer *temp, *kmalloc_ptr;
Robert Morellfbf98652011-03-09 16:28:57 -0800318 size_t kmalloc_size;
319
320 if (urb->num_sgs || urb->sg ||
321 urb->transfer_buffer_length == 0 ||
322 !((uintptr_t)urb->transfer_buffer & (TEGRA_USB_DMA_ALIGN - 1)))
323 return 0;
324
Robert Morellfbf98652011-03-09 16:28:57 -0800325 /* Allocate a buffer with enough padding for alignment */
326 kmalloc_size = urb->transfer_buffer_length +
Venu Byravarasufe375772012-04-05 11:25:30 +0530327 sizeof(struct dma_aligned_buffer) + TEGRA_USB_DMA_ALIGN - 1;
Robert Morellfbf98652011-03-09 16:28:57 -0800328
329 kmalloc_ptr = kmalloc(kmalloc_size, mem_flags);
330 if (!kmalloc_ptr)
331 return -ENOMEM;
332
Venu Byravarasufe375772012-04-05 11:25:30 +0530333 /* Position our struct dma_aligned_buffer such that data is aligned */
Robert Morellfbf98652011-03-09 16:28:57 -0800334 temp = PTR_ALIGN(kmalloc_ptr + 1, TEGRA_USB_DMA_ALIGN) - 1;
Robert Morellfbf98652011-03-09 16:28:57 -0800335 temp->kmalloc_ptr = kmalloc_ptr;
336 temp->old_xfer_buffer = urb->transfer_buffer;
Venu Byravarasufe375772012-04-05 11:25:30 +0530337 if (usb_urb_dir_out(urb))
Robert Morellfbf98652011-03-09 16:28:57 -0800338 memcpy(temp->data, urb->transfer_buffer,
339 urb->transfer_buffer_length);
340 urb->transfer_buffer = temp->data;
341
342 urb->transfer_flags |= URB_ALIGNED_TEMP_BUFFER;
343
344 return 0;
345}
346
347static int tegra_ehci_map_urb_for_dma(struct usb_hcd *hcd, struct urb *urb,
348 gfp_t mem_flags)
349{
350 int ret;
351
Venu Byravarasufe375772012-04-05 11:25:30 +0530352 ret = alloc_dma_aligned_buffer(urb, mem_flags);
Robert Morellfbf98652011-03-09 16:28:57 -0800353 if (ret)
354 return ret;
355
356 ret = usb_hcd_map_urb_for_dma(hcd, urb, mem_flags);
357 if (ret)
Venu Byravarasufe375772012-04-05 11:25:30 +0530358 free_dma_aligned_buffer(urb);
Robert Morellfbf98652011-03-09 16:28:57 -0800359
360 return ret;
361}
362
363static void tegra_ehci_unmap_urb_for_dma(struct usb_hcd *hcd, struct urb *urb)
364{
365 usb_hcd_unmap_urb_for_dma(hcd, urb);
Venu Byravarasufe375772012-04-05 11:25:30 +0530366 free_dma_aligned_buffer(urb);
Robert Morellfbf98652011-03-09 16:28:57 -0800367}
368
Tuomas Tynkkynen327d8b42013-08-12 16:06:54 +0300369static const struct tegra_ehci_soc_config tegra30_soc_config = {
370 .has_hostpc = true,
371};
372
373static const struct tegra_ehci_soc_config tegra20_soc_config = {
374 .has_hostpc = false,
375};
376
Jingoo Han1b450492014-06-18 13:37:24 +0900377static const struct of_device_id tegra_ehci_of_match[] = {
Tuomas Tynkkynen327d8b42013-08-12 16:06:54 +0300378 { .compatible = "nvidia,tegra30-ehci", .data = &tegra30_soc_config },
379 { .compatible = "nvidia,tegra20-ehci", .data = &tegra20_soc_config },
380 { },
381};
382
Benoit Goby79ad3b52011-03-09 16:28:56 -0800383static int tegra_ehci_probe(struct platform_device *pdev)
384{
Tuomas Tynkkynen327d8b42013-08-12 16:06:54 +0300385 const struct of_device_id *match;
386 const struct tegra_ehci_soc_config *soc_config;
Benoit Goby79ad3b52011-03-09 16:28:56 -0800387 struct resource *res;
388 struct usb_hcd *hcd;
Stephen Warrenc19d14d2013-06-13 11:24:13 -0600389 struct ehci_hcd *ehci;
Benoit Goby79ad3b52011-03-09 16:28:56 -0800390 struct tegra_ehci_hcd *tegra;
Benoit Goby79ad3b52011-03-09 16:28:56 -0800391 int err = 0;
392 int irq;
Venu Byravarasubbdabdb2013-01-17 20:15:37 +0000393 struct usb_phy *u_phy;
Benoit Goby79ad3b52011-03-09 16:28:56 -0800394
Tuomas Tynkkynen327d8b42013-08-12 16:06:54 +0300395 match = of_match_device(tegra_ehci_of_match, &pdev->dev);
396 if (!match) {
397 dev_err(&pdev->dev, "Error: No device match found\n");
398 return -ENODEV;
399 }
400 soc_config = match->data;
401
Olof Johansson4a53f4e2011-11-04 09:12:40 +0000402 /* Right now device-tree probed devices don't get dma_mask set.
403 * Since shared usb code relies on it, set it here for now.
404 * Once we have dma capability bindings this can go away.
405 */
Russell Kinge1fd7342013-06-27 12:36:37 +0100406 err = dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
Russell King22d9d8e2013-06-10 16:28:49 +0100407 if (err)
408 return err;
Olof Johansson4a53f4e2011-11-04 09:12:40 +0000409
Stephen Warrenc19d14d2013-06-13 11:24:13 -0600410 hcd = usb_create_hcd(&tegra_ehci_hc_driver, &pdev->dev,
411 dev_name(&pdev->dev));
412 if (!hcd) {
413 dev_err(&pdev->dev, "Unable to create HCD\n");
Mikko Perttunenf5b8c8b2013-07-17 10:37:49 +0300414 return -ENOMEM;
Stephen Warrenc19d14d2013-06-13 11:24:13 -0600415 }
416 platform_set_drvdata(pdev, hcd);
417 ehci = hcd_to_ehci(hcd);
418 tegra = (struct tegra_ehci_hcd *)ehci->priv;
419
420 hcd->has_tt = 1;
Benoit Goby79ad3b52011-03-09 16:28:56 -0800421
Julia Lawallbc2ff982012-07-30 16:43:41 +0200422 tegra->clk = devm_clk_get(&pdev->dev, NULL);
Benoit Goby79ad3b52011-03-09 16:28:56 -0800423 if (IS_ERR(tegra->clk)) {
424 dev_err(&pdev->dev, "Can't get ehci clock\n");
Stephen Warrenc19d14d2013-06-13 11:24:13 -0600425 err = PTR_ERR(tegra->clk);
426 goto cleanup_hcd_create;
Benoit Goby79ad3b52011-03-09 16:28:56 -0800427 }
428
Dmitry Osipenko14347032018-04-10 01:02:58 +0300429 tegra->rst = devm_reset_control_get_shared(&pdev->dev, "usb");
Stephen Warren75606f52013-11-06 16:53:58 -0700430 if (IS_ERR(tegra->rst)) {
431 dev_err(&pdev->dev, "Can't get ehci reset\n");
432 err = PTR_ERR(tegra->rst);
433 goto cleanup_hcd_create;
434 }
435
Prashant Gaikwad20de12c2012-06-05 09:59:38 +0530436 err = clk_prepare_enable(tegra->clk);
Benoit Goby79ad3b52011-03-09 16:28:56 -0800437 if (err)
Wei Yongjundafbe922013-09-27 16:22:08 +0800438 goto cleanup_hcd_create;
Benoit Goby79ad3b52011-03-09 16:28:56 -0800439
Tuomas Tynkkynena47cc242014-07-04 04:09:38 +0300440 err = tegra_reset_usb_controller(pdev);
Dmitry Osipenko14347032018-04-10 01:02:58 +0300441 if (err) {
442 dev_err(&pdev->dev, "Failed to reset controller\n");
Tuomas Tynkkynena47cc242014-07-04 04:09:38 +0300443 goto cleanup_clk_en;
Dmitry Osipenko14347032018-04-10 01:02:58 +0300444 }
Venu Byravarasueb5369e2013-04-03 16:11:12 +0530445
Tuomas Tynkkynen7db71a92013-07-25 21:38:06 +0300446 u_phy = devm_usb_get_phy_by_phandle(&pdev->dev, "nvidia,phy", 0);
Venu Byravarasu2d22b422013-05-16 19:43:02 +0530447 if (IS_ERR(u_phy)) {
Vince Hsuf56e67f2014-12-24 18:16:30 +0800448 err = -EPROBE_DEFER;
Stephen Warrenc19d14d2013-06-13 11:24:13 -0600449 goto cleanup_clk_en;
Venu Byravarasu2d22b422013-05-16 19:43:02 +0530450 }
Antoine Tenart3d46e732014-09-24 23:05:50 +0400451 hcd->usb_phy = u_phy;
Martin Blumenstingl4e88d4c2018-03-03 22:43:03 +0100452 hcd->skip_phy_initialization = 1;
Venu Byravarasu2d22b422013-05-16 19:43:02 +0530453
Venu Byravarasu585355c2012-12-13 20:59:08 +0000454 tegra->needs_double_reset = of_property_read_bool(pdev->dev.of_node,
455 "nvidia,needs-double-reset");
456
Benoit Goby79ad3b52011-03-09 16:28:56 -0800457 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
Vivek Gautam6ba96dc2014-05-10 17:30:09 +0530458 hcd->regs = devm_ioremap_resource(&pdev->dev, res);
459 if (IS_ERR(hcd->regs)) {
460 err = PTR_ERR(hcd->regs);
Stephen Warrenc19d14d2013-06-13 11:24:13 -0600461 goto cleanup_clk_en;
Benoit Goby79ad3b52011-03-09 16:28:56 -0800462 }
Varka Bhadrama36cc422014-11-04 07:51:10 +0530463 hcd->rsrc_start = res->start;
464 hcd->rsrc_len = resource_size(res);
465
Stephen Warrenc19d14d2013-06-13 11:24:13 -0600466 ehci->caps = hcd->regs + 0x100;
Tuomas Tynkkynen327d8b42013-08-12 16:06:54 +0300467 ehci->has_hostpc = soc_config->has_hostpc;
Benoit Goby79ad3b52011-03-09 16:28:56 -0800468
Antoine Tenart3d46e732014-09-24 23:05:50 +0400469 err = usb_phy_init(hcd->usb_phy);
Venu Byravarasu2d22b422013-05-16 19:43:02 +0530470 if (err) {
471 dev_err(&pdev->dev, "Failed to initialize phy\n");
Stephen Warrenc19d14d2013-06-13 11:24:13 -0600472 goto cleanup_clk_en;
Olof Johansson4a53f4e2011-11-04 09:12:40 +0000473 }
474
Venu Byravarasubbdabdb2013-01-17 20:15:37 +0000475 u_phy->otg = devm_kzalloc(&pdev->dev, sizeof(struct usb_otg),
476 GFP_KERNEL);
477 if (!u_phy->otg) {
Venu Byravarasubbdabdb2013-01-17 20:15:37 +0000478 err = -ENOMEM;
Venu Byravarasu2d22b422013-05-16 19:43:02 +0530479 goto cleanup_phy;
Venu Byravarasubbdabdb2013-01-17 20:15:37 +0000480 }
481 u_phy->otg->host = hcd_to_bus(hcd);
482
Antoine Tenart3d46e732014-09-24 23:05:50 +0400483 err = usb_phy_set_suspend(hcd->usb_phy, 0);
Benoit Goby79ad3b52011-03-09 16:28:56 -0800484 if (err) {
485 dev_err(&pdev->dev, "Failed to power on the phy\n");
Venu Byravarasu2d22b422013-05-16 19:43:02 +0530486 goto cleanup_phy;
Benoit Goby79ad3b52011-03-09 16:28:56 -0800487 }
488
Benoit Goby79ad3b52011-03-09 16:28:56 -0800489 irq = platform_get_irq(pdev, 0);
490 if (!irq) {
491 dev_err(&pdev->dev, "Failed to get IRQ\n");
492 err = -ENODEV;
Venu Byravarasu2d22b422013-05-16 19:43:02 +0530493 goto cleanup_phy;
Benoit Goby79ad3b52011-03-09 16:28:56 -0800494 }
Benoit Goby79ad3b52011-03-09 16:28:56 -0800495
Tuomas Tynkkynende3f2332013-07-25 21:38:02 +0300496 otg_set_host(u_phy->otg, &hcd->self);
Benoit Goby79ad3b52011-03-09 16:28:56 -0800497
Yong Zhangb5dd18d2011-09-07 16:10:52 +0800498 err = usb_add_hcd(hcd, irq, IRQF_SHARED);
Benoit Goby79ad3b52011-03-09 16:28:56 -0800499 if (err) {
500 dev_err(&pdev->dev, "Failed to add USB HCD\n");
Tuomas Tynkkynende3f2332013-07-25 21:38:02 +0300501 goto cleanup_otg_set_host;
Benoit Goby79ad3b52011-03-09 16:28:56 -0800502 }
Peter Chen3c9740a2013-11-05 10:46:02 +0800503 device_wakeup_enable(hcd->self.controller);
Benoit Goby79ad3b52011-03-09 16:28:56 -0800504
505 return err;
506
Tuomas Tynkkynende3f2332013-07-25 21:38:02 +0300507cleanup_otg_set_host:
508 otg_set_host(u_phy->otg, NULL);
Thierry Reding8fefcfd2013-06-14 13:21:21 +0200509cleanup_phy:
Antoine Tenart3d46e732014-09-24 23:05:50 +0400510 usb_phy_shutdown(hcd->usb_phy);
Stephen Warrenc19d14d2013-06-13 11:24:13 -0600511cleanup_clk_en:
512 clk_disable_unprepare(tegra->clk);
Venu Byravarasu2d22b422013-05-16 19:43:02 +0530513cleanup_hcd_create:
Benoit Goby79ad3b52011-03-09 16:28:56 -0800514 usb_put_hcd(hcd);
Benoit Goby79ad3b52011-03-09 16:28:56 -0800515 return err;
516}
517
Benoit Goby79ad3b52011-03-09 16:28:56 -0800518static int tegra_ehci_remove(struct platform_device *pdev)
519{
Stephen Warrenc19d14d2013-06-13 11:24:13 -0600520 struct usb_hcd *hcd = platform_get_drvdata(pdev);
521 struct tegra_ehci_hcd *tegra =
522 (struct tegra_ehci_hcd *)hcd_to_ehci(hcd)->priv;
Benoit Goby79ad3b52011-03-09 16:28:56 -0800523
Antoine Tenart3d46e732014-09-24 23:05:50 +0400524 otg_set_host(hcd->usb_phy->otg, NULL);
Benoit Goby79ad3b52011-03-09 16:28:56 -0800525
Antoine Tenart3d46e732014-09-24 23:05:50 +0400526 usb_phy_shutdown(hcd->usb_phy);
Benoit Goby79ad3b52011-03-09 16:28:56 -0800527 usb_remove_hcd(hcd);
Venu Byravarasuecc8a0c2012-08-10 11:42:43 +0530528
Dmitry Osipenko14347032018-04-10 01:02:58 +0300529 reset_control_assert(tegra->rst);
530 udelay(1);
531
Prashant Gaikwad20de12c2012-06-05 09:59:38 +0530532 clk_disable_unprepare(tegra->clk);
Benoit Goby79ad3b52011-03-09 16:28:56 -0800533
Tuomas Tynkkynen6a70b622014-06-17 17:17:40 +0300534 usb_put_hcd(hcd);
535
Benoit Goby79ad3b52011-03-09 16:28:56 -0800536 return 0;
537}
538
539static void tegra_ehci_hcd_shutdown(struct platform_device *pdev)
540{
Stephen Warrenc19d14d2013-06-13 11:24:13 -0600541 struct usb_hcd *hcd = platform_get_drvdata(pdev);
Benoit Goby79ad3b52011-03-09 16:28:56 -0800542
543 if (hcd->driver->shutdown)
544 hcd->driver->shutdown(hcd);
545}
546
547static struct platform_driver tegra_ehci_driver = {
548 .probe = tegra_ehci_probe,
549 .remove = tegra_ehci_remove,
Benoit Goby79ad3b52011-03-09 16:28:56 -0800550 .shutdown = tegra_ehci_hcd_shutdown,
551 .driver = {
Manjunath Goudar9fc5f242013-06-13 11:24:12 -0600552 .name = DRV_NAME,
Olof Johansson4a53f4e2011-11-04 09:12:40 +0000553 .of_match_table = tegra_ehci_of_match,
Benoit Goby79ad3b52011-03-09 16:28:56 -0800554 }
555};
Manjunath Goudar9fc5f242013-06-13 11:24:12 -0600556
Stephen Warren4f2fe2d2014-04-14 15:21:23 -0600557static int tegra_ehci_reset(struct usb_hcd *hcd)
558{
559 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
560 int retval;
561 int txfifothresh;
562
563 retval = ehci_setup(hcd);
564 if (retval)
565 return retval;
566
567 /*
568 * We should really pull this value out of tegra_ehci_soc_config, but
569 * to avoid needing access to it, make use of the fact that Tegra20 is
570 * the only one so far that needs a value of 10, and Tegra20 is the
571 * only one which doesn't set has_hostpc.
572 */
573 txfifothresh = ehci->has_hostpc ? 0x10 : 10;
574 ehci_writel(ehci, txfifothresh << 16, &ehci->regs->txfill_tuning);
575
576 return 0;
577}
578
Manjunath Goudar9fc5f242013-06-13 11:24:12 -0600579static const struct ehci_driver_overrides tegra_overrides __initconst = {
580 .extra_priv_size = sizeof(struct tegra_ehci_hcd),
Stephen Warren4f2fe2d2014-04-14 15:21:23 -0600581 .reset = tegra_ehci_reset,
Manjunath Goudar9fc5f242013-06-13 11:24:12 -0600582};
583
584static int __init ehci_tegra_init(void)
585{
586 if (usb_disabled())
587 return -ENODEV;
588
589 pr_info(DRV_NAME ": " DRIVER_DESC "\n");
590
591 ehci_init_driver(&tegra_ehci_hc_driver, &tegra_overrides);
592
593 /*
594 * The Tegra HW has some unusual quirks, which require Tegra-specific
595 * workarounds. We override certain hc_driver functions here to
596 * achieve that. We explicitly do not enhance ehci_driver_overrides to
597 * allow this more easily, since this is an unusual case, and we don't
598 * want to encourage others to override these functions by making it
599 * too easy.
600 */
601
Manjunath Goudar9fc5f242013-06-13 11:24:12 -0600602 tegra_ehci_hc_driver.map_urb_for_dma = tegra_ehci_map_urb_for_dma;
603 tegra_ehci_hc_driver.unmap_urb_for_dma = tegra_ehci_unmap_urb_for_dma;
604 tegra_ehci_hc_driver.hub_control = tegra_ehci_hub_control;
605
606 return platform_driver_register(&tegra_ehci_driver);
607}
608module_init(ehci_tegra_init);
609
610static void __exit ehci_tegra_cleanup(void)
611{
612 platform_driver_unregister(&tegra_ehci_driver);
613}
614module_exit(ehci_tegra_cleanup);
615
616MODULE_DESCRIPTION(DRIVER_DESC);
617MODULE_LICENSE("GPL");
618MODULE_ALIAS("platform:" DRV_NAME);
619MODULE_DEVICE_TABLE(of, tegra_ehci_of_match);