Greg Kroah-Hartman | 5fd54ac | 2017-11-03 11:28:30 +0100 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 2 | /* |
| 3 | * EHCI-compliant USB host controller driver for NVIDIA Tegra SoCs |
| 4 | * |
| 5 | * Copyright (C) 2010 Google, Inc. |
Venu Byravarasu | bbdabdb | 2013-01-17 20:15:37 +0000 | [diff] [blame] | 6 | * Copyright (C) 2009 - 2013 NVIDIA Corporation |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 7 | */ |
| 8 | |
| 9 | #include <linux/clk.h> |
Manjunath Goudar | 9fc5f24 | 2013-06-13 11:24:12 -0600 | [diff] [blame] | 10 | #include <linux/dma-mapping.h> |
Kishon Vijay Abraham I | ded017e | 2012-06-26 17:40:32 +0530 | [diff] [blame] | 11 | #include <linux/err.h> |
Olof Johansson | 4a53f4e | 2011-11-04 09:12:40 +0000 | [diff] [blame] | 12 | #include <linux/gpio.h> |
Manjunath Goudar | 9fc5f24 | 2013-06-13 11:24:12 -0600 | [diff] [blame] | 13 | #include <linux/io.h> |
| 14 | #include <linux/irq.h> |
| 15 | #include <linux/module.h> |
Olof Johansson | 4a53f4e | 2011-11-04 09:12:40 +0000 | [diff] [blame] | 16 | #include <linux/of.h> |
Tuomas Tynkkynen | 327d8b4 | 2013-08-12 16:06:54 +0300 | [diff] [blame] | 17 | #include <linux/of_device.h> |
Olof Johansson | 4a53f4e | 2011-11-04 09:12:40 +0000 | [diff] [blame] | 18 | #include <linux/of_gpio.h> |
Manjunath Goudar | 9fc5f24 | 2013-06-13 11:24:12 -0600 | [diff] [blame] | 19 | #include <linux/platform_device.h> |
Alan Stern | ebf20de | 2012-05-01 11:28:49 -0400 | [diff] [blame] | 20 | #include <linux/pm_runtime.h> |
Stephen Warren | 75606f5 | 2013-11-06 16:53:58 -0700 | [diff] [blame] | 21 | #include <linux/reset.h> |
Manjunath Goudar | 9fc5f24 | 2013-06-13 11:24:12 -0600 | [diff] [blame] | 22 | #include <linux/slab.h> |
Venu Byravarasu | bbdabdb | 2013-01-17 20:15:37 +0000 | [diff] [blame] | 23 | #include <linux/usb/ehci_def.h> |
Venu Byravarasu | 1ba8216 | 2012-09-05 18:50:23 +0530 | [diff] [blame] | 24 | #include <linux/usb/tegra_usb_phy.h> |
Manjunath Goudar | 9fc5f24 | 2013-06-13 11:24:12 -0600 | [diff] [blame] | 25 | #include <linux/usb.h> |
| 26 | #include <linux/usb/hcd.h> |
| 27 | #include <linux/usb/otg.h> |
| 28 | |
| 29 | #include "ehci.h" |
Stephen Warren | 54388b2 | 2012-10-02 16:49:25 -0600 | [diff] [blame] | 30 | |
Manjunath Goudar | 9fc5f24 | 2013-06-13 11:24:12 -0600 | [diff] [blame] | 31 | #define PORT_WAKE_BITS (PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E) |
| 32 | |
Robert Morell | fbf9865 | 2011-03-09 16:28:57 -0800 | [diff] [blame] | 33 | #define TEGRA_USB_DMA_ALIGN 32 |
| 34 | |
Manjunath Goudar | 9fc5f24 | 2013-06-13 11:24:12 -0600 | [diff] [blame] | 35 | #define DRIVER_DESC "Tegra EHCI driver" |
| 36 | #define DRV_NAME "tegra-ehci" |
| 37 | |
| 38 | static struct hc_driver __read_mostly tegra_ehci_hc_driver; |
| 39 | |
Tuomas Tynkkynen | 327d8b4 | 2013-08-12 16:06:54 +0300 | [diff] [blame] | 40 | struct tegra_ehci_soc_config { |
| 41 | bool has_hostpc; |
| 42 | }; |
| 43 | |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 44 | struct tegra_ehci_hcd { |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 45 | struct tegra_usb_phy *phy; |
| 46 | struct clk *clk; |
Stephen Warren | 75606f5 | 2013-11-06 16:53:58 -0700 | [diff] [blame] | 47 | struct reset_control *rst; |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 48 | int port_resuming; |
Venu Byravarasu | 585355c | 2012-12-13 20:59:08 +0000 | [diff] [blame] | 49 | bool needs_double_reset; |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 50 | enum tegra_usb_phy_port_speed port_speed; |
| 51 | }; |
| 52 | |
Tuomas Tynkkynen | a47cc24 | 2014-07-04 04:09:38 +0300 | [diff] [blame] | 53 | static int tegra_reset_usb_controller(struct platform_device *pdev) |
| 54 | { |
| 55 | struct device_node *phy_np; |
| 56 | struct usb_hcd *hcd = platform_get_drvdata(pdev); |
| 57 | struct tegra_ehci_hcd *tegra = |
| 58 | (struct tegra_ehci_hcd *)hcd_to_ehci(hcd)->priv; |
Dmitry Osipenko | 1434703 | 2018-04-10 01:02:58 +0300 | [diff] [blame] | 59 | struct reset_control *rst; |
| 60 | int err; |
Tuomas Tynkkynen | a47cc24 | 2014-07-04 04:09:38 +0300 | [diff] [blame] | 61 | |
| 62 | phy_np = of_parse_phandle(pdev->dev.of_node, "nvidia,phy", 0); |
| 63 | if (!phy_np) |
| 64 | return -ENOENT; |
| 65 | |
Dmitry Osipenko | 1434703 | 2018-04-10 01:02:58 +0300 | [diff] [blame] | 66 | /* |
| 67 | * The 1st USB controller contains some UTMI pad registers that are |
| 68 | * global for all the controllers on the chip. Those registers are |
| 69 | * also cleared when reset is asserted to the 1st controller. |
| 70 | */ |
| 71 | rst = of_reset_control_get_shared(phy_np, "utmi-pads"); |
| 72 | if (IS_ERR(rst)) { |
| 73 | dev_warn(&pdev->dev, |
| 74 | "can't get utmi-pads reset from the PHY\n"); |
| 75 | dev_warn(&pdev->dev, |
| 76 | "continuing, but please update your DT\n"); |
| 77 | } else { |
| 78 | /* |
| 79 | * PHY driver performs UTMI-pads reset in a case of |
| 80 | * non-legacy DT. |
| 81 | */ |
| 82 | reset_control_put(rst); |
Tuomas Tynkkynen | a47cc24 | 2014-07-04 04:09:38 +0300 | [diff] [blame] | 83 | } |
| 84 | |
| 85 | of_node_put(phy_np); |
| 86 | |
Dmitry Osipenko | 1434703 | 2018-04-10 01:02:58 +0300 | [diff] [blame] | 87 | /* reset control is shared, hence initialize it first */ |
| 88 | err = reset_control_deassert(tegra->rst); |
| 89 | if (err) |
| 90 | return err; |
| 91 | |
| 92 | err = reset_control_assert(tegra->rst); |
| 93 | if (err) |
| 94 | return err; |
| 95 | |
| 96 | udelay(1); |
| 97 | |
| 98 | err = reset_control_deassert(tegra->rst); |
| 99 | if (err) |
| 100 | return err; |
| 101 | |
Tuomas Tynkkynen | a47cc24 | 2014-07-04 04:09:38 +0300 | [diff] [blame] | 102 | return 0; |
| 103 | } |
| 104 | |
Jim Lin | 1f594b6 | 2011-04-17 11:58:25 +0300 | [diff] [blame] | 105 | static int tegra_ehci_internal_port_reset( |
| 106 | struct ehci_hcd *ehci, |
| 107 | u32 __iomem *portsc_reg |
| 108 | ) |
| 109 | { |
| 110 | u32 temp; |
| 111 | unsigned long flags; |
| 112 | int retval = 0; |
| 113 | int i, tries; |
| 114 | u32 saved_usbintr; |
| 115 | |
| 116 | spin_lock_irqsave(&ehci->lock, flags); |
| 117 | saved_usbintr = ehci_readl(ehci, &ehci->regs->intr_enable); |
| 118 | /* disable USB interrupt */ |
| 119 | ehci_writel(ehci, 0, &ehci->regs->intr_enable); |
| 120 | spin_unlock_irqrestore(&ehci->lock, flags); |
| 121 | |
| 122 | /* |
| 123 | * Here we have to do Port Reset at most twice for |
| 124 | * Port Enable bit to be set. |
| 125 | */ |
| 126 | for (i = 0; i < 2; i++) { |
| 127 | temp = ehci_readl(ehci, portsc_reg); |
| 128 | temp |= PORT_RESET; |
| 129 | ehci_writel(ehci, temp, portsc_reg); |
| 130 | mdelay(10); |
| 131 | temp &= ~PORT_RESET; |
| 132 | ehci_writel(ehci, temp, portsc_reg); |
| 133 | mdelay(1); |
| 134 | tries = 100; |
| 135 | do { |
| 136 | mdelay(1); |
| 137 | /* |
| 138 | * Up to this point, Port Enable bit is |
| 139 | * expected to be set after 2 ms waiting. |
| 140 | * USB1 usually takes extra 45 ms, for safety, |
| 141 | * we take 100 ms as timeout. |
| 142 | */ |
| 143 | temp = ehci_readl(ehci, portsc_reg); |
| 144 | } while (!(temp & PORT_PE) && tries--); |
| 145 | if (temp & PORT_PE) |
| 146 | break; |
| 147 | } |
| 148 | if (i == 2) |
| 149 | retval = -ETIMEDOUT; |
| 150 | |
| 151 | /* |
| 152 | * Clear Connect Status Change bit if it's set. |
| 153 | * We can't clear PORT_PEC. It will also cause PORT_PE to be cleared. |
| 154 | */ |
| 155 | if (temp & PORT_CSC) |
| 156 | ehci_writel(ehci, PORT_CSC, portsc_reg); |
| 157 | |
| 158 | /* |
| 159 | * Write to clear any interrupt status bits that might be set |
| 160 | * during port reset. |
| 161 | */ |
| 162 | temp = ehci_readl(ehci, &ehci->regs->status); |
| 163 | ehci_writel(ehci, temp, &ehci->regs->status); |
| 164 | |
| 165 | /* restore original interrupt enable bits */ |
| 166 | ehci_writel(ehci, saved_usbintr, &ehci->regs->intr_enable); |
| 167 | return retval; |
| 168 | } |
| 169 | |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 170 | static int tegra_ehci_hub_control( |
| 171 | struct usb_hcd *hcd, |
| 172 | u16 typeReq, |
| 173 | u16 wValue, |
| 174 | u16 wIndex, |
| 175 | char *buf, |
| 176 | u16 wLength |
| 177 | ) |
| 178 | { |
Stephen Warren | c19d14d | 2013-06-13 11:24:13 -0600 | [diff] [blame] | 179 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); |
| 180 | struct tegra_ehci_hcd *tegra = (struct tegra_ehci_hcd *)ehci->priv; |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 181 | u32 __iomem *status_reg; |
| 182 | u32 temp; |
| 183 | unsigned long flags; |
| 184 | int retval = 0; |
| 185 | |
| 186 | status_reg = &ehci->regs->port_status[(wIndex & 0xff) - 1]; |
| 187 | |
| 188 | spin_lock_irqsave(&ehci->lock, flags); |
| 189 | |
Stephen Warren | 6d5f89c | 2012-04-18 15:32:46 -0600 | [diff] [blame] | 190 | if (typeReq == GetPortStatus) { |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 191 | temp = ehci_readl(ehci, status_reg); |
| 192 | if (tegra->port_resuming && !(temp & PORT_SUSPEND)) { |
| 193 | /* Resume completed, re-enable disconnect detection */ |
| 194 | tegra->port_resuming = 0; |
Antoine Tenart | 3d46e73 | 2014-09-24 23:05:50 +0400 | [diff] [blame] | 195 | tegra_usb_phy_postresume(hcd->usb_phy); |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 196 | } |
| 197 | } |
| 198 | |
| 199 | else if (typeReq == SetPortFeature && wValue == USB_PORT_FEAT_SUSPEND) { |
| 200 | temp = ehci_readl(ehci, status_reg); |
| 201 | if ((temp & PORT_PE) == 0 || (temp & PORT_RESET) != 0) { |
| 202 | retval = -EPIPE; |
| 203 | goto done; |
| 204 | } |
| 205 | |
Stephen Warren | b087657 | 2012-04-25 12:31:10 -0600 | [diff] [blame] | 206 | temp &= ~(PORT_RWC_BITS | PORT_WKCONN_E); |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 207 | temp |= PORT_WKDISC_E | PORT_WKOC_E; |
| 208 | ehci_writel(ehci, temp | PORT_SUSPEND, status_reg); |
| 209 | |
| 210 | /* |
| 211 | * If a transaction is in progress, there may be a delay in |
| 212 | * suspending the port. Poll until the port is suspended. |
| 213 | */ |
Manjunath Goudar | 2f3a6b8 | 2013-06-13 11:24:09 -0600 | [diff] [blame] | 214 | if (ehci_handshake(ehci, status_reg, PORT_SUSPEND, |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 215 | PORT_SUSPEND, 5000)) |
| 216 | pr_err("%s: timeout waiting for SUSPEND\n", __func__); |
| 217 | |
| 218 | set_bit((wIndex & 0xff) - 1, &ehci->suspended_ports); |
| 219 | goto done; |
| 220 | } |
| 221 | |
Jim Lin | 1f594b6 | 2011-04-17 11:58:25 +0300 | [diff] [blame] | 222 | /* For USB1 port we need to issue Port Reset twice internally */ |
Venu Byravarasu | 585355c | 2012-12-13 20:59:08 +0000 | [diff] [blame] | 223 | if (tegra->needs_double_reset && |
Jim Lin | 1f594b6 | 2011-04-17 11:58:25 +0300 | [diff] [blame] | 224 | (typeReq == SetPortFeature && wValue == USB_PORT_FEAT_RESET)) { |
| 225 | spin_unlock_irqrestore(&ehci->lock, flags); |
| 226 | return tegra_ehci_internal_port_reset(ehci, status_reg); |
| 227 | } |
| 228 | |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 229 | /* |
| 230 | * Tegra host controller will time the resume operation to clear the bit |
| 231 | * when the port control state switches to HS or FS Idle. This behavior |
| 232 | * is different from EHCI where the host controller driver is required |
| 233 | * to set this bit to a zero after the resume duration is timed in the |
| 234 | * driver. |
| 235 | */ |
| 236 | else if (typeReq == ClearPortFeature && |
| 237 | wValue == USB_PORT_FEAT_SUSPEND) { |
| 238 | temp = ehci_readl(ehci, status_reg); |
| 239 | if ((temp & PORT_RESET) || !(temp & PORT_PE)) { |
| 240 | retval = -EPIPE; |
| 241 | goto done; |
| 242 | } |
| 243 | |
| 244 | if (!(temp & PORT_SUSPEND)) |
| 245 | goto done; |
| 246 | |
| 247 | /* Disable disconnect detection during port resume */ |
Antoine Tenart | 3d46e73 | 2014-09-24 23:05:50 +0400 | [diff] [blame] | 248 | tegra_usb_phy_preresume(hcd->usb_phy); |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 249 | |
| 250 | ehci->reset_done[wIndex-1] = jiffies + msecs_to_jiffies(25); |
| 251 | |
| 252 | temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS); |
| 253 | /* start resume signalling */ |
| 254 | ehci_writel(ehci, temp | PORT_RESUME, status_reg); |
Alan Stern | a448e4d | 2012-04-03 15:24:30 -0400 | [diff] [blame] | 255 | set_bit(wIndex-1, &ehci->resuming_ports); |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 256 | |
| 257 | spin_unlock_irqrestore(&ehci->lock, flags); |
| 258 | msleep(20); |
| 259 | spin_lock_irqsave(&ehci->lock, flags); |
| 260 | |
| 261 | /* Poll until the controller clears RESUME and SUSPEND */ |
Manjunath Goudar | 2f3a6b8 | 2013-06-13 11:24:09 -0600 | [diff] [blame] | 262 | if (ehci_handshake(ehci, status_reg, PORT_RESUME, 0, 2000)) |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 263 | pr_err("%s: timeout waiting for RESUME\n", __func__); |
Manjunath Goudar | 2f3a6b8 | 2013-06-13 11:24:09 -0600 | [diff] [blame] | 264 | if (ehci_handshake(ehci, status_reg, PORT_SUSPEND, 0, 2000)) |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 265 | pr_err("%s: timeout waiting for SUSPEND\n", __func__); |
| 266 | |
| 267 | ehci->reset_done[wIndex-1] = 0; |
Alan Stern | a448e4d | 2012-04-03 15:24:30 -0400 | [diff] [blame] | 268 | clear_bit(wIndex-1, &ehci->resuming_ports); |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 269 | |
| 270 | tegra->port_resuming = 1; |
| 271 | goto done; |
| 272 | } |
| 273 | |
| 274 | spin_unlock_irqrestore(&ehci->lock, flags); |
| 275 | |
| 276 | /* Handle the hub control events here */ |
Laurent Pinchart | 3776993 | 2014-04-16 18:00:10 +0200 | [diff] [blame] | 277 | return ehci_hub_control(hcd, typeReq, wValue, wIndex, buf, wLength); |
Manjunath Goudar | 9fc5f24 | 2013-06-13 11:24:12 -0600 | [diff] [blame] | 278 | |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 279 | done: |
| 280 | spin_unlock_irqrestore(&ehci->lock, flags); |
| 281 | return retval; |
| 282 | } |
| 283 | |
Venu Byravarasu | fe37577 | 2012-04-05 11:25:30 +0530 | [diff] [blame] | 284 | struct dma_aligned_buffer { |
Robert Morell | fbf9865 | 2011-03-09 16:28:57 -0800 | [diff] [blame] | 285 | void *kmalloc_ptr; |
| 286 | void *old_xfer_buffer; |
| 287 | u8 data[0]; |
| 288 | }; |
| 289 | |
Venu Byravarasu | fe37577 | 2012-04-05 11:25:30 +0530 | [diff] [blame] | 290 | static void free_dma_aligned_buffer(struct urb *urb) |
Robert Morell | fbf9865 | 2011-03-09 16:28:57 -0800 | [diff] [blame] | 291 | { |
Venu Byravarasu | fe37577 | 2012-04-05 11:25:30 +0530 | [diff] [blame] | 292 | struct dma_aligned_buffer *temp; |
Johan Hovold | 0efd937 | 2015-04-23 16:06:51 +0200 | [diff] [blame] | 293 | size_t length; |
Robert Morell | fbf9865 | 2011-03-09 16:28:57 -0800 | [diff] [blame] | 294 | |
| 295 | if (!(urb->transfer_flags & URB_ALIGNED_TEMP_BUFFER)) |
| 296 | return; |
| 297 | |
Venu Byravarasu | fe37577 | 2012-04-05 11:25:30 +0530 | [diff] [blame] | 298 | temp = container_of(urb->transfer_buffer, |
| 299 | struct dma_aligned_buffer, data); |
Robert Morell | fbf9865 | 2011-03-09 16:28:57 -0800 | [diff] [blame] | 300 | |
Johan Hovold | 0efd937 | 2015-04-23 16:06:51 +0200 | [diff] [blame] | 301 | if (usb_urb_dir_in(urb)) { |
| 302 | if (usb_pipeisoc(urb->pipe)) |
| 303 | length = urb->transfer_buffer_length; |
| 304 | else |
| 305 | length = urb->actual_length; |
| 306 | |
| 307 | memcpy(temp->old_xfer_buffer, temp->data, length); |
| 308 | } |
Robert Morell | fbf9865 | 2011-03-09 16:28:57 -0800 | [diff] [blame] | 309 | urb->transfer_buffer = temp->old_xfer_buffer; |
| 310 | kfree(temp->kmalloc_ptr); |
| 311 | |
| 312 | urb->transfer_flags &= ~URB_ALIGNED_TEMP_BUFFER; |
| 313 | } |
| 314 | |
Venu Byravarasu | fe37577 | 2012-04-05 11:25:30 +0530 | [diff] [blame] | 315 | static int alloc_dma_aligned_buffer(struct urb *urb, gfp_t mem_flags) |
Robert Morell | fbf9865 | 2011-03-09 16:28:57 -0800 | [diff] [blame] | 316 | { |
Venu Byravarasu | fe37577 | 2012-04-05 11:25:30 +0530 | [diff] [blame] | 317 | struct dma_aligned_buffer *temp, *kmalloc_ptr; |
Robert Morell | fbf9865 | 2011-03-09 16:28:57 -0800 | [diff] [blame] | 318 | size_t kmalloc_size; |
| 319 | |
| 320 | if (urb->num_sgs || urb->sg || |
| 321 | urb->transfer_buffer_length == 0 || |
| 322 | !((uintptr_t)urb->transfer_buffer & (TEGRA_USB_DMA_ALIGN - 1))) |
| 323 | return 0; |
| 324 | |
Robert Morell | fbf9865 | 2011-03-09 16:28:57 -0800 | [diff] [blame] | 325 | /* Allocate a buffer with enough padding for alignment */ |
| 326 | kmalloc_size = urb->transfer_buffer_length + |
Venu Byravarasu | fe37577 | 2012-04-05 11:25:30 +0530 | [diff] [blame] | 327 | sizeof(struct dma_aligned_buffer) + TEGRA_USB_DMA_ALIGN - 1; |
Robert Morell | fbf9865 | 2011-03-09 16:28:57 -0800 | [diff] [blame] | 328 | |
| 329 | kmalloc_ptr = kmalloc(kmalloc_size, mem_flags); |
| 330 | if (!kmalloc_ptr) |
| 331 | return -ENOMEM; |
| 332 | |
Venu Byravarasu | fe37577 | 2012-04-05 11:25:30 +0530 | [diff] [blame] | 333 | /* Position our struct dma_aligned_buffer such that data is aligned */ |
Robert Morell | fbf9865 | 2011-03-09 16:28:57 -0800 | [diff] [blame] | 334 | temp = PTR_ALIGN(kmalloc_ptr + 1, TEGRA_USB_DMA_ALIGN) - 1; |
Robert Morell | fbf9865 | 2011-03-09 16:28:57 -0800 | [diff] [blame] | 335 | temp->kmalloc_ptr = kmalloc_ptr; |
| 336 | temp->old_xfer_buffer = urb->transfer_buffer; |
Venu Byravarasu | fe37577 | 2012-04-05 11:25:30 +0530 | [diff] [blame] | 337 | if (usb_urb_dir_out(urb)) |
Robert Morell | fbf9865 | 2011-03-09 16:28:57 -0800 | [diff] [blame] | 338 | memcpy(temp->data, urb->transfer_buffer, |
| 339 | urb->transfer_buffer_length); |
| 340 | urb->transfer_buffer = temp->data; |
| 341 | |
| 342 | urb->transfer_flags |= URB_ALIGNED_TEMP_BUFFER; |
| 343 | |
| 344 | return 0; |
| 345 | } |
| 346 | |
| 347 | static int tegra_ehci_map_urb_for_dma(struct usb_hcd *hcd, struct urb *urb, |
| 348 | gfp_t mem_flags) |
| 349 | { |
| 350 | int ret; |
| 351 | |
Venu Byravarasu | fe37577 | 2012-04-05 11:25:30 +0530 | [diff] [blame] | 352 | ret = alloc_dma_aligned_buffer(urb, mem_flags); |
Robert Morell | fbf9865 | 2011-03-09 16:28:57 -0800 | [diff] [blame] | 353 | if (ret) |
| 354 | return ret; |
| 355 | |
| 356 | ret = usb_hcd_map_urb_for_dma(hcd, urb, mem_flags); |
| 357 | if (ret) |
Venu Byravarasu | fe37577 | 2012-04-05 11:25:30 +0530 | [diff] [blame] | 358 | free_dma_aligned_buffer(urb); |
Robert Morell | fbf9865 | 2011-03-09 16:28:57 -0800 | [diff] [blame] | 359 | |
| 360 | return ret; |
| 361 | } |
| 362 | |
| 363 | static void tegra_ehci_unmap_urb_for_dma(struct usb_hcd *hcd, struct urb *urb) |
| 364 | { |
| 365 | usb_hcd_unmap_urb_for_dma(hcd, urb); |
Venu Byravarasu | fe37577 | 2012-04-05 11:25:30 +0530 | [diff] [blame] | 366 | free_dma_aligned_buffer(urb); |
Robert Morell | fbf9865 | 2011-03-09 16:28:57 -0800 | [diff] [blame] | 367 | } |
| 368 | |
Tuomas Tynkkynen | 327d8b4 | 2013-08-12 16:06:54 +0300 | [diff] [blame] | 369 | static const struct tegra_ehci_soc_config tegra30_soc_config = { |
| 370 | .has_hostpc = true, |
| 371 | }; |
| 372 | |
| 373 | static const struct tegra_ehci_soc_config tegra20_soc_config = { |
| 374 | .has_hostpc = false, |
| 375 | }; |
| 376 | |
Jingoo Han | 1b45049 | 2014-06-18 13:37:24 +0900 | [diff] [blame] | 377 | static const struct of_device_id tegra_ehci_of_match[] = { |
Tuomas Tynkkynen | 327d8b4 | 2013-08-12 16:06:54 +0300 | [diff] [blame] | 378 | { .compatible = "nvidia,tegra30-ehci", .data = &tegra30_soc_config }, |
| 379 | { .compatible = "nvidia,tegra20-ehci", .data = &tegra20_soc_config }, |
| 380 | { }, |
| 381 | }; |
| 382 | |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 383 | static int tegra_ehci_probe(struct platform_device *pdev) |
| 384 | { |
Tuomas Tynkkynen | 327d8b4 | 2013-08-12 16:06:54 +0300 | [diff] [blame] | 385 | const struct of_device_id *match; |
| 386 | const struct tegra_ehci_soc_config *soc_config; |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 387 | struct resource *res; |
| 388 | struct usb_hcd *hcd; |
Stephen Warren | c19d14d | 2013-06-13 11:24:13 -0600 | [diff] [blame] | 389 | struct ehci_hcd *ehci; |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 390 | struct tegra_ehci_hcd *tegra; |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 391 | int err = 0; |
| 392 | int irq; |
Venu Byravarasu | bbdabdb | 2013-01-17 20:15:37 +0000 | [diff] [blame] | 393 | struct usb_phy *u_phy; |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 394 | |
Tuomas Tynkkynen | 327d8b4 | 2013-08-12 16:06:54 +0300 | [diff] [blame] | 395 | match = of_match_device(tegra_ehci_of_match, &pdev->dev); |
| 396 | if (!match) { |
| 397 | dev_err(&pdev->dev, "Error: No device match found\n"); |
| 398 | return -ENODEV; |
| 399 | } |
| 400 | soc_config = match->data; |
| 401 | |
Olof Johansson | 4a53f4e | 2011-11-04 09:12:40 +0000 | [diff] [blame] | 402 | /* Right now device-tree probed devices don't get dma_mask set. |
| 403 | * Since shared usb code relies on it, set it here for now. |
| 404 | * Once we have dma capability bindings this can go away. |
| 405 | */ |
Russell King | e1fd734 | 2013-06-27 12:36:37 +0100 | [diff] [blame] | 406 | err = dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); |
Russell King | 22d9d8e | 2013-06-10 16:28:49 +0100 | [diff] [blame] | 407 | if (err) |
| 408 | return err; |
Olof Johansson | 4a53f4e | 2011-11-04 09:12:40 +0000 | [diff] [blame] | 409 | |
Stephen Warren | c19d14d | 2013-06-13 11:24:13 -0600 | [diff] [blame] | 410 | hcd = usb_create_hcd(&tegra_ehci_hc_driver, &pdev->dev, |
| 411 | dev_name(&pdev->dev)); |
| 412 | if (!hcd) { |
| 413 | dev_err(&pdev->dev, "Unable to create HCD\n"); |
Mikko Perttunen | f5b8c8b | 2013-07-17 10:37:49 +0300 | [diff] [blame] | 414 | return -ENOMEM; |
Stephen Warren | c19d14d | 2013-06-13 11:24:13 -0600 | [diff] [blame] | 415 | } |
| 416 | platform_set_drvdata(pdev, hcd); |
| 417 | ehci = hcd_to_ehci(hcd); |
| 418 | tegra = (struct tegra_ehci_hcd *)ehci->priv; |
| 419 | |
| 420 | hcd->has_tt = 1; |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 421 | |
Julia Lawall | bc2ff98 | 2012-07-30 16:43:41 +0200 | [diff] [blame] | 422 | tegra->clk = devm_clk_get(&pdev->dev, NULL); |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 423 | if (IS_ERR(tegra->clk)) { |
| 424 | dev_err(&pdev->dev, "Can't get ehci clock\n"); |
Stephen Warren | c19d14d | 2013-06-13 11:24:13 -0600 | [diff] [blame] | 425 | err = PTR_ERR(tegra->clk); |
| 426 | goto cleanup_hcd_create; |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 427 | } |
| 428 | |
Dmitry Osipenko | 1434703 | 2018-04-10 01:02:58 +0300 | [diff] [blame] | 429 | tegra->rst = devm_reset_control_get_shared(&pdev->dev, "usb"); |
Stephen Warren | 75606f5 | 2013-11-06 16:53:58 -0700 | [diff] [blame] | 430 | if (IS_ERR(tegra->rst)) { |
| 431 | dev_err(&pdev->dev, "Can't get ehci reset\n"); |
| 432 | err = PTR_ERR(tegra->rst); |
| 433 | goto cleanup_hcd_create; |
| 434 | } |
| 435 | |
Prashant Gaikwad | 20de12c | 2012-06-05 09:59:38 +0530 | [diff] [blame] | 436 | err = clk_prepare_enable(tegra->clk); |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 437 | if (err) |
Wei Yongjun | dafbe92 | 2013-09-27 16:22:08 +0800 | [diff] [blame] | 438 | goto cleanup_hcd_create; |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 439 | |
Tuomas Tynkkynen | a47cc24 | 2014-07-04 04:09:38 +0300 | [diff] [blame] | 440 | err = tegra_reset_usb_controller(pdev); |
Dmitry Osipenko | 1434703 | 2018-04-10 01:02:58 +0300 | [diff] [blame] | 441 | if (err) { |
| 442 | dev_err(&pdev->dev, "Failed to reset controller\n"); |
Tuomas Tynkkynen | a47cc24 | 2014-07-04 04:09:38 +0300 | [diff] [blame] | 443 | goto cleanup_clk_en; |
Dmitry Osipenko | 1434703 | 2018-04-10 01:02:58 +0300 | [diff] [blame] | 444 | } |
Venu Byravarasu | eb5369e | 2013-04-03 16:11:12 +0530 | [diff] [blame] | 445 | |
Tuomas Tynkkynen | 7db71a9 | 2013-07-25 21:38:06 +0300 | [diff] [blame] | 446 | u_phy = devm_usb_get_phy_by_phandle(&pdev->dev, "nvidia,phy", 0); |
Venu Byravarasu | 2d22b42 | 2013-05-16 19:43:02 +0530 | [diff] [blame] | 447 | if (IS_ERR(u_phy)) { |
Vince Hsu | f56e67f | 2014-12-24 18:16:30 +0800 | [diff] [blame] | 448 | err = -EPROBE_DEFER; |
Stephen Warren | c19d14d | 2013-06-13 11:24:13 -0600 | [diff] [blame] | 449 | goto cleanup_clk_en; |
Venu Byravarasu | 2d22b42 | 2013-05-16 19:43:02 +0530 | [diff] [blame] | 450 | } |
Antoine Tenart | 3d46e73 | 2014-09-24 23:05:50 +0400 | [diff] [blame] | 451 | hcd->usb_phy = u_phy; |
Martin Blumenstingl | 4e88d4c | 2018-03-03 22:43:03 +0100 | [diff] [blame] | 452 | hcd->skip_phy_initialization = 1; |
Venu Byravarasu | 2d22b42 | 2013-05-16 19:43:02 +0530 | [diff] [blame] | 453 | |
Venu Byravarasu | 585355c | 2012-12-13 20:59:08 +0000 | [diff] [blame] | 454 | tegra->needs_double_reset = of_property_read_bool(pdev->dev.of_node, |
| 455 | "nvidia,needs-double-reset"); |
| 456 | |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 457 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
Vivek Gautam | 6ba96dc | 2014-05-10 17:30:09 +0530 | [diff] [blame] | 458 | hcd->regs = devm_ioremap_resource(&pdev->dev, res); |
| 459 | if (IS_ERR(hcd->regs)) { |
| 460 | err = PTR_ERR(hcd->regs); |
Stephen Warren | c19d14d | 2013-06-13 11:24:13 -0600 | [diff] [blame] | 461 | goto cleanup_clk_en; |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 462 | } |
Varka Bhadram | a36cc42 | 2014-11-04 07:51:10 +0530 | [diff] [blame] | 463 | hcd->rsrc_start = res->start; |
| 464 | hcd->rsrc_len = resource_size(res); |
| 465 | |
Stephen Warren | c19d14d | 2013-06-13 11:24:13 -0600 | [diff] [blame] | 466 | ehci->caps = hcd->regs + 0x100; |
Tuomas Tynkkynen | 327d8b4 | 2013-08-12 16:06:54 +0300 | [diff] [blame] | 467 | ehci->has_hostpc = soc_config->has_hostpc; |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 468 | |
Antoine Tenart | 3d46e73 | 2014-09-24 23:05:50 +0400 | [diff] [blame] | 469 | err = usb_phy_init(hcd->usb_phy); |
Venu Byravarasu | 2d22b42 | 2013-05-16 19:43:02 +0530 | [diff] [blame] | 470 | if (err) { |
| 471 | dev_err(&pdev->dev, "Failed to initialize phy\n"); |
Stephen Warren | c19d14d | 2013-06-13 11:24:13 -0600 | [diff] [blame] | 472 | goto cleanup_clk_en; |
Olof Johansson | 4a53f4e | 2011-11-04 09:12:40 +0000 | [diff] [blame] | 473 | } |
| 474 | |
Venu Byravarasu | bbdabdb | 2013-01-17 20:15:37 +0000 | [diff] [blame] | 475 | u_phy->otg = devm_kzalloc(&pdev->dev, sizeof(struct usb_otg), |
| 476 | GFP_KERNEL); |
| 477 | if (!u_phy->otg) { |
Venu Byravarasu | bbdabdb | 2013-01-17 20:15:37 +0000 | [diff] [blame] | 478 | err = -ENOMEM; |
Venu Byravarasu | 2d22b42 | 2013-05-16 19:43:02 +0530 | [diff] [blame] | 479 | goto cleanup_phy; |
Venu Byravarasu | bbdabdb | 2013-01-17 20:15:37 +0000 | [diff] [blame] | 480 | } |
| 481 | u_phy->otg->host = hcd_to_bus(hcd); |
| 482 | |
Antoine Tenart | 3d46e73 | 2014-09-24 23:05:50 +0400 | [diff] [blame] | 483 | err = usb_phy_set_suspend(hcd->usb_phy, 0); |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 484 | if (err) { |
| 485 | dev_err(&pdev->dev, "Failed to power on the phy\n"); |
Venu Byravarasu | 2d22b42 | 2013-05-16 19:43:02 +0530 | [diff] [blame] | 486 | goto cleanup_phy; |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 487 | } |
| 488 | |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 489 | irq = platform_get_irq(pdev, 0); |
| 490 | if (!irq) { |
| 491 | dev_err(&pdev->dev, "Failed to get IRQ\n"); |
| 492 | err = -ENODEV; |
Venu Byravarasu | 2d22b42 | 2013-05-16 19:43:02 +0530 | [diff] [blame] | 493 | goto cleanup_phy; |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 494 | } |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 495 | |
Tuomas Tynkkynen | de3f233 | 2013-07-25 21:38:02 +0300 | [diff] [blame] | 496 | otg_set_host(u_phy->otg, &hcd->self); |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 497 | |
Yong Zhang | b5dd18d | 2011-09-07 16:10:52 +0800 | [diff] [blame] | 498 | err = usb_add_hcd(hcd, irq, IRQF_SHARED); |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 499 | if (err) { |
| 500 | dev_err(&pdev->dev, "Failed to add USB HCD\n"); |
Tuomas Tynkkynen | de3f233 | 2013-07-25 21:38:02 +0300 | [diff] [blame] | 501 | goto cleanup_otg_set_host; |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 502 | } |
Peter Chen | 3c9740a | 2013-11-05 10:46:02 +0800 | [diff] [blame] | 503 | device_wakeup_enable(hcd->self.controller); |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 504 | |
| 505 | return err; |
| 506 | |
Tuomas Tynkkynen | de3f233 | 2013-07-25 21:38:02 +0300 | [diff] [blame] | 507 | cleanup_otg_set_host: |
| 508 | otg_set_host(u_phy->otg, NULL); |
Thierry Reding | 8fefcfd | 2013-06-14 13:21:21 +0200 | [diff] [blame] | 509 | cleanup_phy: |
Antoine Tenart | 3d46e73 | 2014-09-24 23:05:50 +0400 | [diff] [blame] | 510 | usb_phy_shutdown(hcd->usb_phy); |
Stephen Warren | c19d14d | 2013-06-13 11:24:13 -0600 | [diff] [blame] | 511 | cleanup_clk_en: |
| 512 | clk_disable_unprepare(tegra->clk); |
Venu Byravarasu | 2d22b42 | 2013-05-16 19:43:02 +0530 | [diff] [blame] | 513 | cleanup_hcd_create: |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 514 | usb_put_hcd(hcd); |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 515 | return err; |
| 516 | } |
| 517 | |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 518 | static int tegra_ehci_remove(struct platform_device *pdev) |
| 519 | { |
Stephen Warren | c19d14d | 2013-06-13 11:24:13 -0600 | [diff] [blame] | 520 | struct usb_hcd *hcd = platform_get_drvdata(pdev); |
| 521 | struct tegra_ehci_hcd *tegra = |
| 522 | (struct tegra_ehci_hcd *)hcd_to_ehci(hcd)->priv; |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 523 | |
Antoine Tenart | 3d46e73 | 2014-09-24 23:05:50 +0400 | [diff] [blame] | 524 | otg_set_host(hcd->usb_phy->otg, NULL); |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 525 | |
Antoine Tenart | 3d46e73 | 2014-09-24 23:05:50 +0400 | [diff] [blame] | 526 | usb_phy_shutdown(hcd->usb_phy); |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 527 | usb_remove_hcd(hcd); |
Venu Byravarasu | ecc8a0c | 2012-08-10 11:42:43 +0530 | [diff] [blame] | 528 | |
Dmitry Osipenko | 1434703 | 2018-04-10 01:02:58 +0300 | [diff] [blame] | 529 | reset_control_assert(tegra->rst); |
| 530 | udelay(1); |
| 531 | |
Prashant Gaikwad | 20de12c | 2012-06-05 09:59:38 +0530 | [diff] [blame] | 532 | clk_disable_unprepare(tegra->clk); |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 533 | |
Tuomas Tynkkynen | 6a70b62 | 2014-06-17 17:17:40 +0300 | [diff] [blame] | 534 | usb_put_hcd(hcd); |
| 535 | |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 536 | return 0; |
| 537 | } |
| 538 | |
| 539 | static void tegra_ehci_hcd_shutdown(struct platform_device *pdev) |
| 540 | { |
Stephen Warren | c19d14d | 2013-06-13 11:24:13 -0600 | [diff] [blame] | 541 | struct usb_hcd *hcd = platform_get_drvdata(pdev); |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 542 | |
| 543 | if (hcd->driver->shutdown) |
| 544 | hcd->driver->shutdown(hcd); |
| 545 | } |
| 546 | |
| 547 | static struct platform_driver tegra_ehci_driver = { |
| 548 | .probe = tegra_ehci_probe, |
| 549 | .remove = tegra_ehci_remove, |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 550 | .shutdown = tegra_ehci_hcd_shutdown, |
| 551 | .driver = { |
Manjunath Goudar | 9fc5f24 | 2013-06-13 11:24:12 -0600 | [diff] [blame] | 552 | .name = DRV_NAME, |
Olof Johansson | 4a53f4e | 2011-11-04 09:12:40 +0000 | [diff] [blame] | 553 | .of_match_table = tegra_ehci_of_match, |
Benoit Goby | 79ad3b5 | 2011-03-09 16:28:56 -0800 | [diff] [blame] | 554 | } |
| 555 | }; |
Manjunath Goudar | 9fc5f24 | 2013-06-13 11:24:12 -0600 | [diff] [blame] | 556 | |
Stephen Warren | 4f2fe2d | 2014-04-14 15:21:23 -0600 | [diff] [blame] | 557 | static int tegra_ehci_reset(struct usb_hcd *hcd) |
| 558 | { |
| 559 | struct ehci_hcd *ehci = hcd_to_ehci(hcd); |
| 560 | int retval; |
| 561 | int txfifothresh; |
| 562 | |
| 563 | retval = ehci_setup(hcd); |
| 564 | if (retval) |
| 565 | return retval; |
| 566 | |
| 567 | /* |
| 568 | * We should really pull this value out of tegra_ehci_soc_config, but |
| 569 | * to avoid needing access to it, make use of the fact that Tegra20 is |
| 570 | * the only one so far that needs a value of 10, and Tegra20 is the |
| 571 | * only one which doesn't set has_hostpc. |
| 572 | */ |
| 573 | txfifothresh = ehci->has_hostpc ? 0x10 : 10; |
| 574 | ehci_writel(ehci, txfifothresh << 16, &ehci->regs->txfill_tuning); |
| 575 | |
| 576 | return 0; |
| 577 | } |
| 578 | |
Manjunath Goudar | 9fc5f24 | 2013-06-13 11:24:12 -0600 | [diff] [blame] | 579 | static const struct ehci_driver_overrides tegra_overrides __initconst = { |
| 580 | .extra_priv_size = sizeof(struct tegra_ehci_hcd), |
Stephen Warren | 4f2fe2d | 2014-04-14 15:21:23 -0600 | [diff] [blame] | 581 | .reset = tegra_ehci_reset, |
Manjunath Goudar | 9fc5f24 | 2013-06-13 11:24:12 -0600 | [diff] [blame] | 582 | }; |
| 583 | |
| 584 | static int __init ehci_tegra_init(void) |
| 585 | { |
| 586 | if (usb_disabled()) |
| 587 | return -ENODEV; |
| 588 | |
| 589 | pr_info(DRV_NAME ": " DRIVER_DESC "\n"); |
| 590 | |
| 591 | ehci_init_driver(&tegra_ehci_hc_driver, &tegra_overrides); |
| 592 | |
| 593 | /* |
| 594 | * The Tegra HW has some unusual quirks, which require Tegra-specific |
| 595 | * workarounds. We override certain hc_driver functions here to |
| 596 | * achieve that. We explicitly do not enhance ehci_driver_overrides to |
| 597 | * allow this more easily, since this is an unusual case, and we don't |
| 598 | * want to encourage others to override these functions by making it |
| 599 | * too easy. |
| 600 | */ |
| 601 | |
Manjunath Goudar | 9fc5f24 | 2013-06-13 11:24:12 -0600 | [diff] [blame] | 602 | tegra_ehci_hc_driver.map_urb_for_dma = tegra_ehci_map_urb_for_dma; |
| 603 | tegra_ehci_hc_driver.unmap_urb_for_dma = tegra_ehci_unmap_urb_for_dma; |
| 604 | tegra_ehci_hc_driver.hub_control = tegra_ehci_hub_control; |
| 605 | |
| 606 | return platform_driver_register(&tegra_ehci_driver); |
| 607 | } |
| 608 | module_init(ehci_tegra_init); |
| 609 | |
| 610 | static void __exit ehci_tegra_cleanup(void) |
| 611 | { |
| 612 | platform_driver_unregister(&tegra_ehci_driver); |
| 613 | } |
| 614 | module_exit(ehci_tegra_cleanup); |
| 615 | |
| 616 | MODULE_DESCRIPTION(DRIVER_DESC); |
| 617 | MODULE_LICENSE("GPL"); |
| 618 | MODULE_ALIAS("platform:" DRV_NAME); |
| 619 | MODULE_DEVICE_TABLE(of, tegra_ehci_of_match); |