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Paul Gortmaker81fad212008-04-15 18:41:31 -04001/*
2 * SBC8641D Device Tree Source
3 *
4 * Copyright 2008 Wind River Systems Inc.
5 *
6 * Paul Gortmaker (see MAINTAINERS for contact information)
7 *
8 * Based largely on the mpc8641_hpcn.dts by Freescale Semiconductor Inc.
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
14 */
15
Alessio Igor Bogani334479d2016-03-04 11:09:11 +010016/include/ "mpc8641si-pre.dtsi"
Paul Gortmaker81fad212008-04-15 18:41:31 -040017
18/ {
19 model = "SBC8641D";
20 compatible = "wind,sbc8641";
Paul Gortmaker81fad212008-04-15 18:41:31 -040021
22 aliases {
Paul Gortmaker81fad212008-04-15 18:41:31 -040023 pci1 = &pci1;
24 };
25
Paul Gortmaker81fad212008-04-15 18:41:31 -040026 memory {
27 device_type = "memory";
28 reg = <0x00000000 0x20000000>; // 512M at 0x0
29 };
30
Alessio Igor Bogani334479d2016-03-04 11:09:11 +010031 lbc: localbus@f8005000 {
Paul Gortmaker81fad212008-04-15 18:41:31 -040032 reg = <0xf8005000 0x1000>;
Paul Gortmaker81fad212008-04-15 18:41:31 -040033
34 ranges = <0 0 0xff000000 0x01000000 // 16MB Boot flash
35 1 0 0xf0000000 0x00010000 // 64KB EEPROM
36 2 0 0xf1000000 0x00100000 // EPLD (1MB)
37 3 0 0xe0000000 0x04000000 // 64MB LB SDRAM (CS3)
38 4 0 0xe4000000 0x04000000 // 64MB LB SDRAM (CS4)
39 6 0 0xf4000000 0x00100000 // LCD display (1MB)
40 7 0 0xe8000000 0x04000000>; // 64MB OneNAND
41
42 flash@0,0 {
43 compatible = "cfi-flash";
44 reg = <0 0 0x01000000>;
45 bank-width = <2>;
46 device-width = <2>;
47 #address-cells = <1>;
48 #size-cells = <1>;
49 partition@0 {
50 label = "dtb";
51 reg = <0x00000000 0x00100000>;
52 read-only;
53 };
54 partition@300000 {
55 label = "kernel";
56 reg = <0x00100000 0x00400000>;
57 read-only;
58 };
59 partition@400000 {
60 label = "fs";
61 reg = <0x00500000 0x00a00000>;
62 };
63 partition@700000 {
64 label = "firmware";
65 reg = <0x00f00000 0x00100000>;
66 read-only;
67 };
68 };
69
70 epld@2,0 {
71 compatible = "wrs,epld-localbus";
72 #address-cells = <2>;
73 #size-cells = <1>;
74 reg = <2 0 0x100000>;
75 ranges = <0 0 5 0 1 // User switches
76 1 0 5 1 1 // Board ID/Rev
77 3 0 5 3 1>; // LEDs
78 };
79 };
80
Alessio Igor Bogani334479d2016-03-04 11:09:11 +010081 soc: soc@f8000000 {
Paul Gortmaker81fad212008-04-15 18:41:31 -040082 ranges = <0x00000000 0xf8000000 0x00100000>;
Kumar Galadee80552008-06-27 13:45:19 -050083
Paul Gortmaker81fad212008-04-15 18:41:31 -040084 enet0: ethernet@24000 {
Andy Flemingb31a1d82008-12-16 15:29:15 -080085 tbi-handle = <&tbi0>;
Paul Gortmaker81fad212008-04-15 18:41:31 -040086 phy-handle = <&phy0>;
87 phy-connection-type = "rgmii-id";
Alessio Igor Bogani334479d2016-03-04 11:09:11 +010088 };
Anton Vorontsovd8bc55f2009-03-19 21:01:51 +030089
Alessio Igor Bogani334479d2016-03-04 11:09:11 +010090 mdio@24520 {
91 phy0: ethernet-phy@1f {
92 reg = <0x1f>;
93 };
94 phy1: ethernet-phy@0 {
95 reg = <0>;
96 };
97 phy2: ethernet-phy@1 {
98 reg = <1>;
99 };
100 phy3: ethernet-phy@2 {
101 reg = <2>;
102 };
103 tbi0: tbi-phy@11 {
104 reg = <0x11>;
105 device_type = "tbi-phy";
Anton Vorontsovd8bc55f2009-03-19 21:01:51 +0300106 };
Paul Gortmaker81fad212008-04-15 18:41:31 -0400107 };
108
109 enet1: ethernet@25000 {
Andy Flemingb31a1d82008-12-16 15:29:15 -0800110 tbi-handle = <&tbi1>;
Paul Gortmaker81fad212008-04-15 18:41:31 -0400111 phy-handle = <&phy1>;
112 phy-connection-type = "rgmii-id";
Alessio Igor Bogani334479d2016-03-04 11:09:11 +0100113 };
Anton Vorontsovd8bc55f2009-03-19 21:01:51 +0300114
Alessio Igor Bogani334479d2016-03-04 11:09:11 +0100115 mdio@25520 {
116 tbi1: tbi-phy@11 {
117 reg = <0x11>;
118 device_type = "tbi-phy";
Anton Vorontsovd8bc55f2009-03-19 21:01:51 +0300119 };
Paul Gortmaker81fad212008-04-15 18:41:31 -0400120 };
121
122 enet2: ethernet@26000 {
Andy Flemingb31a1d82008-12-16 15:29:15 -0800123 tbi-handle = <&tbi2>;
Paul Gortmaker81fad212008-04-15 18:41:31 -0400124 phy-handle = <&phy2>;
125 phy-connection-type = "rgmii-id";
Alessio Igor Bogani334479d2016-03-04 11:09:11 +0100126 };
Anton Vorontsovd8bc55f2009-03-19 21:01:51 +0300127
Alessio Igor Bogani334479d2016-03-04 11:09:11 +0100128 mdio@26520 {
129 tbi2: tbi-phy@11 {
130 reg = <0x11>;
131 device_type = "tbi-phy";
Anton Vorontsovd8bc55f2009-03-19 21:01:51 +0300132 };
Paul Gortmaker81fad212008-04-15 18:41:31 -0400133 };
134
135 enet3: ethernet@27000 {
Andy Flemingb31a1d82008-12-16 15:29:15 -0800136 tbi-handle = <&tbi3>;
Paul Gortmaker81fad212008-04-15 18:41:31 -0400137 phy-handle = <&phy3>;
138 phy-connection-type = "rgmii-id";
Alessio Igor Bogani334479d2016-03-04 11:09:11 +0100139 };
Anton Vorontsovd8bc55f2009-03-19 21:01:51 +0300140
Alessio Igor Bogani334479d2016-03-04 11:09:11 +0100141 mdio@27520 {
142 tbi3: tbi-phy@11 {
143 reg = <0x11>;
144 device_type = "tbi-phy";
Anton Vorontsovd8bc55f2009-03-19 21:01:51 +0300145 };
Paul Gortmaker81fad212008-04-15 18:41:31 -0400146 };
Paul Gortmaker81fad212008-04-15 18:41:31 -0400147 };
148
149 pci0: pcie@f8008000 {
Paul Gortmaker81fad212008-04-15 18:41:31 -0400150 reg = <0xf8008000 0x1000>;
Paul Gortmaker81fad212008-04-15 18:41:31 -0400151 ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x20000000
152 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
Paul Gortmaker81fad212008-04-15 18:41:31 -0400153 interrupt-map-mask = <0xff00 0 0 7>;
Paul Gortmaker81fad212008-04-15 18:41:31 -0400154
155 pcie@0 {
Paul Gortmaker81fad212008-04-15 18:41:31 -0400156 ranges = <0x02000000 0x0 0x80000000
157 0x02000000 0x0 0x80000000
158 0x0 0x20000000
159
160 0x01000000 0x0 0x00000000
161 0x01000000 0x0 0x00000000
162 0x0 0x00100000>;
163 };
164
165 };
166
167 pci1: pcie@f8009000 {
Paul Gortmaker81fad212008-04-15 18:41:31 -0400168 compatible = "fsl,mpc8641-pcie";
169 device_type = "pci";
Paul Gortmaker81fad212008-04-15 18:41:31 -0400170 #size-cells = <2>;
171 #address-cells = <3>;
172 reg = <0xf8009000 0x1000>;
173 bus-range = <0 0xff>;
174 ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
175 0x01000000 0x0 0x00000000 0xe3000000 0x0 0x00100000>;
Alessio Igor Bogani595207b2016-03-04 11:09:10 +0100176 clock-frequency = <100000000>;
177 interrupts = <25 2 0 0>;
Paul Gortmaker81fad212008-04-15 18:41:31 -0400178 interrupt-map-mask = <0xf800 0 0 7>;
179 interrupt-map = <
180 /* IDSEL 0x0 */
181 0x0000 0 0 1 &mpic 4 1
182 0x0000 0 0 2 &mpic 5 1
183 0x0000 0 0 3 &mpic 6 1
184 0x0000 0 0 4 &mpic 7 1
185 >;
186
187 pcie@0 {
188 reg = <0 0 0 0 0>;
189 #size-cells = <2>;
190 #address-cells = <3>;
191 device_type = "pci";
192 ranges = <0x02000000 0x0 0xa0000000
193 0x02000000 0x0 0xa0000000
194 0x0 0x20000000
195
196 0x01000000 0x0 0x00000000
197 0x01000000 0x0 0x00000000
198 0x0 0x00100000>;
199 };
200 };
201};
Alessio Igor Bogani334479d2016-03-04 11:09:11 +0100202
203/include/ "mpc8641si-post.dtsi"