Benjamin Herrenschmidt | a28d3af | 2006-01-07 11:35:26 +1100 | [diff] [blame^] | 1 | /* |
| 2 | i2c Support for Apple SMU Controller |
| 3 | |
| 4 | Copyright (c) 2005 Benjamin Herrenschmidt, IBM Corp. |
| 5 | <benh@kernel.crashing.org> |
| 6 | |
| 7 | This program is free software; you can redistribute it and/or modify |
| 8 | it under the terms of the GNU General Public License as published by |
| 9 | the Free Software Foundation; either version 2 of the License, or |
| 10 | (at your option) any later version. |
| 11 | |
| 12 | This program is distributed in the hope that it will be useful, |
| 13 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | GNU General Public License for more details. |
| 16 | |
| 17 | You should have received a copy of the GNU General Public License |
| 18 | along with this program; if not, write to the Free Software |
| 19 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
| 20 | |
| 21 | */ |
| 22 | |
| 23 | #include <linux/config.h> |
| 24 | #include <linux/module.h> |
| 25 | #include <linux/kernel.h> |
| 26 | #include <linux/types.h> |
| 27 | #include <linux/i2c.h> |
| 28 | #include <linux/init.h> |
| 29 | #include <linux/completion.h> |
| 30 | #include <linux/device.h> |
| 31 | #include <linux/platform_device.h> |
| 32 | #include <asm/prom.h> |
| 33 | #include <asm/pmac_low_i2c.h> |
| 34 | |
| 35 | MODULE_AUTHOR("Benjamin Herrenschmidt <benh@kernel.crashing.org>"); |
| 36 | MODULE_DESCRIPTION("I2C driver for Apple PowerMac"); |
| 37 | MODULE_LICENSE("GPL"); |
| 38 | |
| 39 | /* |
| 40 | * SMBUS-type transfer entrypoint |
| 41 | */ |
| 42 | static s32 i2c_powermac_smbus_xfer( struct i2c_adapter* adap, |
| 43 | u16 addr, |
| 44 | unsigned short flags, |
| 45 | char read_write, |
| 46 | u8 command, |
| 47 | int size, |
| 48 | union i2c_smbus_data* data) |
| 49 | { |
| 50 | struct pmac_i2c_bus *bus = i2c_get_adapdata(adap); |
| 51 | int rc = 0; |
| 52 | int read = (read_write == I2C_SMBUS_READ); |
| 53 | int addrdir = (addr << 1) | read; |
| 54 | u8 local[2]; |
| 55 | |
| 56 | rc = pmac_i2c_open(bus, 0); |
| 57 | if (rc) |
| 58 | return rc; |
| 59 | |
| 60 | switch (size) { |
| 61 | case I2C_SMBUS_QUICK: |
| 62 | rc = pmac_i2c_setmode(bus, pmac_i2c_mode_std); |
| 63 | if (rc) |
| 64 | goto bail; |
| 65 | rc = pmac_i2c_xfer(bus, addrdir, 0, 0, NULL, 0); |
| 66 | break; |
| 67 | case I2C_SMBUS_BYTE: |
| 68 | rc = pmac_i2c_setmode(bus, pmac_i2c_mode_std); |
| 69 | if (rc) |
| 70 | goto bail; |
| 71 | rc = pmac_i2c_xfer(bus, addrdir, 0, 0, &data->byte, 1); |
| 72 | break; |
| 73 | case I2C_SMBUS_BYTE_DATA: |
| 74 | rc = pmac_i2c_setmode(bus, read ? |
| 75 | pmac_i2c_mode_combined : |
| 76 | pmac_i2c_mode_stdsub); |
| 77 | if (rc) |
| 78 | goto bail; |
| 79 | rc = pmac_i2c_xfer(bus, addrdir, 1, command, &data->byte, 1); |
| 80 | break; |
| 81 | case I2C_SMBUS_WORD_DATA: |
| 82 | rc = pmac_i2c_setmode(bus, read ? |
| 83 | pmac_i2c_mode_combined : |
| 84 | pmac_i2c_mode_stdsub); |
| 85 | if (rc) |
| 86 | goto bail; |
| 87 | if (!read) { |
| 88 | local[0] = data->word & 0xff; |
| 89 | local[1] = (data->word >> 8) & 0xff; |
| 90 | } |
| 91 | rc = pmac_i2c_xfer(bus, addrdir, 1, command, local, 2); |
| 92 | if (rc == 0 && read) { |
| 93 | data->word = ((u16)local[1]) << 8; |
| 94 | data->word |= local[0]; |
| 95 | } |
| 96 | break; |
| 97 | |
| 98 | /* Note that these are broken vs. the expected smbus API where |
| 99 | * on reads, the lenght is actually returned from the function, |
| 100 | * but I think the current API makes no sense and I don't want |
| 101 | * any driver that I haven't verified for correctness to go |
| 102 | * anywhere near a pmac i2c bus anyway ... |
| 103 | * |
| 104 | * I'm also not completely sure what kind of phases to do between |
| 105 | * the actual command and the data (what I am _supposed_ to do that |
| 106 | * is). For now, I assume writes are a single stream and reads have |
| 107 | * a repeat start/addr phase (but not stop in between) |
| 108 | */ |
| 109 | case I2C_SMBUS_BLOCK_DATA: |
| 110 | rc = pmac_i2c_setmode(bus, read ? |
| 111 | pmac_i2c_mode_combined : |
| 112 | pmac_i2c_mode_stdsub); |
| 113 | if (rc) |
| 114 | goto bail; |
| 115 | rc = pmac_i2c_xfer(bus, addrdir, 1, command, data->block, |
| 116 | data->block[0] + 1); |
| 117 | |
| 118 | break; |
| 119 | case I2C_SMBUS_I2C_BLOCK_DATA: |
| 120 | rc = pmac_i2c_setmode(bus, read ? |
| 121 | pmac_i2c_mode_combined : |
| 122 | pmac_i2c_mode_stdsub); |
| 123 | if (rc) |
| 124 | goto bail; |
| 125 | rc = pmac_i2c_xfer(bus, addrdir, 1, command, |
| 126 | read ? data->block : &data->block[1], |
| 127 | data->block[0]); |
| 128 | break; |
| 129 | |
| 130 | default: |
| 131 | rc = -EINVAL; |
| 132 | } |
| 133 | bail: |
| 134 | pmac_i2c_close(bus); |
| 135 | return rc; |
| 136 | } |
| 137 | |
| 138 | /* |
| 139 | * Generic i2c master transfer entrypoint. This driver only support single |
| 140 | * messages (for "lame i2c" transfers). Anything else should use the smbus |
| 141 | * entry point |
| 142 | */ |
| 143 | static int i2c_powermac_master_xfer( struct i2c_adapter *adap, |
| 144 | struct i2c_msg *msgs, |
| 145 | int num) |
| 146 | { |
| 147 | struct pmac_i2c_bus *bus = i2c_get_adapdata(adap); |
| 148 | int rc = 0; |
| 149 | int read; |
| 150 | int addrdir; |
| 151 | |
| 152 | if (num != 1) |
| 153 | return -EINVAL; |
| 154 | if (msgs->flags & I2C_M_TEN) |
| 155 | return -EINVAL; |
| 156 | read = (msgs->flags & I2C_M_RD) != 0; |
| 157 | addrdir = (msgs->addr << 1) | read; |
| 158 | if (msgs->flags & I2C_M_REV_DIR_ADDR) |
| 159 | addrdir ^= 1; |
| 160 | |
| 161 | rc = pmac_i2c_open(bus, 0); |
| 162 | if (rc) |
| 163 | return rc; |
| 164 | rc = pmac_i2c_setmode(bus, pmac_i2c_mode_std); |
| 165 | if (rc) |
| 166 | goto bail; |
| 167 | rc = pmac_i2c_xfer(bus, addrdir, 0, 0, msgs->buf, msgs->len); |
| 168 | bail: |
| 169 | pmac_i2c_close(bus); |
| 170 | return rc < 0 ? rc : msgs->len; |
| 171 | } |
| 172 | |
| 173 | static u32 i2c_powermac_func(struct i2c_adapter * adapter) |
| 174 | { |
| 175 | return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | |
| 176 | I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | |
| 177 | I2C_FUNC_SMBUS_BLOCK_DATA | I2C_FUNC_I2C; |
| 178 | } |
| 179 | |
| 180 | /* For now, we only handle smbus */ |
| 181 | static struct i2c_algorithm i2c_powermac_algorithm = { |
| 182 | .smbus_xfer = i2c_powermac_smbus_xfer, |
| 183 | .master_xfer = i2c_powermac_master_xfer, |
| 184 | .functionality = i2c_powermac_func, |
| 185 | }; |
| 186 | |
| 187 | |
| 188 | static int i2c_powermac_remove(struct device *dev) |
| 189 | { |
| 190 | struct i2c_adapter *adapter = dev_get_drvdata(dev); |
| 191 | struct pmac_i2c_bus *bus = i2c_get_adapdata(adapter); |
| 192 | int rc; |
| 193 | |
| 194 | rc = i2c_del_adapter(adapter); |
| 195 | pmac_i2c_detach_adapter(bus, adapter); |
| 196 | i2c_set_adapdata(adapter, NULL); |
| 197 | /* We aren't that prepared to deal with this... */ |
| 198 | if (rc) |
| 199 | printk("i2c-powermac.c: Failed to remove bus %s !\n", |
| 200 | adapter->name); |
| 201 | dev_set_drvdata(dev, NULL); |
| 202 | kfree(adapter); |
| 203 | |
| 204 | return 0; |
| 205 | } |
| 206 | |
| 207 | |
| 208 | static int i2c_powermac_probe(struct device *dev) |
| 209 | { |
| 210 | struct pmac_i2c_bus *bus = dev->platform_data; |
| 211 | struct device_node *parent = NULL; |
| 212 | struct i2c_adapter *adapter; |
| 213 | char name[32], *basename; |
| 214 | int rc; |
| 215 | |
| 216 | if (bus == NULL) |
| 217 | return -EINVAL; |
| 218 | |
| 219 | /* Ok, now we need to make up a name for the interface that will |
| 220 | * match what we used to do in the past, that is basically the |
| 221 | * controller's parent device node for keywest. PMU didn't have a |
| 222 | * naming convention and SMU has a different one |
| 223 | */ |
| 224 | switch(pmac_i2c_get_type(bus)) { |
| 225 | case pmac_i2c_bus_keywest: |
| 226 | parent = of_get_parent(pmac_i2c_get_controller(bus)); |
| 227 | if (parent == NULL) |
| 228 | return -EINVAL; |
| 229 | basename = parent->name; |
| 230 | break; |
| 231 | case pmac_i2c_bus_pmu: |
| 232 | basename = "pmu"; |
| 233 | break; |
| 234 | case pmac_i2c_bus_smu: |
| 235 | /* This is not what we used to do but I'm fixing drivers at |
| 236 | * the same time as this change |
| 237 | */ |
| 238 | basename = "smu"; |
| 239 | break; |
| 240 | default: |
| 241 | return -EINVAL; |
| 242 | } |
| 243 | snprintf(name, 32, "%s %d", basename, pmac_i2c_get_channel(bus)); |
| 244 | of_node_put(parent); |
| 245 | |
| 246 | adapter = kzalloc(sizeof(struct i2c_adapter), GFP_KERNEL); |
| 247 | if (adapter == NULL) { |
| 248 | printk(KERN_ERR "i2c-powermac: can't allocate inteface !\n"); |
| 249 | return -ENOMEM; |
| 250 | } |
| 251 | dev_set_drvdata(dev, adapter); |
| 252 | strcpy(adapter->name, name); |
| 253 | adapter->algo = &i2c_powermac_algorithm; |
| 254 | i2c_set_adapdata(adapter, bus); |
| 255 | adapter->dev.parent = dev; |
| 256 | pmac_i2c_attach_adapter(bus, adapter); |
| 257 | rc = i2c_add_adapter(adapter); |
| 258 | if (rc) { |
| 259 | printk(KERN_ERR "i2c-powermac: Adapter %s registration " |
| 260 | "failed\n", name); |
| 261 | i2c_set_adapdata(adapter, NULL); |
| 262 | pmac_i2c_detach_adapter(bus, adapter); |
| 263 | } |
| 264 | |
| 265 | printk(KERN_INFO "PowerMac i2c bus %s registered\n", name); |
| 266 | return rc; |
| 267 | } |
| 268 | |
| 269 | |
| 270 | static struct device_driver i2c_powermac_driver = { |
| 271 | .name = "i2c-powermac", |
| 272 | .bus = &platform_bus_type, |
| 273 | .probe = i2c_powermac_probe, |
| 274 | .remove = i2c_powermac_remove, |
| 275 | }; |
| 276 | |
| 277 | static int __init i2c_powermac_init(void) |
| 278 | { |
| 279 | driver_register(&i2c_powermac_driver); |
| 280 | return 0; |
| 281 | } |
| 282 | |
| 283 | |
| 284 | static void __exit i2c_powermac_cleanup(void) |
| 285 | { |
| 286 | driver_unregister(&i2c_powermac_driver); |
| 287 | } |
| 288 | |
| 289 | module_init(i2c_powermac_init); |
| 290 | module_exit(i2c_powermac_cleanup); |