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Jeremy Fitzhardingea42089d2007-07-17 18:37:04 -07001/******************************************************************************
2 * xen.h
3 *
4 * Guest OS interface to Xen.
5 *
6 * Copyright (c) 2004, K A Fraser
7 */
8
9#ifndef __XEN_PUBLIC_XEN_H__
10#define __XEN_PUBLIC_XEN_H__
11
12#include <asm/xen/interface.h>
13
14/*
15 * XEN "SYSTEM CALLS" (a.k.a. HYPERCALLS).
16 */
17
18/*
19 * x86_32: EAX = vector; EBX, ECX, EDX, ESI, EDI = args 1, 2, 3, 4, 5.
20 * EAX = return value
21 * (argument registers may be clobbered on return)
22 * x86_64: RAX = vector; RDI, RSI, RDX, R10, R8, R9 = args 1, 2, 3, 4, 5, 6.
23 * RAX = return value
24 * (argument registers not clobbered on return; RCX, R11 are)
25 */
26#define __HYPERVISOR_set_trap_table 0
27#define __HYPERVISOR_mmu_update 1
28#define __HYPERVISOR_set_gdt 2
29#define __HYPERVISOR_stack_switch 3
30#define __HYPERVISOR_set_callbacks 4
31#define __HYPERVISOR_fpu_taskswitch 5
32#define __HYPERVISOR_sched_op 6
33#define __HYPERVISOR_dom0_op 7
34#define __HYPERVISOR_set_debugreg 8
35#define __HYPERVISOR_get_debugreg 9
36#define __HYPERVISOR_update_descriptor 10
37#define __HYPERVISOR_memory_op 12
38#define __HYPERVISOR_multicall 13
39#define __HYPERVISOR_update_va_mapping 14
40#define __HYPERVISOR_set_timer_op 15
41#define __HYPERVISOR_event_channel_op_compat 16
42#define __HYPERVISOR_xen_version 17
43#define __HYPERVISOR_console_io 18
44#define __HYPERVISOR_physdev_op_compat 19
45#define __HYPERVISOR_grant_table_op 20
46#define __HYPERVISOR_vm_assist 21
47#define __HYPERVISOR_update_va_mapping_otherdomain 22
48#define __HYPERVISOR_iret 23 /* x86 only */
49#define __HYPERVISOR_vcpu_op 24
50#define __HYPERVISOR_set_segment_base 25 /* x86/64 only */
51#define __HYPERVISOR_mmuext_op 26
52#define __HYPERVISOR_acm_op 27
53#define __HYPERVISOR_nmi_op 28
54#define __HYPERVISOR_sched_op_new 29
55#define __HYPERVISOR_callback_op 30
56#define __HYPERVISOR_xenoprof_op 31
57#define __HYPERVISOR_event_channel_op 32
58#define __HYPERVISOR_physdev_op 33
59#define __HYPERVISOR_hvm_op 34
60
Isaku Yamahata9a9db272008-04-02 10:53:50 -070061/* Architecture-specific hypercall definitions. */
62#define __HYPERVISOR_arch_0 48
63#define __HYPERVISOR_arch_1 49
64#define __HYPERVISOR_arch_2 50
65#define __HYPERVISOR_arch_3 51
66#define __HYPERVISOR_arch_4 52
67#define __HYPERVISOR_arch_5 53
68#define __HYPERVISOR_arch_6 54
69#define __HYPERVISOR_arch_7 55
70
Jeremy Fitzhardingea42089d2007-07-17 18:37:04 -070071/*
72 * VIRTUAL INTERRUPTS
73 *
74 * Virtual interrupts that a guest OS may receive from Xen.
75 */
76#define VIRQ_TIMER 0 /* Timebase update, and/or requested timeout. */
77#define VIRQ_DEBUG 1 /* Request guest to dump debug info. */
78#define VIRQ_CONSOLE 2 /* (DOM0) Bytes received on emergency console. */
79#define VIRQ_DOM_EXC 3 /* (DOM0) Exceptional event for some domain. */
80#define VIRQ_DEBUGGER 6 /* (DOM0) A domain has paused for debugging. */
81#define NR_VIRQS 8
82
83/*
84 * MMU-UPDATE REQUESTS
85 *
86 * HYPERVISOR_mmu_update() accepts a list of (ptr, val) pairs.
87 * A foreigndom (FD) can be specified (or DOMID_SELF for none).
88 * Where the FD has some effect, it is described below.
89 * ptr[1:0] specifies the appropriate MMU_* command.
90 *
91 * ptr[1:0] == MMU_NORMAL_PT_UPDATE:
92 * Updates an entry in a page table. If updating an L1 table, and the new
93 * table entry is valid/present, the mapped frame must belong to the FD, if
94 * an FD has been specified. If attempting to map an I/O page then the
95 * caller assumes the privilege of the FD.
96 * FD == DOMID_IO: Permit /only/ I/O mappings, at the priv level of the caller.
97 * FD == DOMID_XEN: Map restricted areas of Xen's heap space.
98 * ptr[:2] -- Machine address of the page-table entry to modify.
99 * val -- Value to write.
100 *
101 * ptr[1:0] == MMU_MACHPHYS_UPDATE:
102 * Updates an entry in the machine->pseudo-physical mapping table.
103 * ptr[:2] -- Machine address within the frame whose mapping to modify.
104 * The frame must belong to the FD, if one is specified.
105 * val -- Value to write into the mapping entry.
106 */
107#define MMU_NORMAL_PT_UPDATE 0 /* checked '*ptr = val'. ptr is MA. */
108#define MMU_MACHPHYS_UPDATE 1 /* ptr = MA of frame to modify entry for */
109
110/*
111 * MMU EXTENDED OPERATIONS
112 *
113 * HYPERVISOR_mmuext_op() accepts a list of mmuext_op structures.
114 * A foreigndom (FD) can be specified (or DOMID_SELF for none).
115 * Where the FD has some effect, it is described below.
116 *
117 * cmd: MMUEXT_(UN)PIN_*_TABLE
118 * mfn: Machine frame number to be (un)pinned as a p.t. page.
119 * The frame must belong to the FD, if one is specified.
120 *
121 * cmd: MMUEXT_NEW_BASEPTR
122 * mfn: Machine frame number of new page-table base to install in MMU.
123 *
124 * cmd: MMUEXT_NEW_USER_BASEPTR [x86/64 only]
125 * mfn: Machine frame number of new page-table base to install in MMU
126 * when in user space.
127 *
128 * cmd: MMUEXT_TLB_FLUSH_LOCAL
129 * No additional arguments. Flushes local TLB.
130 *
131 * cmd: MMUEXT_INVLPG_LOCAL
132 * linear_addr: Linear address to be flushed from the local TLB.
133 *
134 * cmd: MMUEXT_TLB_FLUSH_MULTI
135 * vcpumask: Pointer to bitmap of VCPUs to be flushed.
136 *
137 * cmd: MMUEXT_INVLPG_MULTI
138 * linear_addr: Linear address to be flushed.
139 * vcpumask: Pointer to bitmap of VCPUs to be flushed.
140 *
141 * cmd: MMUEXT_TLB_FLUSH_ALL
142 * No additional arguments. Flushes all VCPUs' TLBs.
143 *
144 * cmd: MMUEXT_INVLPG_ALL
145 * linear_addr: Linear address to be flushed from all VCPUs' TLBs.
146 *
147 * cmd: MMUEXT_FLUSH_CACHE
148 * No additional arguments. Writes back and flushes cache contents.
149 *
150 * cmd: MMUEXT_SET_LDT
151 * linear_addr: Linear address of LDT base (NB. must be page-aligned).
152 * nr_ents: Number of entries in LDT.
153 */
154#define MMUEXT_PIN_L1_TABLE 0
155#define MMUEXT_PIN_L2_TABLE 1
156#define MMUEXT_PIN_L3_TABLE 2
157#define MMUEXT_PIN_L4_TABLE 3
158#define MMUEXT_UNPIN_TABLE 4
159#define MMUEXT_NEW_BASEPTR 5
160#define MMUEXT_TLB_FLUSH_LOCAL 6
161#define MMUEXT_INVLPG_LOCAL 7
162#define MMUEXT_TLB_FLUSH_MULTI 8
163#define MMUEXT_INVLPG_MULTI 9
164#define MMUEXT_TLB_FLUSH_ALL 10
165#define MMUEXT_INVLPG_ALL 11
166#define MMUEXT_FLUSH_CACHE 12
167#define MMUEXT_SET_LDT 13
168#define MMUEXT_NEW_USER_BASEPTR 15
169
170#ifndef __ASSEMBLY__
171struct mmuext_op {
172 unsigned int cmd;
173 union {
174 /* [UN]PIN_TABLE, NEW_BASEPTR, NEW_USER_BASEPTR */
175 unsigned long mfn;
176 /* INVLPG_LOCAL, INVLPG_ALL, SET_LDT */
177 unsigned long linear_addr;
178 } arg1;
179 union {
180 /* SET_LDT */
181 unsigned int nr_ents;
182 /* TLB_FLUSH_MULTI, INVLPG_MULTI */
183 void *vcpumask;
184 } arg2;
185};
186DEFINE_GUEST_HANDLE_STRUCT(mmuext_op);
187#endif
188
189/* These are passed as 'flags' to update_va_mapping. They can be ORed. */
190/* When specifying UVMF_MULTI, also OR in a pointer to a CPU bitmap. */
191/* UVMF_LOCAL is merely UVMF_MULTI with a NULL bitmap pointer. */
192#define UVMF_NONE (0UL<<0) /* No flushing at all. */
193#define UVMF_TLB_FLUSH (1UL<<0) /* Flush entire TLB(s). */
194#define UVMF_INVLPG (2UL<<0) /* Flush only one entry. */
195#define UVMF_FLUSHTYPE_MASK (3UL<<0)
196#define UVMF_MULTI (0UL<<2) /* Flush subset of TLBs. */
197#define UVMF_LOCAL (0UL<<2) /* Flush local TLB. */
198#define UVMF_ALL (1UL<<2) /* Flush all TLBs. */
199
200/*
201 * Commands to HYPERVISOR_console_io().
202 */
203#define CONSOLEIO_write 0
204#define CONSOLEIO_read 1
205
206/*
207 * Commands to HYPERVISOR_vm_assist().
208 */
209#define VMASST_CMD_enable 0
210#define VMASST_CMD_disable 1
211#define VMASST_TYPE_4gb_segments 0
212#define VMASST_TYPE_4gb_segments_notify 1
213#define VMASST_TYPE_writable_pagetables 2
214#define VMASST_TYPE_pae_extended_cr3 3
215#define MAX_VMASST_TYPE 3
216
217#ifndef __ASSEMBLY__
218
219typedef uint16_t domid_t;
220
221/* Domain ids >= DOMID_FIRST_RESERVED cannot be used for ordinary domains. */
222#define DOMID_FIRST_RESERVED (0x7FF0U)
223
224/* DOMID_SELF is used in certain contexts to refer to oneself. */
225#define DOMID_SELF (0x7FF0U)
226
227/*
228 * DOMID_IO is used to restrict page-table updates to mapping I/O memory.
229 * Although no Foreign Domain need be specified to map I/O pages, DOMID_IO
230 * is useful to ensure that no mappings to the OS's own heap are accidentally
231 * installed. (e.g., in Linux this could cause havoc as reference counts
232 * aren't adjusted on the I/O-mapping code path).
233 * This only makes sense in MMUEXT_SET_FOREIGNDOM, but in that context can
234 * be specified by any calling domain.
235 */
236#define DOMID_IO (0x7FF1U)
237
238/*
239 * DOMID_XEN is used to allow privileged domains to map restricted parts of
240 * Xen's heap space (e.g., the machine_to_phys table).
241 * This only makes sense in MMUEXT_SET_FOREIGNDOM, and is only permitted if
242 * the caller is privileged.
243 */
244#define DOMID_XEN (0x7FF2U)
245
246/*
247 * Send an array of these to HYPERVISOR_mmu_update().
248 * NB. The fields are natural pointer/address size for this architecture.
249 */
250struct mmu_update {
251 uint64_t ptr; /* Machine address of PTE. */
252 uint64_t val; /* New contents of PTE. */
253};
254DEFINE_GUEST_HANDLE_STRUCT(mmu_update);
255
256/*
257 * Send an array of these to HYPERVISOR_multicall().
258 * NB. The fields are natural register size for this architecture.
259 */
260struct multicall_entry {
261 unsigned long op;
262 long result;
263 unsigned long args[6];
264};
265DEFINE_GUEST_HANDLE_STRUCT(multicall_entry);
266
267/*
268 * Event channel endpoints per domain:
269 * 1024 if a long is 32 bits; 4096 if a long is 64 bits.
270 */
271#define NR_EVENT_CHANNELS (sizeof(unsigned long) * sizeof(unsigned long) * 64)
272
273struct vcpu_time_info {
274 /*
275 * Updates to the following values are preceded and followed
276 * by an increment of 'version'. The guest can therefore
277 * detect updates by looking for changes to 'version'. If the
278 * least-significant bit of the version number is set then an
279 * update is in progress and the guest must wait to read a
280 * consistent set of values. The correct way to interact with
281 * the version number is similar to Linux's seqlock: see the
282 * implementations of read_seqbegin/read_seqretry.
283 */
284 uint32_t version;
285 uint32_t pad0;
286 uint64_t tsc_timestamp; /* TSC at last update of time vals. */
287 uint64_t system_time; /* Time, in nanosecs, since boot. */
288 /*
289 * Current system time:
290 * system_time + ((tsc - tsc_timestamp) << tsc_shift) * tsc_to_system_mul
291 * CPU frequency (Hz):
292 * ((10^9 << 32) / tsc_to_system_mul) >> tsc_shift
293 */
294 uint32_t tsc_to_system_mul;
295 int8_t tsc_shift;
296 int8_t pad1[3];
297}; /* 32 bytes */
298
299struct vcpu_info {
300 /*
301 * 'evtchn_upcall_pending' is written non-zero by Xen to indicate
302 * a pending notification for a particular VCPU. It is then cleared
303 * by the guest OS /before/ checking for pending work, thus avoiding
304 * a set-and-check race. Note that the mask is only accessed by Xen
305 * on the CPU that is currently hosting the VCPU. This means that the
306 * pending and mask flags can be updated by the guest without special
307 * synchronisation (i.e., no need for the x86 LOCK prefix).
308 * This may seem suboptimal because if the pending flag is set by
309 * a different CPU then an IPI may be scheduled even when the mask
310 * is set. However, note:
311 * 1. The task of 'interrupt holdoff' is covered by the per-event-
312 * channel mask bits. A 'noisy' event that is continually being
313 * triggered can be masked at source at this very precise
314 * granularity.
315 * 2. The main purpose of the per-VCPU mask is therefore to restrict
316 * reentrant execution: whether for concurrency control, or to
317 * prevent unbounded stack usage. Whatever the purpose, we expect
318 * that the mask will be asserted only for short periods at a time,
319 * and so the likelihood of a 'spurious' IPI is suitably small.
320 * The mask is read before making an event upcall to the guest: a
321 * non-zero mask therefore guarantees that the VCPU will not receive
322 * an upcall activation. The mask is cleared when the VCPU requests
323 * to block: this avoids wakeup-waiting races.
324 */
325 uint8_t evtchn_upcall_pending;
326 uint8_t evtchn_upcall_mask;
327 unsigned long evtchn_pending_sel;
328 struct arch_vcpu_info arch;
329 struct vcpu_time_info time;
330}; /* 64 bytes (x86) */
331
332/*
333 * Xen/kernel shared data -- pointer provided in start_info.
334 * NB. We expect that this struct is smaller than a page.
335 */
336struct shared_info {
337 struct vcpu_info vcpu_info[MAX_VIRT_CPUS];
338
339 /*
340 * A domain can create "event channels" on which it can send and receive
341 * asynchronous event notifications. There are three classes of event that
342 * are delivered by this mechanism:
343 * 1. Bi-directional inter- and intra-domain connections. Domains must
344 * arrange out-of-band to set up a connection (usually by allocating
345 * an unbound 'listener' port and avertising that via a storage service
346 * such as xenstore).
347 * 2. Physical interrupts. A domain with suitable hardware-access
348 * privileges can bind an event-channel port to a physical interrupt
349 * source.
350 * 3. Virtual interrupts ('events'). A domain can bind an event-channel
351 * port to a virtual interrupt source, such as the virtual-timer
352 * device or the emergency console.
353 *
354 * Event channels are addressed by a "port index". Each channel is
355 * associated with two bits of information:
356 * 1. PENDING -- notifies the domain that there is a pending notification
357 * to be processed. This bit is cleared by the guest.
358 * 2. MASK -- if this bit is clear then a 0->1 transition of PENDING
359 * will cause an asynchronous upcall to be scheduled. This bit is only
360 * updated by the guest. It is read-only within Xen. If a channel
361 * becomes pending while the channel is masked then the 'edge' is lost
362 * (i.e., when the channel is unmasked, the guest must manually handle
363 * pending notifications as no upcall will be scheduled by Xen).
364 *
365 * To expedite scanning of pending notifications, any 0->1 pending
366 * transition on an unmasked channel causes a corresponding bit in a
367 * per-vcpu selector word to be set. Each bit in the selector covers a
368 * 'C long' in the PENDING bitfield array.
369 */
370 unsigned long evtchn_pending[sizeof(unsigned long) * 8];
371 unsigned long evtchn_mask[sizeof(unsigned long) * 8];
372
373 /*
374 * Wallclock time: updated only by control software. Guests should base
375 * their gettimeofday() syscall on this wallclock-base value.
376 */
377 uint32_t wc_version; /* Version counter: see vcpu_time_info_t. */
378 uint32_t wc_sec; /* Secs 00:00:00 UTC, Jan 1, 1970. */
379 uint32_t wc_nsec; /* Nsecs 00:00:00 UTC, Jan 1, 1970. */
380
381 struct arch_shared_info arch;
382
383};
384
385/*
386 * Start-of-day memory layout for the initial domain (DOM0):
387 * 1. The domain is started within contiguous virtual-memory region.
388 * 2. The contiguous region begins and ends on an aligned 4MB boundary.
389 * 3. The region start corresponds to the load address of the OS image.
390 * If the load address is not 4MB aligned then the address is rounded down.
391 * 4. This the order of bootstrap elements in the initial virtual region:
392 * a. relocated kernel image
393 * b. initial ram disk [mod_start, mod_len]
394 * c. list of allocated page frames [mfn_list, nr_pages]
395 * d. start_info_t structure [register ESI (x86)]
396 * e. bootstrap page tables [pt_base, CR3 (x86)]
397 * f. bootstrap stack [register ESP (x86)]
398 * 5. Bootstrap elements are packed together, but each is 4kB-aligned.
399 * 6. The initial ram disk may be omitted.
400 * 7. The list of page frames forms a contiguous 'pseudo-physical' memory
401 * layout for the domain. In particular, the bootstrap virtual-memory
402 * region is a 1:1 mapping to the first section of the pseudo-physical map.
403 * 8. All bootstrap elements are mapped read-writable for the guest OS. The
404 * only exception is the bootstrap page table, which is mapped read-only.
405 * 9. There is guaranteed to be at least 512kB padding after the final
406 * bootstrap element. If necessary, the bootstrap virtual region is
407 * extended by an extra 4MB to ensure this.
408 */
409
410#define MAX_GUEST_CMDLINE 1024
411struct start_info {
412 /* THE FOLLOWING ARE FILLED IN BOTH ON INITIAL BOOT AND ON RESUME. */
413 char magic[32]; /* "xen-<version>-<platform>". */
414 unsigned long nr_pages; /* Total pages allocated to this domain. */
415 unsigned long shared_info; /* MACHINE address of shared info struct. */
416 uint32_t flags; /* SIF_xxx flags. */
417 unsigned long store_mfn; /* MACHINE page number of shared page. */
418 uint32_t store_evtchn; /* Event channel for store communication. */
419 union {
420 struct {
421 unsigned long mfn; /* MACHINE page number of console page. */
422 uint32_t evtchn; /* Event channel for console page. */
423 } domU;
424 struct {
425 uint32_t info_off; /* Offset of console_info struct. */
426 uint32_t info_size; /* Size of console_info struct from start.*/
427 } dom0;
428 } console;
429 /* THE FOLLOWING ARE ONLY FILLED IN ON INITIAL BOOT (NOT RESUME). */
430 unsigned long pt_base; /* VIRTUAL address of page directory. */
431 unsigned long nr_pt_frames; /* Number of bootstrap p.t. frames. */
432 unsigned long mfn_list; /* VIRTUAL address of page-frame list. */
433 unsigned long mod_start; /* VIRTUAL address of pre-loaded module. */
434 unsigned long mod_len; /* Size (bytes) of pre-loaded module. */
435 int8_t cmd_line[MAX_GUEST_CMDLINE];
436};
437
438/* These flags are passed in the 'flags' field of start_info_t. */
439#define SIF_PRIVILEGED (1<<0) /* Is the domain privileged? */
440#define SIF_INITDOMAIN (1<<1) /* Is this the initial control domain? */
441
442typedef uint64_t cpumap_t;
443
444typedef uint8_t xen_domain_handle_t[16];
445
446/* Turn a plain number into a C unsigned long constant. */
447#define __mk_unsigned_long(x) x ## UL
448#define mk_unsigned_long(x) __mk_unsigned_long(x)
449
450#else /* __ASSEMBLY__ */
451
452/* In assembly code we cannot use C numeric constant suffixes. */
453#define mk_unsigned_long(x) x
454
455#endif /* !__ASSEMBLY__ */
456
457#endif /* __XEN_PUBLIC_XEN_H__ */