| Sam Ravnborg | f5e706a | 2008-07-17 21:55:51 -0700 | [diff] [blame] | 1 | #ifndef _SPARC_TLBFLUSH_H |
| 2 | #define _SPARC_TLBFLUSH_H |
| 3 | |
| David S. Miller | 5d83d66 | 2012-05-13 20:49:31 -0700 | [diff] [blame] | 4 | #include <asm/cachetlb_32.h> |
| Sam Ravnborg | f5e706a | 2008-07-17 21:55:51 -0700 | [diff] [blame] | 5 | |
| David S. Miller | 5d83d66 | 2012-05-13 20:49:31 -0700 | [diff] [blame] | 6 | #define flush_tlb_all() \ |
| 7 | sparc32_cachetlb_ops->tlb_all() |
| 8 | #define flush_tlb_mm(mm) \ |
| 9 | sparc32_cachetlb_ops->tlb_mm(mm) |
| 10 | #define flush_tlb_range(vma, start, end) \ |
| 11 | sparc32_cachetlb_ops->tlb_range(vma, start, end) |
| 12 | #define flush_tlb_page(vma, addr) \ |
| 13 | sparc32_cachetlb_ops->tlb_page(vma, addr) |
| Sam Ravnborg | f5e706a | 2008-07-17 21:55:51 -0700 | [diff] [blame] | 14 | |
| 15 | /* |
| 16 | * This is a kludge, until I know better. --zaitcev XXX |
| 17 | */ |
| 18 | static inline void flush_tlb_kernel_range(unsigned long start, |
| 19 | unsigned long end) |
| 20 | { |
| 21 | flush_tlb_all(); |
| 22 | } |
| 23 | |
| 24 | #endif /* _SPARC_TLBFLUSH_H */ |